IN177968B - - Google Patents

Info

Publication number
IN177968B
IN177968B IN607DE1990A IN177968B IN 177968 B IN177968 B IN 177968B IN 607DE1990 A IN607DE1990 A IN 607DE1990A IN 177968 B IN177968 B IN 177968B
Authority
IN
India
Application number
Other languages
English (en)
Inventor
Ralph M Begun
Patrick M Bland
Mark E Dean
Original Assignee
Insternat Business Machines Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB909008145A external-priority patent/GB9008145D0/en
Application filed by Insternat Business Machines Co filed Critical Insternat Business Machines Co
Publication of IN177968B publication Critical patent/IN177968B/en

Links

IN607DE1990 1990-04-10 1990-06-20 IN177968B (cg-RX-API-DMAC7.html)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB909008145A GB9008145D0 (en) 1989-05-31 1990-04-10 Microcomputer system employing address offset mechanism to increase the supported cache memory capacity

Publications (1)

Publication Number Publication Date
IN177968B true IN177968B (cg-RX-API-DMAC7.html) 1997-03-01

Family

ID=10674230

Family Applications (1)

Application Number Title Priority Date Filing Date
IN607DE1990 IN177968B (cg-RX-API-DMAC7.html) 1990-04-10 1990-06-20

Country Status (1)

Country Link
IN (1) IN177968B (cg-RX-API-DMAC7.html)

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