IN170672B - - Google Patents

Info

Publication number
IN170672B
IN170672B IN524/CAL/88A IN524CA1988A IN170672B IN 170672 B IN170672 B IN 170672B IN 524CA1988 A IN524CA1988 A IN 524CA1988A IN 170672 B IN170672 B IN 170672B
Authority
IN
India
Application number
IN524/CAL/88A
Other languages
English (en)
Inventor
David Neil Cutler
David Arthur Orbits
Dileep Bhandarker
Wayne Cardoza
Richard Thomas Witek
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of IN170672B publication Critical patent/IN170672B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors
    • G06F15/8061Details on data memory access
    • G06F15/8069Details on data memory access using a cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros
    • G06F9/30174Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30189Instruction operation extension or modification according to execution mode, e.g. mode flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Storage Device Security (AREA)
IN524/CAL/88A 1987-07-01 1988-06-28 IN170672B (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US6936587A 1987-07-01 1987-07-01

Publications (1)

Publication Number Publication Date
IN170672B true IN170672B (pt) 1992-05-02

Family

ID=22088506

Family Applications (1)

Application Number Title Priority Date Filing Date
IN524/CAL/88A IN170672B (pt) 1987-07-01 1988-06-28

Country Status (10)

Country Link
EP (1) EP0301707B1 (pt)
JP (1) JPH0754467B2 (pt)
KR (1) KR890002765A (pt)
CN (1) CN1016905B (pt)
AU (1) AU626263B2 (pt)
BR (1) BR8803378A (pt)
CA (1) CA1302579C (pt)
DE (1) DE3854905T2 (pt)
IE (1) IE75357B1 (pt)
IN (1) IN170672B (pt)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1304823C (en) * 1987-03-20 1992-07-07 David N. Cutler Apparatus and method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions
JP3206914B2 (ja) * 1989-11-09 2001-09-10 インターナショナル、ビジネス、マシーンズ、コーポレーション 多重プロセッサ・システム
WO1992017839A1 (en) * 1991-04-01 1992-10-15 Cray Research, Inc. Privileged instruction trap for operating system control
JP4246672B2 (ja) 2004-06-03 2009-04-02 株式会社リコー 画像形成装置および画像形成装置制御方法
CN103631561B (zh) * 2012-08-27 2017-02-08 长沙富力电子科技有限公司 一种基于超复杂指令集系统的微处理器架构
US10719321B2 (en) * 2015-09-19 2020-07-21 Microsoft Technology Licensing, Llc Prefetching instruction blocks

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5140728A (en) * 1974-10-02 1976-04-05 Ayao Miura Haamueanyoru ronrikikai
JPS51141537A (en) * 1975-05-31 1976-12-06 Toshiba Corp Memory access control device
JPS5374859A (en) * 1976-12-15 1978-07-03 Fujitsu Ltd Interruption cotrol system
US4791557A (en) * 1985-07-31 1988-12-13 Wang Laboratories, Inc. Apparatus and method for monitoring and controlling the prefetching of instructions by an information processing system

Also Published As

Publication number Publication date
IE881984L (en) 1989-01-01
DE3854905T2 (de) 1996-09-05
EP0301707A3 (en) 1992-01-08
AU1863488A (en) 1989-01-05
EP0301707B1 (en) 1996-01-17
KR890002765A (ko) 1989-04-11
EP0301707A2 (en) 1989-02-01
CN1030308A (zh) 1989-01-11
JPH0754467B2 (ja) 1995-06-07
IE75357B1 (en) 1997-08-27
JPH0192843A (ja) 1989-04-12
BR8803378A (pt) 1989-01-24
CN1016905B (zh) 1992-06-03
CA1302579C (en) 1992-06-02
DE3854905D1 (de) 1996-02-29
AU626263B2 (en) 1992-07-30

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