IL46404A - Supervision of pcm repeater lines - Google Patents

Description

This' invention relates to transmission systems, and, is more particularly concerned with a transmission system having a plurality of transmission channels via which pulse-code modulated signals are transmitted from a first end exchange via intermediate stations provided with regenerators to a second end exchange and including' means for locating faults in the system, said means comprising demodulators and associated band pass filter of different pass frequencies provided in respective intermediate stations and means for transmitting from the first end exchange a first pulse which consists of a sequence of pulse code elements, modulated in such manner that during a period of several pulse frames the frequency of the envelope curve of the transmitted signal corresponds to the pass frequency of one of the band pass filters thereby to test the intermediate station in which the relevant band pass filter is provided, the arrangement being such that the demodulated output signal of the regenerator of each intermediate station is fed to the relevant, band pass filter and the' occurrence, of a signal at the output of a band pass filter is signalled to the first or second end exchange to trigger an analysis process employing a second pulse which at least partly corresponds to the transmitted first- pulse.

A system of this kind is known from German Patent No. 1 298 55.3 in which, on the occurrence of a signal at the output of a band-pass filter, in the corresponding inter^ mediate station a loop closure between two .transmission, paths is produced by' means of a switching device, or the signal is transmitted via an auxiliary line to the end exchange at which testing is effected.

From German Patent No. 2.21.5 836 it is further known to compare a first test pulse pattern which passes via a loop terminal to the resting end exchange with' a second test pulse pattern corresponding to th'e original first test pulse pattern which has not been transmitted. , .

From this patent and from the magazine "Archiv fuer technisches Messen. ATM", Ed. V 3718-9 (nov. 1971) p. 217 to 218 Section 3.3 it is further known in a fault locating process of this kind to employ a test pulse pattern whose bit repetition frequency corresponds to that of the normal data flow and which contains a synchronising word which consists of pulse code element pairs "11" and "00" which are interposed in alternating sequence between equal numbers of modulatable pulse code elements.

This invention seeks to provide a system including means for producing a test pulse pattern of this kind.

According to this ' invention there is provided a transmission system having a plurality of transmission channels via which pulse-code-modulated signals are transmitted from a first end exchange -via intermediate stations provided with regenerators to a second end exchange and including means for locating faults in the system, said means comprising demodulators and associated band pass filters of different pass frequencies provided in respective intermediate station's and means for transmitting from the first- end exchange a first pulse which consists of a sequence of pulse code elements, modulated in such manner that during a period of several pulse frames the frequency of the envelope curve of the transmitted- signal corresponds to the pass frequency of one of the band pass filters thereby to test the intermediate station in which' the relevant band pass filter is . provided., the arrangement being such that the demodulated output signal of the regenerator of each intermediate station is fed to the. relevant band pass filter and the occurrence of a signal at the output of a band pass filter is signalled to the first or second end exchange to. trigger an analysis process employing a second pulse which at. least partly corresponds to the transmitted first pulse, wherein for the production of the first pulse and/or the second pulse there is provided a test pulse pattern generator comprising a fundamental pulse pattern generator, a binary counter, means for setting 'said counter to a selected numerical value whereby in operation the counter counts from ■ the set numerical value to a final value, a rectangular waveform voltage generator which is responsive to the counter reaching the final value and which serves in operation to produce a frequency corresponding to the pass frequency of a selected one of the band pass filters and to modulate the fundamental pulse pattern generator with said · frequency , and a pulse generator for .supplying control pulses to hO fundamental pulse pattern generator, the counter, and the rectangular waveform' generator. ■ If the rectangular waveform voltage is to have a keying ratio which is not equal . to 1:1, then preferably the rectangular · waveform voltage generator has a first control output, an output voltage at which is arranged to interrupt the counting process of the counter alternatively by n_ and n+1 bits when the final value has been' reached, where n_ is an integer. In this case the rectangular waveform voltage per period can be displaced by an odd number of bits in relation to the synchronising word.

If the rectangular waveform voltage is alternatively to have a keying ratio of 1:1, preferably a .switch is-provided for causing the output voltage at the first control output of the rectangular waveform voltage generator to be such that the counting process of the counter is interrupted by the same number of bits whenever the final value has been reached.

In order to gate in fault bits into the test pulse pattern in a determinate fashion for pjrposes of internal device testing, preferably the rectangular waveform voltage generator has a second control output at which a pulse occurs whenever the counting process of the counter is interrupted, an OR gate being provided having one input connected .to the second control output, another input connected, via a switch to a common potential, and an output connected to an input of the fundamental pulse pattern generator which i ^ut serves to gate fault bits into the first pulse. Then only the adulterated synchronising bits are analysed as faults.

The secondend exchange may also include a regenerator and, for testing the second end exchange, may also be provided with a demodulator and an associated band pass filter.

The invention will be further understood from the following description with reference to the accompanying drawings, in which :- Figure 1 shows by way of example parts of a .transmission system in accordance with one embodiment of the invention; . Figure 2 shows by way of example parts of a transmission system in accordance with another embodiment of the invention and in which the test pulse pattern is transmitted from one end exchange and analysed in another end exchange; Figure 3 shows by way of example parts of a transmission system in accordance with another embodiment of the invention and in which the output signal of a band pass filter is conducted via an auxiliary line to the testing end exchange; Figure 4 shows a block circuit diagram of one form of test pulse pattern generator which may be used in a transmission system in accordance with the invention; Figure 5 illustrates an exemplary embodiment of a fundamental pulse pattern generator of the'.test pulse pattern generator shown in Figure 4; Figure 6 shows an exemplary embodiment of a low frequency rectangular waveform voltage generator' of the test pulse pattern generator shown in- Figure 4; and ·.,_> Figure 7 shows a pulse diagram in explanation of the mode of operation of. the test pulse pattern generator shown in Figures 4 to 6. - Figure 1 illustrates the testing end exchange 1 of a transmission system operating with pulse code modulation in both directions of transmission, as well as an intermediate station 8 which is located on the transmission link comprising . lines 6 and 7 and which is -to be tested.

In the end exchange 1 a first test pulse pattern generator 18 and a source (not shown) of items of data which are to be transmitted can be alternatively connected to the outgoing line 6 by means of a change-over switch 14. The first test pulse pattern generator 18 consists of ( a modulation device 3, a rectangular waveform voltage source 2, a fundamental pulse pattern generator 15 and an odd-numbered divider 17.

A pulse comparison device' 4 is fed on the one hand from the incoming line 7 and on the other hand from a second test pulse pattern generator 16 which produces either the entire test pulse pattern or only a synchronising word thereof. The result of the comparison is indicated by a display device 5.

. The intermediate station 8 possesses a regenerator 9 for the direction of transmission to be. considered as the transmitting direction in terms of the testing end exchange 1 and a furthe ' regenerator 13 for the. other direction of transmission. The output of the regenerator 9 is connected via a demodulator circuit 10 to the input of a band pass filter 11 whose pass frequency is characteristic of the intermediate station 8. The output of' the band pass filter 11 feeds a switching device 12 which -is responsive to the low frequency rectangular waveform · voltage to establish a connection between the output of the regenerator 9 and the input of the further regenerator. 13. The switching device 12 can, in the simplest situation, be in the form of a relay fed via a rectifier, but in practice it would normally •be in the form of an electronic switch in order to avoid mechanical contacts.

The arrangement shown in Figure 1 operates in the following manner. The fundamental pulse pattern generator 15 feeds into the modulation device 3 a fundamental pulse pattern whose bit repetition frequency corresponds to that of the normal data flow and which contains a synchronising word composed of pairs of pulse code elements "11" and "00" interposed in alternating sequence between in each case an equal number of modulatable pulse code elements. The frequency of the rectangular waveform voltage source 2 is set to the pass frequency of the band pass filter of the intermediate station 8. The transmission link includes several intermediate stations which are similar to one another except that each has its own characteristic pass frequency determined by the pass band of its band pass filter. The rectangular waveform voltage source 2 is such that its frequency can be set to any particular one of the pass \_' frequencies. In the modulation device 3 the modulatable pulse code elements, but not the .synchronising pulse elements, of the fundamental pulse pattern are 100% amplitude-modulated with the rectangular test signal from the rectangular waveform voltage source 2. On the outgoing line 6, in-accordance with the frequency of the rectangular waveform voltage source 2, pulse packets are consequently produced which have the low frequency rectangular waveform agnal as an envelope and whose frequency spectrum is symmetrically arranged about the bit repetition frequency (or, in the case of bipolar pulse transmission symmetrically about half the bit repetition frequency). The low frequency rectangular waveform . signal is regained from the output of the renegera-tor 9 by rectification with the aid of the demodulator circuit 10. In the event that the fundamental frequency of the rectangular waveform test signal agreed with the pass · frequency of the band pass filter 11, the switching device 12 connected to the filter output responds and establishes a loop closure between the two transmission directions between the output of the regenerator 9 and the input of the further regenerator 13. Therefore through the selection of. the frequency of the test signal it is possible to individually operate any intermediate station or an end exchange if this is similarly provided with a demodulator circuit, a band pass filter, and a switching device, on the transmission link from the test end exchange 1..

The pulse comparator device 4 receives the test pu^\e pattern of the test pulse pattern generator 18 via the incoming line 7 and .also receives the test pulse pattern or fundamental pulse pattern of the pulse pattern generator 16, ■ this being synchronised with the test pulse pattern of the pulse pattern generator 18. Any difference between the compared pulse patterns results in a signal indicating a fault being · applied' to the display device 5, which, displays the fault rate. Following the analysis of the fault rate for transmission as far as a particular intermediate station, either the rectangular waveform voltage source 2 can be switched' to another frequency corresponding to another intermediate station or the position of the change-over switch 14 can be changed from that shown in Figure 1 to revert to1 normal operation.

Figure 2 illustrates the transmitting-end end exchange 1, an intermediate station 8_a which is to be tested, and the receiving-end end exchange la of a transmission system operating with pulse code modulation and having two parallel transmission paths 6 and 7a_ operated in the same direction. The transmission system differs from that shown in Figure 1 in that in the end exchange 1 the pulse comparator device 4, the second test pulse pattern and fundamental pulse pattern generator 16 and the display device 5 are missing,- whereas ins tead a 'pulse comparator ' device 4a_, a second test- pulse pattern and fundamental pulse pattern generator 16a_ and a display device 5_a are provided in the other end exchange la. The further regenerator 13a_ is arranged in the intermediate station 8a_ in the opposite direction.

The mode of operation of the arrangement shown in Figure 2 is similar to that of the arrangement shown in Figure' 1. However, in this case the fault rate displayed by the display device 5_a or the setting of the rectangular waveform voltage source 2 in the generator 18 must be reported to the particular other end exchange 1, la.

In the case of a fixed test pulse pattern there is always the danger that the intermediate regenerators will be synchronised to one of the side frequencies of the bit repetition frequency. In addition different fault sources cannot be recognised because with a fixed test programme the same pulse configurations always follow one another.

These disadvantages can be avoided particularly simply if the fundamental frequency is derived from the bit repetition frequency by means of the odd-numbered divider 17. As the synchronising word "11".... "00" in' the first test pulse pattern generator 18 must be derived by an even-numbered division from the bit repetition frequency, on the outgoing line pulse packets will then be formed which have the low frequency rectangular waveform signal as an envelope and on which the synchronising word is superimposed in such manner that the pulses of the synchronising word pass- through the envelope. In the case of any particular'-pair of synchronising elements "11" and "00", therefore, during the test programme, the modulation state of the previously transmitted pulses changes. ^ Figure 3 illustrates a transmission system for pulse code modulation, provided with a device for determining faults, with only one transmission direction. As a modification of the arrangement, shown in Figure 1, the output of the band pass filter 11 in the intermediate station 8 is in this case connected via an auxiliary line 14 directly to the display device 5 in the end exchange 1.

In the event of agreement between the frequency of the rectangular waveform voltage source 2 and the pass frequency of the band pass filter 11, at the latter's output there appears a signal which is conducted back to the testing end exchange 1 via the auxiliary line 14 and is analysed in the display device 5 in terms of amplitude.

By the systematic operation of a plurality of intermediate stations 8, with the aid of the display device 5 in the testing end exchange 1, a possible fault cannot only be located but, by the comparison of the incoming amplitudes, a certain quality control of the individual regenerators can also be' effected; Figure 4 shows in more detail one form of the test pulse pattern generator 18 illustrated in Figures 1 to 3.

This generator contains first switches 19, one for each of the intermediate stations on the transmission link, a gate circuit 20, a counter 21, a fundamental pulse pattern generator 22 with terminals. 28,· 29, 30, 35, a low frequency rectangular waveform generator 24 with terminals 31 to ,36, a pulse train supply 23, an OR gate 25, a second switch- ^ 26, and a third switch 27.

Figure 5 shows- a detailed exemplary embodiment of the fundamental pulse pattern generator 22. The latter contains JK flip-flops 37 to 39, an AND gate 40 a NAND gate 4-3, OR gates 41 and 42, an inverter 44, and a D-f lip-flop 45.

Figure 6 shows in detail an exemplary embodiment of the low frequency rectangular waveform- generator 24. The latter contains a D-flip-flop 46, a JK' flip-flop 47, an AND gate 48, a NAND gate 49, and a NOR gate 50.

Figure 7 shows pulses a_ to _e which occur on the correspondingly designated lines in Figures 4 to 6.

The mode of operation of the test pulse pattern, generator represented in Figures 4 to 6 is as follows : In dependence upon which of the (in this case) nine intermediate . stations which are to be tested is to be operated, in the arrangement shown in Figure 4 one of the first switches 19 is closed as a result of which by means of the gate circuit 20 a specific digit sequence is input into the counter 21. The counter 21 is pulsed with a pulse train b_ of the pulse generator 23 and, after a start' signal, counts on from the preset value until it has reached its final value. Then it emits a pulse c_ to the input 31 of the low frequency rectangular waveform voltage generator 24 which is likewise controlled by the pulse generator 23 and is illustrated in detail in Figure 6.· The pulse c_ produces a "1" state at the D input of the D flip-flop 46. At the same time the output 32 of the NOR gate 50 assumes a "0" state as a result of which the counter 21 is stopped. With the next positive flank of the pulse' rain, the counter 21 is again set to the preset value and the D flip-flop 46 is triggered as a result of which its output assumes the state "1" (pulse d_) . In dependence upon which state the JK flip-flop 47 is in, the D flip-flop 46 is immediately reset (after the transit times of the AND gate 48, the NAND gate 49, and the D flip-flop 46) or is reset after one'pulse train period. If the D flip-flop 46 is immediately reset, the pulse e_ at the output 32 of the NOR gate 50 lasts for one pulse train period. Otherwise it lasts for two pulse- train periods, because the state "0" at the D input of the D flip-flop 46 cannot be transferred until the next positive flank of the pulse train.., This produces ah odd division ratio via the counter 21 and the counter is interrupted after the reaching of a final value alternately for n_ or n+ bits, where _n is an integer.

If the switch 26 is closed, the counting process of the counter 21 is interrupted by the same number' of bits when the final value has been reached as a result of which, for test purposes, there is a keying ratio of 1:1 of the low frequency emitted at the output 35.

The fundamental pulse generator 22 which is illustrated in detail in Figure 5 is operated by the pulse generator 23 and produces a synchronising word llXXOOXXllXXOOXXll , . wherein the modulatable elements X are modulated via the" terminal 35 with the low frequency produces, by the low frequency rectangular waveform voltage generator 24. The synchronising word is produced by even-numbered division of the pulse train _a with a three-stage synchronising divider consisting of the J f lip-flops ' 37 , 38 and 39. The outputs 38Q, 38Q" and 39Q and the input 35 are interconnected via the OR gates 41 and 42 in such manner that the' desired test pulse pattern occurs at the output of the NAND gate 43.

The test pulse pattern is. pulsed once more in the.D flip-flop- 45 in order to eliminate transit times between pulse train and test pulse pattern. As the synchronising word is formed by even-numbered division of the pulse train a_, this word is displaced in relation to the low frequency period. This measure is expedient to avoid mis-synchronisations of the intermediate amplifiers and to. provide the fault locating signal with a random character.

The switch 27 and the OR gate 25 serve to gate in fault bits in a determinate fashion into the test pulse pattern (broken lines in Figure 7), wherein only the adulterated synchronising bits are analysed as faults.

The principle of this gating-in is that within a specific ■period of time bits are gated out of the pulse-code-modulated signal. For this purpose the output "Q of the D flip-flop 46 is employed. These pulses e_ alternately last for one pulse train period or lie in the range of gate tra.nsit times.

It will be seen from the pulse diagrams in Figure 7~ that'only the pulses which last for one pulse train period can be recognised as faults. From this fact and in that the low frequency is displaced bit-wise in relation to the synchronising word it will be seen that within eight low frequency periods in each case two consecutive bits are gated out of the synchronising word bits of the .pulse-code modulated signal, i.e. are adulterated. The fault rate, which is dependent upon the set address, can be determined by comparison with the synchronising word produced in the test pulse pattern generators 16 or 16_a.

The finished test pulse pattern. is available at the output 30 of the fundamental pulse pattern generator 22.

Claims (8)

WHAT WE CLAIM IS :-

1. A transmission system having a plurality of transmission channels via which pu lse-code-modulated signals are transmitted from a first end exchange via intermediate stations provided with regenerators to a second end exchange and including means for locating faults in the system, said means comprising demodulators and associated band pass filters of different pass frequencies provided in respective intermediate stations and means for transmitting from the first end exchange a first pulse which consists of a sequence of pulse code elements, modulated in such manner that during ' a period of several pulse frames the frequency of the envelope curve of the transmitted signal corresponds to the pass frequency of one of the band pass filters thereby to test the intermediate station in which the relevant band pass filter is provided, the arrangement being such that the demodulated output signal of the regenerator of each intermediate station is fed to the relevant band pass filter and the occurrence of a signal at the output of a band pass filter is signalled to the first or second end exchange to trigger an analysis process employing a second pulse which at least partly corresponds to the transmitted first pulse, wherein for the production of the first pulse and/or the second pulse, there is provided a test pulse pattern generator comprising a fundamental pulse pattern generator, a binary counter', means for setting said counter to a selected numerical value whereby in operation the counter counts from the set numerical value to a final value, a rectangular waveform voltage generator which is responsive to the counter reaching the final value and which serves in operation to produce a frequency corresponding to the pass frequency of a selected one of the band pass filters and to modulate the fundamental pulse pattern generator with said frequency, and a pulse generator for supplying control pulses, to the fundamental pulse pattern generator, the counter, and the rectangular waveform generator.

2. A system as claimed in Claim 1 wherein the rectangular waveform voltage generator has a first control output an output voltage at which is arranged to interrupt the counting process of the counter alternatively by n_ and n+1 bits when the final value has been reached, where n_ is an integer.

3. A system as claimed in Claim 2, wherein a switch is provided for causing the output voltage at the first control output of the rectangular waveform voltage generator to be such that the counting process of the counter is interrupted by the same number of bits whenever the final Value has been reached.

4. A system as claimed in any of the preceding Claims wherein the rectangular waveform voltage generator has a second control output at which a pulse occurs whenever the counting process of the counter is interrupted, and wherein and OR gate is provided having one input connected to the second control output, another input connected via a switch to a common potential, and an output connected to an input of the fundamental pulse pattern generator which input serves to gate fault bits into the first pulse.

5. A transmission system as claimed in any of the preceding Claims wherein the second end exchange also includes a regenerator and, for testingthe second end exchange, is also provided with a demodulator and an associated band pass filter.

6. A transmission system substantially as herein described with reference to Figure 1 and Figures 4 to 7 of the accompanying drawings.

7. A transmission system substantially as herein described with- reference to Figure 2 and Figures 4 to 7 of the accompanying drawings.

8. A transmission. system substantially as herein described with reference to Figure 3 and Figures 4' to 7 of the accompanying drawings. pp!icanh -19- LO OHH A O PABl