IL316108A - Parameter lock mode abnormal return - Google Patents

Parameter lock mode abnormal return

Info

Publication number
IL316108A
IL316108A IL316108A IL31610824A IL316108A IL 316108 A IL316108 A IL 316108A IL 316108 A IL316108 A IL 316108A IL 31610824 A IL31610824 A IL 31610824A IL 316108 A IL316108 A IL 316108A
Authority
IL
Israel
Prior art keywords
return state
state lock
exception return
lock parameter
parameter
Prior art date
Application number
IL316108A
Other languages
English (en)
Hebrew (he)
Inventor
Simon John Craske
John Michael Horley
Original Assignee
Advanced Risc Mach Ltd
Simon John Craske
John Michael Horley
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Risc Mach Ltd, Simon John Craske, John Michael Horley filed Critical Advanced Risc Mach Ltd
Publication of IL316108A publication Critical patent/IL316108A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
IL316108A 2022-04-28 2023-03-17 Parameter lock mode abnormal return IL316108A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB2206164.2A GB2618116B (en) 2022-04-28 2022-04-28 Exception return state lock parameter
PCT/GB2023/050653 WO2023209323A1 (en) 2022-04-28 2023-03-17 Exception return state lock parameter

Publications (1)

Publication Number Publication Date
IL316108A true IL316108A (en) 2024-12-01

Family

ID=81940401

Family Applications (1)

Application Number Title Priority Date Filing Date
IL316108A IL316108A (en) 2022-04-28 2023-03-17 Parameter lock mode abnormal return

Country Status (9)

Country Link
US (1) US20250284495A1 (enExample)
EP (1) EP4515405B1 (enExample)
JP (1) JP2025514826A (enExample)
KR (1) KR20250002608A (enExample)
CN (1) CN119072684A (enExample)
GB (1) GB2618116B (enExample)
IL (1) IL316108A (enExample)
TW (1) TW202409842A (enExample)
WO (1) WO2023209323A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20230237156A1 (en) * 2022-01-27 2023-07-27 Cypress Semiconductor Corporation System and method for storing system state data in a hardware register
US20250390371A1 (en) * 2024-06-21 2025-12-25 Advanced Micro Devices, Inc. Core isolation for errors
KR20260010199A (ko) * 2024-07-12 2026-01-20 삼성전자주식회사 프로세스를 실행하는 방법, 이를 지원하는 전자 장치, 및 저장 매체
GB2702303A (en) * 2024-11-01 2026-06-10 Advanced Risc Mach Ltd System register lockdown control register

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7581089B1 (en) * 2006-04-20 2009-08-25 The United States Of America As Represented By The Director Of The National Security Agency Method of protecting a computer stack
US8245002B2 (en) * 2008-10-08 2012-08-14 International Business Machines Corporation Call stack protection
US9239801B2 (en) * 2013-06-05 2016-01-19 Intel Corporation Systems and methods for preventing unauthorized stack pivoting
US9390264B2 (en) * 2014-04-18 2016-07-12 Qualcomm Incorporated Hardware-based stack control information protection
US9501637B2 (en) * 2014-09-26 2016-11-22 Intel Corporation Hardware shadow stack support for legacy guests
US9606855B1 (en) * 2016-01-06 2017-03-28 International Business Machines Corporation Caller protected stack return address in a hardware managed stack architecture
US10157268B2 (en) * 2016-09-27 2018-12-18 Microsoft Technology Licensing, Llc Return flow guard using control stack identified by processor register
GB2563888B (en) * 2017-06-28 2020-03-18 Advanced Risc Mach Ltd Sub-realms
US10768937B2 (en) * 2018-07-26 2020-09-08 Advanced Micro Devices, Inc. Using return address predictor to speed up control stack return address verification
US11294682B2 (en) * 2019-05-20 2022-04-05 Microsoft Technology Licensing, Llc Stack traces using shadow stack
US11500981B2 (en) * 2020-03-24 2022-11-15 Microsoft Technology Licensing, Llc Shadow stack enforcement range for dynamic code

Also Published As

Publication number Publication date
KR20250002608A (ko) 2025-01-07
EP4515405A1 (en) 2025-03-05
GB2618116B (en) 2025-10-22
GB202206164D0 (en) 2022-06-15
EP4515405B1 (en) 2026-04-29
JP2025514826A (ja) 2025-05-09
WO2023209323A1 (en) 2023-11-02
CN119072684A (zh) 2024-12-03
GB2618116A (en) 2023-11-01
TW202409842A (zh) 2024-03-01
US20250284495A1 (en) 2025-09-11

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