IL273129A - Permitting unaborted processing of transaction after exception mask update instruction - Google Patents
Permitting unaborted processing of transaction after exception mask update instructionInfo
- Publication number
- IL273129A IL273129A IL273129A IL27312920A IL273129A IL 273129 A IL273129 A IL 273129A IL 273129 A IL273129 A IL 273129A IL 27312920 A IL27312920 A IL 27312920A IL 273129 A IL273129 A IL 273129A
- Authority
- IL
- Israel
- Prior art keywords
- unaborted
- transaction
- permitting
- processing
- update instruction
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/466—Transaction processing
- G06F9/467—Transactional memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1474—Saving, restoring, recovering or retrying in transactions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/3009—Thread control instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/466—Transaction processing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4818—Priority circuits therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4825—Interrupt from clock, e.g. time of day
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4831—Task transfer initiation or dispatching by interrupt, e.g. masked with variable priority
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Multimedia (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP17386031.3A EP3462312B1 (en) | 2017-09-29 | 2017-09-29 | Permitting unaborted processing of transaction after exception mask update instruction |
PCT/EP2018/072495 WO2019063200A1 (en) | 2017-09-29 | 2018-08-21 | Permitting unaborted processing of transaction after exception mask update instruction |
Publications (3)
Publication Number | Publication Date |
---|---|
IL273129A true IL273129A (en) | 2020-04-30 |
IL273129B1 IL273129B1 (en) | 2023-12-01 |
IL273129B2 IL273129B2 (en) | 2024-04-01 |
Family
ID=60143663
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IL273129A IL273129B2 (en) | 2017-09-29 | 2018-08-21 | Permitting unaborted processing of transaction after exception mask update instruction |
Country Status (8)
Country | Link |
---|---|
US (1) | US11663034B2 (en) |
EP (1) | EP3462312B1 (en) |
JP (1) | JP7136888B2 (en) |
KR (1) | KR102599689B1 (en) |
CN (1) | CN111133418B (en) |
IL (1) | IL273129B2 (en) |
TW (1) | TWI786181B (en) |
WO (1) | WO2019063200A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11194584B1 (en) * | 2019-07-19 | 2021-12-07 | Marvell Asia Pte, Ltd. | Managing out-of-order retirement of instructions |
EP4338625A1 (en) | 2021-05-10 | 2024-03-20 | Japan Tobacco, Inc. | Power supply unit for aerosol generation device |
WO2022239513A1 (en) | 2021-05-10 | 2022-11-17 | 日本たばこ産業株式会社 | Power supply unit for aerosol generation device |
JPWO2022239515A1 (en) | 2021-05-10 | 2022-11-17 | ||
EP4338618A1 (en) | 2021-05-10 | 2024-03-20 | Japan Tobacco, Inc. | Power supply unit for aerosol production device |
Family Cites Families (33)
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CA1105069A (en) * | 1976-04-15 | 1981-07-14 | John W. Daughton | Control system for electrostatographic machines |
JPS63238630A (en) * | 1987-03-26 | 1988-10-04 | Toshiba Corp | Interruption controller for microprocessor |
US6024486A (en) * | 1996-06-05 | 2000-02-15 | Compaq Computer Corporation | Data error detection and correction |
US6173248B1 (en) * | 1998-02-09 | 2001-01-09 | Hewlett-Packard Company | Method and apparatus for handling masked exceptions in an instruction interpreter |
FR2775370B1 (en) * | 1998-02-20 | 2001-10-19 | Sgs Thomson Microelectronics | METHOD FOR MANAGING INTERRUPTIONS IN A MICROPROCESSOR |
JP3600095B2 (en) * | 1999-12-07 | 2004-12-08 | 松下電器産業株式会社 | Interrupt management device and interrupt management method |
US7882339B2 (en) * | 2005-06-23 | 2011-02-01 | Intel Corporation | Primitives to enhance thread-level speculation |
JP4971676B2 (en) * | 2006-04-28 | 2012-07-11 | ルネサスエレクトロニクス株式会社 | Interrupt control circuit and interrupt control method |
US7792805B2 (en) * | 2006-05-30 | 2010-09-07 | Oracle America, Inc. | Fine-locked transactional memory |
US8914620B2 (en) * | 2008-12-29 | 2014-12-16 | Oracle America, Inc. | Method and system for reducing abort rates in speculative lock elision using contention management mechanisms |
JP5214537B2 (en) * | 2009-05-25 | 2013-06-19 | 株式会社東芝 | Multiprocessor system |
US8225139B2 (en) * | 2009-06-29 | 2012-07-17 | Oracle America, Inc. | Facilitating transactional execution through feedback about misspeculation |
US9477515B2 (en) * | 2009-12-15 | 2016-10-25 | Intel Corporation | Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode |
US20120227045A1 (en) * | 2009-12-26 | 2012-09-06 | Knauth Laura A | Method, apparatus, and system for speculative execution event counter checkpointing and restoring |
US8438568B2 (en) * | 2010-02-24 | 2013-05-07 | International Business Machines Corporation | Speculative thread execution with hardware transactional memory |
WO2013115816A1 (en) * | 2012-02-02 | 2013-08-08 | Intel Corporation | A method, apparatus, and system for speculative abort control mechanisms |
US9256369B2 (en) * | 2012-04-18 | 2016-02-09 | Samsung Electronics Co., Ltd. | Programmable memory controller |
US9361115B2 (en) | 2012-06-15 | 2016-06-07 | International Business Machines Corporation | Saving/restoring selected registers in transactional processing |
US9442737B2 (en) * | 2012-06-15 | 2016-09-13 | International Business Machines Corporation | Restricting processing within a processor to facilitate transaction completion |
US9348642B2 (en) | 2012-06-15 | 2016-05-24 | International Business Machines Corporation | Transaction begin/end instructions |
US9740549B2 (en) * | 2012-06-15 | 2017-08-22 | International Business Machines Corporation | Facilitating transaction completion subsequent to repeated aborts of the transaction |
GB2499277B (en) | 2012-08-30 | 2014-04-02 | Imagination Tech Ltd | Global register protection in a multi-threaded processor |
US9081607B2 (en) * | 2012-10-24 | 2015-07-14 | International Business Machines Corporation | Conditional transaction abort and precise abort handling |
KR20150123922A (en) | 2013-03-07 | 2015-11-04 | 미쓰비시덴키 가부시키가이샤 | Engineering tool |
US9824039B2 (en) * | 2013-09-09 | 2017-11-21 | International Business Machines Corporation | Signal interrupts in a transactional memory system |
US9348522B2 (en) * | 2013-12-12 | 2016-05-24 | International Business Machines Corporation | Software indications and hints for coalescing memory transactions |
US9146774B2 (en) * | 2013-12-12 | 2015-09-29 | International Business Machines Corporation | Coalescing memory transactions |
US9207967B2 (en) * | 2014-01-07 | 2015-12-08 | Red Hat, Inc. | Using nonspeculative operations for lock elision |
US9465673B2 (en) * | 2014-02-27 | 2016-10-11 | International Business Machines Corporation | Deferral instruction for managing transactional aborts in transactional memory computing environments to complete transaction by deferring disruptive events handling |
US9817693B2 (en) | 2014-03-14 | 2017-11-14 | International Business Machines Corporation | Coherence protocol augmentation to indicate transaction status |
JP6438353B2 (en) | 2015-05-27 | 2018-12-12 | ルネサスエレクトロニクス株式会社 | Semiconductor device and diagnostic test method |
US9952895B2 (en) * | 2015-06-27 | 2018-04-24 | Vmware, Inc. | Implementing pseudo non-masking interrupts behavior using a priority interrupt controller |
US20170177338A1 (en) * | 2015-12-18 | 2017-06-22 | International Business Machines Corporation | Management of asynchronous interrupts in a transactional memory multiprocessor environment |
-
2017
- 2017-09-29 EP EP17386031.3A patent/EP3462312B1/en active Active
-
2018
- 2018-08-21 WO PCT/EP2018/072495 patent/WO2019063200A1/en active Application Filing
- 2018-08-21 CN CN201880060737.9A patent/CN111133418B/en active Active
- 2018-08-21 JP JP2020516676A patent/JP7136888B2/en active Active
- 2018-08-21 US US16/651,017 patent/US11663034B2/en active Active
- 2018-08-21 KR KR1020207010275A patent/KR102599689B1/en active IP Right Grant
- 2018-08-21 IL IL273129A patent/IL273129B2/en unknown
- 2018-09-11 TW TW107131812A patent/TWI786181B/en active
Also Published As
Publication number | Publication date |
---|---|
JP7136888B2 (en) | 2022-09-13 |
US11663034B2 (en) | 2023-05-30 |
IL273129B2 (en) | 2024-04-01 |
KR102599689B1 (en) | 2023-11-08 |
JP2020535512A (en) | 2020-12-03 |
CN111133418B (en) | 2023-12-22 |
WO2019063200A1 (en) | 2019-04-04 |
IL273129B1 (en) | 2023-12-01 |
US20200278882A1 (en) | 2020-09-03 |
EP3462312A1 (en) | 2019-04-03 |
KR20200061361A (en) | 2020-06-02 |
TWI786181B (en) | 2022-12-11 |
TW201915761A (en) | 2019-04-16 |
CN111133418A (en) | 2020-05-08 |
EP3462312B1 (en) | 2022-08-17 |
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