IL173341A0 - Chip attack protection - Google Patents

Chip attack protection

Info

Publication number
IL173341A0
IL173341A0 IL173341A IL17334106A IL173341A0 IL 173341 A0 IL173341 A0 IL 173341A0 IL 173341 A IL173341 A IL 173341A IL 17334106 A IL17334106 A IL 17334106A IL 173341 A0 IL173341 A0 IL 173341A0
Authority
IL
Israel
Prior art keywords
attack protection
chip attack
chip
protection
attack
Prior art date
Application number
IL173341A
Original Assignee
Nds Ltd
John Walker
Itsik Mantin
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nds Ltd, John Walker, Itsik Mantin filed Critical Nds Ltd
Priority to IL173341A priority Critical patent/IL173341A0/en
Priority to PCT/IL2006/001421 priority patent/WO2007086046A2/en
Priority to EP13163271.3A priority patent/EP2615641B1/en
Priority to CN2010105269660A priority patent/CN102063584B/en
Priority to EP06821637.3A priority patent/EP1977481B1/en
Priority to CN200680053967XA priority patent/CN101501840B/en
Priority to US12/087,942 priority patent/US7966666B2/en
Publication of IL173341A0 publication Critical patent/IL173341A0/en
Priority to IL192916A priority patent/IL192916A/en
Priority to HK09109565.7A priority patent/HK1129772A1/en
Priority to HK11111411.5A priority patent/HK1157508A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73257—Bump and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
IL173341A 2006-01-24 2006-01-24 Chip attack protection IL173341A0 (en)

Priority Applications (10)

Application Number Priority Date Filing Date Title
IL173341A IL173341A0 (en) 2006-01-24 2006-01-24 Chip attack protection
PCT/IL2006/001421 WO2007086046A2 (en) 2006-01-24 2006-12-11 Chip attack protection
EP13163271.3A EP2615641B1 (en) 2006-01-24 2006-12-11 Chip attack protection
CN2010105269660A CN102063584B (en) 2006-01-24 2006-12-11 Chip attack protection
EP06821637.3A EP1977481B1 (en) 2006-01-24 2006-12-11 Chip attack protection
CN200680053967XA CN101501840B (en) 2006-01-24 2006-12-11 Chip attack protection
US12/087,942 US7966666B2 (en) 2006-01-24 2006-12-11 Chip attack protection
IL192916A IL192916A (en) 2006-01-24 2008-07-20 Chip attack protection
HK09109565.7A HK1129772A1 (en) 2006-01-24 2009-10-15 Chip attack protection
HK11111411.5A HK1157508A1 (en) 2006-01-24 2011-10-24 Chip attack protection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IL173341A IL173341A0 (en) 2006-01-24 2006-01-24 Chip attack protection

Publications (1)

Publication Number Publication Date
IL173341A0 true IL173341A0 (en) 2007-03-08

Family

ID=40947472

Family Applications (1)

Application Number Title Priority Date Filing Date
IL173341A IL173341A0 (en) 2006-01-24 2006-01-24 Chip attack protection

Country Status (2)

Country Link
CN (1) CN101501840B (en)
IL (1) IL173341A0 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10678951B2 (en) * 2011-10-24 2020-06-09 Maxim Integrated Products, Inc. Tamper detection countermeasures to deter physical attack on a security ASIC
FR3053503B1 (en) * 2016-06-30 2019-03-29 Stmicroelectronics (Rousset) Sas METHOD FOR PROTECTING AN INTEGRATED CIRCUIT, AND CORRESPONDING INTEGRATED CIRCUIT

Also Published As

Publication number Publication date
CN101501840B (en) 2010-12-01
CN101501840A (en) 2009-08-05

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