IE831135L - A circuit - Google Patents
A circuitInfo
- Publication number
- IE831135L IE831135L IE113583A IE113583A IE831135L IE 831135 L IE831135 L IE 831135L IE 113583 A IE113583 A IE 113583A IE 113583 A IE113583 A IE 113583A IE 831135 L IE831135 L IE 831135L
- Authority
- IE
- Ireland
- Prior art keywords
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8208546A FR2527031A1 (en) | 1982-05-17 | 1982-05-17 | CIRCUIT FOR ACQUIRING THE CLOCK OF A BINARY MESSAGE CODE IN NRZ |
Publications (2)
Publication Number | Publication Date |
---|---|
IE831135L true IE831135L (en) | 1983-11-17 |
IE54411B1 IE54411B1 (en) | 1989-09-27 |
Family
ID=9274096
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IE113583A IE54411B1 (en) | 1982-05-17 | 1983-05-16 | A circuit for acquiring the clock of an nrz encoded binary message |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0095083B1 (en) |
DE (1) | DE3369620D1 (en) |
DK (1) | DK160171C (en) |
FR (1) | FR2527031A1 (en) |
GR (1) | GR78569B (en) |
IE (1) | IE54411B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4972444A (en) * | 1988-07-14 | 1990-11-20 | International Business Machines Corporation | Digital phase-locked device and method |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3851101A (en) * | 1974-03-04 | 1974-11-26 | Motorola Inc | Adaptive phase synchronizer |
FR2283592A1 (en) * | 1974-08-27 | 1976-03-26 | Thomson Csf | SYNCHRONIZATION EXTRACTOR AND INFORMATION TRANSMISSION SYSTEM INCLUDING SUCH A DEVICE |
FR2458181A1 (en) * | 1979-06-01 | 1980-12-26 | Thomson Csf | CLOCK SIGNAL SYNCHRONIZATION DEVICE AND SYNCHRONOUS DATA TRANSMISSION SYSTEMS INCLUDING SUCH A DEVICE |
-
1982
- 1982-05-17 FR FR8208546A patent/FR2527031A1/en active Granted
-
1983
- 1983-05-10 DE DE8383104577T patent/DE3369620D1/en not_active Expired
- 1983-05-10 EP EP19830104577 patent/EP0095083B1/en not_active Expired
- 1983-05-16 DK DK217383A patent/DK160171C/en not_active IP Right Cessation
- 1983-05-16 IE IE113583A patent/IE54411B1/en not_active IP Right Cessation
- 1983-05-17 GR GR71372A patent/GR78569B/el unknown
Also Published As
Publication number | Publication date |
---|---|
DE3369620D1 (en) | 1987-03-05 |
DK217383D0 (en) | 1983-05-16 |
FR2527031A1 (en) | 1983-11-18 |
IE54411B1 (en) | 1989-09-27 |
FR2527031B1 (en) | 1984-12-07 |
DK160171C (en) | 1991-07-01 |
DK160171B (en) | 1991-02-04 |
EP0095083A1 (en) | 1983-11-30 |
DK217383A (en) | 1983-11-18 |
EP0095083B1 (en) | 1987-01-28 |
GR78569B (en) | 1984-09-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Patent lapsed |