IE51441B1 - Equaliser - Google Patents
EqualiserInfo
- Publication number
- IE51441B1 IE51441B1 IE3098/85A IE309885A IE51441B1 IE 51441 B1 IE51441 B1 IE 51441B1 IE 3098/85 A IE3098/85 A IE 3098/85A IE 309885 A IE309885 A IE 309885A IE 51441 B1 IE51441 B1 IE 51441B1
- Authority
- IE
- Ireland
- Prior art keywords
- equalizer
- circuit
- equal
- loss
- nodes
- Prior art date
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- Filters And Equalizers (AREA)
Description
PATENT APPLICATION BY (71) RELIANCE ELECTRIC COMPANY, A CORPORATION ORGANISED AND EXISTING UNDER THE LAWS OF THE STATE OF DELAWARE, UNITED STATESOF AMERICA, OF 29325 CHAGRIN BOULEVARD, P.0. BOX 22280, CLEVELAND, OHIO 44122, UNITED STATES OF AMERICA.
Price 90p
This invention relates to an equalizer circuit for flattening or equalizing the signal frequency response across a pre-selected frequency band.
It is an object of the invention to provide an 5 equalizer set up to adjust the equalization directly in equal db increments to thereby simplify the equalization required in repeaters that are used with non-loaded cable. As compared with prior techniques, no conversion tables are required for converting into io db loss or gain because the adjustment provided by the equalizer of this invention is calibrated directly in equal db increments. Additionally, the equalizer of this invention requires relatively few switches for obtaining a satisfactory number of incremental' adjustments.
According to the present invention an equalizer for flattening a signal frequency response for a predetermined frequency range including first, second and common nodes and a frequency dependent loss20 producing circuit connected between said first and common nodes, said circuit having a plurality of binary weighted resistors and a plurality of selectively operable switches corresponding in number to the number of said binary weighted resistors and each connected to a .different associated one. of said binary weighted resistors to connect its associated binary weighted resistor into said circuit for establishing a number of equal db increments of loss, said equalizer
- 3 developing an output signal voltage across said common and second nodes in response to the application of an input signal voltage across said first and second nodes.
The invention is illustrated, by way of example in the Drawings, wherein:Figure 1 is a block diagram of the equalizer circuit of this invention; and
Figure 2 is a schematic diagram of the equalizer shown in Figure 1.
The adjustable frequency dependent equalizer 10 shown by Figures 1 and 2 is primarily intended to compensate for the frequency dependent signal response associated with non-loaded cable in a telephone communication system. Non-loaded cable, as distinguished from loaded cable, has more loss at high signal frequencies than at low signal frequencies.
This gives rise to the desirability of equalization to flatten the response in the pass band for the telephone communication system.
As shown equalizer 10 comprises a frequency dependent voltage divider 11 having a frequency dependent shunt impedance ZgH and a frequency independent series impedance Zg&. The series impedance ZgE is in series between the output of a clamping circuit (not shown) and the input of an amplifier (not shown) in a telephone transmission path. The shunt impedance ZgH is connected from the input of the amplifier to common. The divider’s output voltage VQut is taken across ground or common and the node 12 between impedance ZgE and Z^. The shunt impedance Zgy comprises an LC tank
- 4 circuit 13 in series with a resistor 14.
In the embodiment shown in Figure 2, the inductor for tank 13 is established by an active circuit 20 having an operational amplifier 21 with unity gain, resistors 22 and 23 and a capacitor 24. This active circuit is conventional. The capacitor for tank circuit 13 is indicated at 25 in Figure 2 and is in series with resistor 14 between the latter and ground or common.
As shown, resistor 22 is connected between resistor and the inverting input of amplifier 21, resistor is connected between ground or common and the non-inverting input of amplifier 21, and capacitor is connected between the non-inverting input of amplifier 21 and the node or juncture between resistor 14 and capacitor 25.
The series impedance Z^ in the embodiment consists of two series connected resistors 26 and 27. Manually operable switches 28 and 29 bridge resistors 26 and 27, respectively, to provide a selective adjustment of the series impedance Z^ for accommodating different lengths of unloaded cable.
The components of tank circuit 13 are selected to produce resonance and hence maximum impedance at about
2.8kHz or some other suitable out-of-band frequency.
The remaining components of equalizer 10 are selected to add the correct amount of loss at frequencies lower than the resonant frequency (2.8kHz in the embodiment) to make the loss for such lower frequencies adjustable relative to that of the resonant frequency without affecting the loss at the tank circuit's resonant frequency. In this way the frequency response of the combination of cable and the repeater for frequencies lower than the resonant frequency is flattened so that loss is substantially equal for frequencies equal to and less than the resonant frequency.
As is apparent from Figure 1, the ratio of output voltage to input voltage 4s equal to ZSH^ZSH + ZSE^’ zsh is at its maximum impedance it is large enough to make the effect of Zgg small, thus provide a gain (V^^/V^) which approaches unity. Unity gain is achieved by closing both switches 28 and 29 to short circuit both of the series resistors 26 and
27. The gain is reduced, creating loss, by opening either one or both switches.
According to a further feature of this invention resistors 26 and 27 are binary weighted, the latter resistor 27 being twice as large as resistor 26, and resistor 14 being sized to be about twice as large as resistor 27. By this circuit design the adjustment with switches 28 and 29 is set or calibrated directly in equal increments of db loss. At 1000 Hz, for example, the db loss is 1 db when switch 28 is opened and switch 29 is closed, the db loss increases to 2 db when switch 29 is opened and switch 28 is closed, and the loss further increases to 3 db when both switches are opened. As compared with prior adjustable equalizers, the foregoing features reduce the number of switches needed and eliminate the need for referring to table to convert switch positions into db. Resistor
- 6 14 is relatively large to limit the attenuation effect of the resonant inductance at loss frequencies (300 Hz - 400 Hz) to thus maintain the flat response at such low frequencies. Additional switches and resistors can be added to increase the range and/or steps of attenuation.
Claims (7)
1. An equalizer for flattening a signal frequency response for a predetermined frequency range including first, second and common nodes and a frequency dependent loss-producing circuit connected 5 between said first and common nodes, said circuit having a plurality of binary weighted resistors and a plurality of selectively operable switches corresponding in number to the number of said binary weighted resistors and each connected to a different 10 associated one of said binary weighted resistors to connect its associated binary weighted resistor into said circuit for establishing a number of equal db increments of loss, said equalizer developing an output signal voltage across said common and second 15 nodes in response to the application of an input signal voltage across said first and second nodes.
2. An equalizer as claimed in Claim 1 wherein said number of equal db increments of loss is equal to 2 n - 1 where n is equal to the number of said 20 switches.
3. An equalizer as claimed in Claim 1 or Claim 2 comprising a voltage divider having first and second impedances connected in series across said first and second nodes and interconnected at said common node to provide for the development of said output signal voltage across said second impedance in response to the application of said input signal voltage, said second impedance comprising a tank
4. 5 circuit tuned to the frequency that is the upper limit of said frequency range, and said first impedance comprising said frequency loss-producing circuit to attenuate the input signal in a plurality of equal db increments.
5. 10 4. An equalizer as claimed in claim 3 wherein said resistors are connected in series between said first and common nodes, and wherein each of said switches is connected across a different associated one of said resistors such that closure of each
6. 15 switch establishes a short circuit around its associated resistor. 5. An equalizer for flattening a signal frequency response for a predetermined frequency range as claimed in claim 1 and substantially as described
7. 20 with reference to or as shown by Figs 1 and 2 of the Drawings.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/120,125 US4331842A (en) | 1980-02-11 | 1980-02-11 | Voice frequency repeater and term sets and other circuits therefor |
IE195/81A IE51440B1 (en) | 1980-02-11 | 1981-02-02 | Electronic hybrid circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
IE853098L IE853098L (en) | 1981-08-11 |
IE51441B1 true IE51441B1 (en) | 1986-12-24 |
Family
ID=26318829
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IE3098/85A IE51441B1 (en) | 1980-02-11 | 1981-02-02 | Equaliser |
Country Status (1)
Country | Link |
---|---|
IE (1) | IE51441B1 (en) |
-
1981
- 1981-02-02 IE IE3098/85A patent/IE51441B1/en unknown
Also Published As
Publication number | Publication date |
---|---|
IE853098L (en) | 1981-08-11 |
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