HUT56196A - Circuit arrangement for fast packing and coding high-speed data of optional bit length, with special regard to microprocessor systems - Google Patents

Circuit arrangement for fast packing and coding high-speed data of optional bit length, with special regard to microprocessor systems

Info

Publication number
HUT56196A
HUT56196A HU25390A HU25390A HUT56196A HU T56196 A HUT56196 A HU T56196A HU 25390 A HU25390 A HU 25390A HU 25390 A HU25390 A HU 25390A HU T56196 A HUT56196 A HU T56196A
Authority
HU
Hungary
Prior art keywords
circuit arrangement
speed data
bit length
microprocessor systems
optional bit
Prior art date
Application number
HU25390A
Other languages
Hungarian (hu)
Other versions
HU900253D0 (en
HU210455B (en
Inventor
Andras Palotasi
Ivan Kas
Karoly Voeroes
Frigyes Zalan
Jozsef Eszenszki
Ferenc Fenyves
Sandor Jenei
Ildiko Licsko
Original Assignee
Mta Szamitastech Autom Kutato
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mta Szamitastech Autom Kutato filed Critical Mta Szamitastech Autom Kutato
Priority to HU25390A priority Critical patent/HU210455B/en
Publication of HU900253D0 publication Critical patent/HU900253D0/en
Publication of HUT56196A publication Critical patent/HUT56196A/en
Publication of HU210455B publication Critical patent/HU210455B/en

Links

HU25390A 1990-01-24 1990-01-24 Circuit arrangement for fast packing and coding data bulk of optional bit length, with special regard to microprocessor systems HU210455B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
HU25390A HU210455B (en) 1990-01-24 1990-01-24 Circuit arrangement for fast packing and coding data bulk of optional bit length, with special regard to microprocessor systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
HU25390A HU210455B (en) 1990-01-24 1990-01-24 Circuit arrangement for fast packing and coding data bulk of optional bit length, with special regard to microprocessor systems

Publications (3)

Publication Number Publication Date
HU900253D0 HU900253D0 (en) 1990-03-28
HUT56196A true HUT56196A (en) 1991-07-29
HU210455B HU210455B (en) 1995-04-28

Family

ID=10948749

Family Applications (1)

Application Number Title Priority Date Filing Date
HU25390A HU210455B (en) 1990-01-24 1990-01-24 Circuit arrangement for fast packing and coding data bulk of optional bit length, with special regard to microprocessor systems

Country Status (1)

Country Link
HU (1) HU210455B (en)

Also Published As

Publication number Publication date
HU900253D0 (en) 1990-03-28
HU210455B (en) 1995-04-28

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Legal Events

Date Code Title Description
HMM4 Cancellation of final prot. due to non-payment of fee