HUE048694T2 - Egységes predikátumok árnyalókban grafikus feldolgozóegységekhez - Google Patents

Egységes predikátumok árnyalókban grafikus feldolgozóegységekhez

Info

Publication number
HUE048694T2
HUE048694T2 HUE17701772A HUE17701772A HUE048694T2 HU E048694 T2 HUE048694 T2 HU E048694T2 HU E17701772 A HUE17701772 A HU E17701772A HU E17701772 A HUE17701772 A HU E17701772A HU E048694 T2 HUE048694 T2 HU E048694T2
Authority
HU
Hungary
Prior art keywords
shaders
processing units
graphics processing
predicates
uniform
Prior art date
Application number
HUE17701772A
Other languages
English (en)
Inventor
Andrew Evan Gruber
Pramod Vasant Argade
Jing Wu
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of HUE048694T2 publication Critical patent/HUE048694T2/hu

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/3009—Thread control instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00—Image enhancement or restoration
    • G06T5/90—Dynamic range modification of images or parts thereof
    • G06T5/94—Dynamic range modification of images or parts thereof based on local image properties, e.g. for local contrast enhancement

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Image Processing (AREA)
  • Advance Control (AREA)
  • Image Generation (AREA)
  • Executing Machine-Instructions (AREA)
HUE17701772A 2016-02-19 2017-01-09 Egységes predikátumok árnyalókban grafikus feldolgozóegységekhez HUE048694T2 (hu)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15/048,599 US10115175B2 (en) 2016-02-19 2016-02-19 Uniform predicates in shaders for graphics processing units

Publications (1)

Publication Number Publication Date
HUE048694T2 true HUE048694T2 (hu) 2020-08-28

Family

ID=57906996

Family Applications (1)

Application Number Title Priority Date Filing Date
HUE17701772A HUE048694T2 (hu) 2016-02-19 2017-01-09 Egységes predikátumok árnyalókban grafikus feldolgozóegységekhez

Country Status (10)

Country Link
US (2) US10115175B2 (hu)
EP (1) EP3417369B1 (hu)
JP (2) JP6542483B2 (hu)
KR (1) KR101941832B1 (hu)
CN (1) CN108701022B (hu)
BR (1) BR112018016913A2 (hu)
CA (1) CA3012446A1 (hu)
ES (1) ES2777827T3 (hu)
HU (1) HUE048694T2 (hu)
WO (1) WO2017142642A1 (hu)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10115175B2 (en) 2016-02-19 2018-10-30 Qualcomm Incorporated Uniform predicates in shaders for graphics processing units
US10503507B2 (en) * 2017-08-31 2019-12-10 Nvidia Corporation Inline data inspection for workload simplification
KR102161635B1 (ko) * 2019-02-11 2020-10-06 서경대학교 산학협력단 범용 그래픽 처리장치 및 이의 스케쥴링 방법
US12111789B2 (en) * 2020-04-22 2024-10-08 Micron Technology, Inc. Distributed graphics processor unit architecture
CN114816529A (zh) * 2020-10-21 2022-07-29 上海壁仞智能科技有限公司 配置向量运算系统中的协作线程束的装置和方法
CN114489791B (zh) * 2021-01-27 2023-03-24 沐曦集成电路(上海)有限公司 处理器装置及其指令执行方法、计算设备
CN113778529B (zh) * 2021-09-14 2024-09-20 西安电子科技大学 一种多路径并行执行的分支合并系统及分支合并方法
US20240046543A1 (en) * 2022-08-05 2024-02-08 Qualcomm Incorporated Runtime mechanism to optimize shader execution flow
US20240086162A1 (en) * 2022-09-09 2024-03-14 Microsoft Technology Licensing, Llc Interleaved machine instruction placement in memory

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US7239322B2 (en) * 2003-09-29 2007-07-03 Ati Technologies Inc Multi-thread graphic processing system
US8493396B2 (en) * 2004-11-15 2013-07-23 Nvidia Corporation Multidimensional datapath processing in a video processor
US8082423B2 (en) * 2005-08-11 2011-12-20 International Business Machines Corporation Generating a flush vector from a first execution unit directly to every other execution unit of a plurality of execution units in order to block all register updates
US8321849B2 (en) * 2007-01-26 2012-11-27 Nvidia Corporation Virtual architecture and instruction set for parallel thread computing
US8615770B1 (en) 2008-08-29 2013-12-24 Nvidia Corporation System and method for dynamically spawning thread blocks within multi-threaded processing systems
US8677106B2 (en) * 2009-09-24 2014-03-18 Nvidia Corporation Unanimous branch instructions in a parallel thread processor
US20120084539A1 (en) * 2010-09-29 2012-04-05 Nyland Lars S Method and sytem for predicate-controlled multi-function instructions
GB2484489A (en) * 2010-10-12 2012-04-18 Advanced Risc Mach Ltd Instruction decoder using an instruction set identifier to determine the decode rules to use.
US9557993B2 (en) 2012-10-23 2017-01-31 Analog Devices Global Processor architecture and method for simplifying programming single instruction, multiple data within a register
US9424038B2 (en) 2012-12-10 2016-08-23 Nvidia Corporation Compiler-controlled region scheduling for SIMD execution of threads
US9015656B2 (en) 2013-02-28 2015-04-21 Cray Inc. Mapping vector representations onto a predicated scalar multi-threaded system
US10318293B2 (en) 2013-07-09 2019-06-11 Texas Instruments Incorporated Predication methods for vector processors
US9633409B2 (en) 2013-08-26 2017-04-25 Apple Inc. GPU predication
US9652284B2 (en) 2013-10-01 2017-05-16 Qualcomm Incorporated GPU divergence barrier
US9612811B2 (en) * 2014-01-21 2017-04-04 Nvidia Corporation Confluence analysis and loop fast-forwarding for improving SIMD execution efficiency
US10115175B2 (en) 2016-02-19 2018-10-30 Qualcomm Incorporated Uniform predicates in shaders for graphics processing units
TWI591579B (zh) * 2016-05-13 2017-07-11 國立臺灣大學 減少流程控制發散度之分析系統與方法
US20200065098A1 (en) * 2018-08-21 2020-02-27 Qualcomm Incorporated Providing efficient handling of branch divergence in vectorizable loops by vector-processor-based devices

Also Published As

Publication number Publication date
CA3012446A1 (en) 2017-04-24
JP2019169193A (ja) 2019-10-03
US20190050958A1 (en) 2019-02-14
CN108701022A (zh) 2018-10-23
BR112018016913A2 (pt) 2018-12-26
WO2017142642A1 (en) 2017-08-24
US10706494B2 (en) 2020-07-07
ES2777827T3 (es) 2020-08-06
EP3417369B1 (en) 2019-12-11
KR101941832B1 (ko) 2019-01-23
US10115175B2 (en) 2018-10-30
CN108701022B (zh) 2020-05-08
JP6542483B2 (ja) 2019-07-10
KR20180114046A (ko) 2018-10-17
EP3417369A1 (en) 2018-12-26
JP2019507432A (ja) 2019-03-14
US20170243320A1 (en) 2017-08-24

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