HK1229552B - Rf transceiver front end module with improved linearity - Google Patents

Description

RF transceiver front-end module with improved linearity

Related cross-references

Pursuant to 37 CFR 1.57, any and all applications, if any, that identify a foreign or domestic priority claim in the Application Data Sheet of the present application are incorporated herein by reference.

Technical Field

Embodiments of the present invention relate to electronic systems, and in particular, to systems including power amplifiers for radio frequency (RF) electronics.

Background Art

A power amplifier can be included in a mobile device to amplify the RF signal transmitted via an antenna. For example, in mobile devices with a time division multiple access (TDMA) architecture, such as those found in Global System for Mobile Communications (GSM), code division multiple access (CDMA), and wideband code division multiple access (W-CDMA) systems, a power amplifier can be used to amplify RF signals with relatively low power. The power amplifier can be included in a mobile device front-end module, which also includes a duplexer, an antenna switch module, and a coupler. Current front-end modules can experience significant performance impairments in some cases, including degraded linearity.

Summary of the Invention

Embodiments described herein are used to address these and other issues. For example, degraded linearity is particularly concerning for front-end modules operating across multiple frequency bands and in multiple modes, such as one or more of average power tracking (APT) mode, envelope tracking (ET) mode, digital pre-distortion (DPD) mode (e.g., fixed supply or ET DPD mode), etc. One issue is degraded linearity (e.g., adjacent channel leakage ratio (ACLR)) when mismatch is present at the antenna. This can be particularly the case when, in ET DPD mode, the power amplifier is driven by a wideband signal, such as a 50 resource block long-term evolution signal (50RB LTE). In this case, for example, when a 5:1 voltage standing wave ratio (VSWR) is present at the antenna, there can be a 10 decibel (dB) degradation. This degradation can become increasingly worse as the modulation bandwidth increases. Therefore, compensating for this degradation can be particularly helpful in the case of ET and high modulation bandwidth.

Duplexers can exacerbate performance degradation, such as when the system is in ET mode. For example, inherent group delay in the duplexer combined with poor matching can lead to memory effects, such that the system gain shape (e.g., AM-AM/AM-PM) varies across the transmission RB bandwidth (i.e., channel). Furthermore, due to variations in the PA compression point under mismatch, AM-AM (amplitude-to-amplitude) and/or AM/PM (amplitude-to-phase) responses typically vary across various mismatch conditions (even for narrowband signals). Typical open-loop, memoryless DPD is generally insufficient to account for gain shape variations within the transmission bandwidth. Therefore, certain embodiments disclosed herein adjust DPD to account for or otherwise account for memory (i.e., gain shape variations across channels) and specific mismatch conditions at the antenna. Furthermore, the appropriate (e.g., optimal) delay applied between the modulator and the RF signal (for ET operation) is also a function of the VSWR state and varies within the TX (transmit) channel. Therefore, certain embodiments described herein also accommodate such delays within the transmission bandwidth.

According to certain aspects of the present disclosure, systems and methods are provided to improve the performance (e.g., linearity) of mobile device front-end modules under mismatch conditions. This can be achieved without incurring significant additional or performance loss under nominal conditions. Depending on the specific implementation, the embodiments provided herein can provide such benefits in ET mode, APT mode, DPD mode, or a combination thereof, such as in a combined DPD/ET mode.

According to at least one aspect of the present disclosure, a power amplifier system is provided. The system includes a modulator configured to generate a radio frequency (RF) transmit signal and a front-end module. The front-end module may include a power amplifier configured to amplify the RF transmit signal to generate an amplified RF transmit signal. The front-end module may also include a coupler located between the antenna and the power amplifier. The coupler may be configured to output measurements of both forward power and reverse power associated with the RF transmit signal. In some embodiments, the coupler is a bidirectional coupler. The system may additionally include a non-volatile memory storing an equalizer table. The equalizer table may have multiple entries generated during pre-characterization of the front-end module. The system may also include a processor configured to: (a) receive a voltage standing wave ratio (VSWR) measurement derived from the forward power and reverse power output by the coupler; (b) access an entry in the equalizer table based at least in part on the VSWR measurement; and (c) adjust the RF transmit signal based on the accessed entry to compensate for one or more memory effects present in the power amplifier system. For example, the system may include a digital predistortion table (DPD), in which case the processor is configured to adjust the RF transmit signal by adapting values in the DPD table based on entries accessed in the equalizer table. The system may be in the form of a mobile device, which may further include an antenna configured to receive the amplified RF signal from the front-end module.

The front-end module of the power amplifier system can be configured in a variety of different ways. In some cases, a programmable antenna tuner is used to generate an equalizer table to tune the front-end module to a desired VSWR point. In some configurations, the front-end module does not include an integrated antenna tuner. In some implementations, the programmable antenna tuner can be included in the front-end module and located between the antenna and the coupler. The programmable antenna tuner can be adjustable to tune the impedance seen by the power amplifier to provide a coarse correction of nonlinearities within the power amplifier system. Adjustment of the RF transmit signal based on the accessed entries provides a fine correction of nonlinearities within the power amplifier system. The front-end module can include one or more duplexers positioned between the power amplifier and the bidirectional coupler. In some cases, the duplexer contributes to at least some of the memory effects.

The power amplifier system may additionally include an envelope tracking system configured to provide a power supply control signal to the power amplifier to control a voltage level of the power amplifier based on the shaped envelope signal. In some cases, the processor is further configured to adjust a delay between the RF transmit signal and the supply control signal based on a delay value contained in the accessed equalizer table entry.

According to additional aspects of the present disclosure, a method for characterizing a front-end module of a wireless device is provided. The method may include using a programmable antenna tuner to tune an impedance load at an output of a power amplifier of the front-end module to achieve a voltage standing wave ratio (VSWR) value associated with a first characterization state among a plurality of front-end module characterization states. The method may also include driving the front-end module with an RF transmit signal. The RF transmit signal is driven according to one or more additional parameter values associated with the first characterization state. The method may also include measuring one or more variables associated with the behavior of the front-end module while the front-end module is driven with the RF transmit signal and tuned to the VSWR value. The one or more recorded variables may include power amplifier compression, maximum envelope power, and/or a delay between a power control signal for the power amplifier and the RF transmit signal. The method may also include recording the one or more measured variables associated with the first characterization state in a table in non-volatile memory. The steps of using, driving, measuring, and recording may be repeated for a plurality of additional characterization states among the plurality of front-end module characterization states. In some cases, the programmable antenna tuner is separate from the front-end module; in such cases, the front-end module does not include the antenna tuner. In some other implementations, the programmable antenna tuner is integrated into the front-end module.

According to another aspect, a power amplifier system includes a front-end module comprising a power amplifier configured to amplify an RF transmit signal to produce an amplified RF transmit signal. The front-end module may also include a programmable tuner coupled to an antenna. A coupler of the front-end module may be located between the power amplifier and the antenna tuner, the coupler configured to output measurements of both forward power and reverse power associated with the RF signal. The antenna tuner may be adjustable to tune the impedance seen by the power amplifier to provide a rough correction for nonlinearities within the power amplifier system. The system may also include a non-volatile memory storing an equalizer table having a plurality of entries generated during pre-characterization of the front-end module. The system may also include a processor configured to: (a) receive a voltage standing wave ratio (VSWR) measurement derived from the forward power and reverse power output by the coupler; (b) access an entry in the equalizer table based at least in part on the VSWR; and (c) adjust the RF transmit signal based on the accessed entry. In some configurations, the front-end module may additionally include a duplexer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a power amplifier module for amplifying radio frequency (RF) signals.

2 is a schematic block diagram of an example wireless device.

3 is a schematic block diagram of an example of a power amplifier system including a transceiver and a front-end module, according to certain embodiments.

4A is a schematic diagram of one embodiment of a front-end module without an integrated antenna tuner.

4B is a schematic diagram of one embodiment of a front-end module with an integrated programmable antenna tuner.

FIG5 is a flow chart illustrating a process for pre-characterizing a front-end module.

6A-6B illustrate examples of an equalizer lookup table for a portion of an exemplary front-end module showing pre-characterization values for select variables at different characterization states.

7A shows a flow chart depicting a process for compensating front-end module operation using an equalizer lookup table.

7B shows a flow chart depicting another process for compensating front-end module operation by combining coarse tuning using an integrated antenna tuner and fine tuning using an equalizer lookup table.

8A-8C illustrate power amplifier signal and supply waveforms for a power amplifier operating in fixed supply voltage mode, average power tracking mode, and envelope tracking mode, respectively.

FIG9 illustrates one embodiment of a process for determining complex impedance.

DETAILED DESCRIPTION

The headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the claimed invention.

1 is a schematic diagram of a power amplifier module (PAM) 10 for amplifying a radio frequency (RF) signal. The illustrated power amplifier module 10 can be configured to amplify an RF signal RF_IN to generate an amplified RF signal RF_OUT. As described herein, the power amplifier module 10 can include one or more power amplifiers.

FIG2 is a schematic block diagram of an example wireless device 11, which may include one or more power amplifier modules 10 of FIG1 . The wireless device 11 may include a power amplifier 17 and an RF front end 12 that implement one or more features of the present disclosure. For example, the power amplifier 17 and the RF front end 12 according to some embodiments are configured to compensate for nonlinearities, including those caused by memory effects resulting from impedance mismatches seen by the power amplifier 17. In particular, a duplexer coupled to the power amplifier 17 may include or operate as a filter that adds a corresponding frequency response component to the system on top of other distortions, resulting in memory effects. For example, the duplexer may exhibit uneven mismatch across the transmit channel/band, thereby resulting in nonlinear power amplifier behavior.

This compensation can involve the use of a lookup table or other data structure, in which case the appropriate lookup table entries are accessed based on measurements taken during operation, such as voltage standing wave ratio (VSWR) measurements or other measurements related to the complex impedance seen by power amplifier 17. According to some implementations, the values in the lookup table are obtained during a characterization phase, in which case a programmable antenna tuner is used to record certain variables that characterize the behavior of the system. For example, AM-AM and/or AM-PM response curves for power amplifier 17 can be captured under various operating conditions. Such techniques and associated component components are described in further detail herein.

Although the power amplifier 17 and the RF front end 12 are described in some cases as separate components, some or all of the power amplifier 17 may form part of the RF front end 12, for example in embodiments where the RF front end 12 is a highly integrated component that includes the power amplifier 17. The combination of the power amplifier 17 and the RF front end 12 may be collectively referred to as a front end module.

The example wireless device 11 illustrated in FIG2 can represent a multi-band and/or multi-mode device, such as a multi-band/multi-mode mobile phone. For example, the Global System for Mobile Communications (GSM) communication standard is a mode of digital cellular communication used in many parts of the world. GSM mode mobile phones can operate on one or more of the following four frequency bands: 850 MHz (approximately 824-849 MHz for Tx (transmit) and 869-894 MHz for Rx (receive)), 900 MHz (approximately 880-915 MHz for Tx and 925-960 MHz for Rx), 1800 MHz (approximately 1710-1785 MHz for Tx and 1805-1880 MHz for Rx), and 1900 MHz (approximately 1850-1910 MHz for Tx and 1930-1990 MHz for Rx). Variations and/or regional/national implementations of the GSM frequency bands are also used in different parts of the world.

Code Division Multiple Access (CDMA) is another standard that may be implemented in mobile phone devices. In some implementations, CDMA devices may operate in one or more of the 800 MHz, 900 MHz, 1800 MHz, and 1900 MHz bands, while some W-CDMA and Long Term Evolution (LTE) devices may operate on, for example, approximately 22 radio frequency spectrum bands.

One or more features of the present disclosure may be implemented in the aforementioned example modes and/or frequency bands, as well as in other communication standards. For example, 3G and 4G are non-limiting examples of such standards.

The illustrated wireless device 11 includes an RF front end 12, a transceiver 13, an antenna 14, a power amplifier 17, a control component 18, a computer readable medium 19, a processor 20, a battery 21, and a supply control block 22.

The transceiver 13 may generate RF signals for transmission via the antenna 14. Additionally, the transceiver 13 may receive incoming RF signals from the antenna 14.

It should be understood that various functions associated with the transmission and reception of RF signals can be implemented by one or more components collectively represented as transceiver 13 in FIG2 . For example, a single component can be configured to provide both transmission and reception functions. In another example, the transmission and reception functions can be provided by separate components.

Similarly, it should be understood that various antenna functions associated with the transmission and reception of RF signals can be implemented by one or more components, collectively represented in FIG2 as antenna 14. For example, a single antenna can be configured to provide both transmit and receive functions. In another example, transmit and receive functions can be provided by separate antennas. In yet another example, different antennas can be provided for different frequency bands associated with wireless device 11.

In FIG2 , one or more output signals from the transceiver 13 are illustrated as being provided to the antenna 14 via one or more transmit paths 15. In the example shown, the different transmit paths 15 may represent output paths associated with different frequency bands and/or different power outputs. For example, the two example power amplifiers 17 shown may represent amplification associated with different power output configurations (e.g., low power output and high power output), and/or amplification associated with different frequency bands. Although FIG2 illustrates the wireless device 11 as including two transmit paths 15, the wireless device 11 may be adapted to include more or fewer transmit paths 15.

In FIG2 , one or more detected signals from antenna 14 are depicted as being provided to transceiver 13 via one or more receive paths 16. In the example shown, different receive paths 16 may represent paths associated with different frequency bands. For example, the four example paths 16 shown may represent quad-band capabilities provided to some wireless devices. While FIG2 illustrates wireless device 11 as including four receive paths 16, wireless device 11 may be adapted to include more or fewer receive paths 16.

To facilitate switching between the receive and transmit paths, one or more switches in the RF front end 12 can be configured to electrically connect the antenna 14 to the selected transmit or receive path. Thus, the switch can provide a variety of switching functions associated with the operation of the wireless device 11. In some embodiments, the switch can include multiple switches configured to provide functions associated with, for example, switching between different frequency bands, switching between different power modes, switching between transmit and receive modes, or some combination thereof. The switch can also be configured to provide additional functions, including signal filtering and/or duplexing.

2 shows that, in some embodiments, a control component 18 may be provided to control various control functions associated with the operation of the RF front end, power amplifier 17, supply control 22, and/or other operating components. In some cases, the control component 18 may be included in another component shown in FIG. 2 , such as the transceiver 13.

In certain embodiments, the processor 20 can be configured to facilitate the realization of the various processes described herein. In certain implementations, the processor 20 can operate using computer program instructions. In certain embodiments, these computer program instructions can also be stored in a computer-readable memory 19, which can instruct a computer or other programmable data processing device to operate in a particular manner. For example, for the purpose of description, the embodiments of the present disclosure can also be described with reference to the flowchart and/or block diagram of a method, device (system) and computer program product. It should be understood that each block of the flowchart and/or block diagram, and the combination of the blocks in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that instructions (which are executed via the processor of a computer or other programmable data processing device) are created to realize the device for the action specified in one or more blocks of the flowchart and/or (multiple) block diagram.

In some embodiments, these computer program instructions may also be stored in a computer-readable memory 19, which may instruct a computer or other programmable data processing device to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture containing instruction means that implement the actions specified in one or more blocks of the flowchart and/or (multiple) block diagrams. The computer program instructions may also be loaded onto a computer or other programmable data processing device to cause a series of operations to be performed on the computer or other programmable device to produce a computer-implemented process, such that the instructions executed on the computer or other programmable device provide steps for implementing the actions specified in one or more blocks of the flowchart and/or (multiple) block diagrams.

Supply control block 22 can be electrically connected to battery 21 and can be configured to vary the voltage supplied to power amplifier 17, for example, based on the envelope of the RF signal to be amplified. Battery 21 can be any suitable battery for wireless device 11, including, for example, a lithium-ion battery. As will be described in detail below, by controlling the voltage level of the power amplifier supply voltage supplied to the power amplifier, power consumption of battery 21 can be reduced, thereby improving the performance of wireless device 11. As shown in FIG2 , an envelope signal can be provided from transceiver 13 to supply control block 22. However, the envelope can be determined in other ways. For example, the envelope or other type of supply control signal can be determined by processing the RF signal (e.g., detecting the envelope using any suitable envelope detector).

One technique for reducing power consumption in a power amplifier is envelope tracking (ET), in which the voltage level of the power supply to the power amplifier is varied relative to the envelope of the RF signal. For example, when the envelope of the RF signal increases, the voltage level of the power supply to the power amplifier can be increased. Similarly, when the envelope of the RF signal decreases, the voltage level of the power supply to the power amplifier can be decreased to reduce power consumption. Another form of power tracking is average power tracking (APT), in which, similar to envelope tracking, the voltage level of the power supply to power amplifier 17 is varied relative to the envelope. However, in APT mode of operation, the power supply is varied between two or more discrete values based on the average level of the envelope. For example, the power level can be varied on a slot-by-slot basis, in which case each slot corresponds to a different power control level. This can improve efficiency at low power levels while resulting in less power savings at higher levels than ET tracking. Another mode of power supply control is fixed supply or direct battery connection, in which case the power supply to power amplifier 17 is maintained at a fixed amount at or above the maximum level of the RF signal envelope. Example power and signal waveforms generated during example fixed power supply, average power tracking, and envelope tracking operations are shown in 8A, 8B, and 8C, respectively.

FIG3 is a schematic block diagram of an example of a power amplifier system 26. For example, the power amplifier system 26 can be incorporated into the wireless device 11. The illustrated power amplifier system 26 includes the RF front end 12, the antenna 14, the battery 21, the supply control driver 30, the power amplifier 17, and the transceiver 13. The illustrated transceiver 13 includes a baseband processor 34, a supply shaping block or circuit 35, a delay element 33, a digital-to-analog converter (DAC) 36, a quadrature (I/Q) modulator 37, a mixer 38, and an analog-to-digital converter (ADC) 39. The supply shaping block 35, the delay element 33, the DAC 36, and the supply control driver 30 together form a supply shaping branch 48.

The baseband processor 34 can be used to generate an I signal and a Q signal, which correspond to the signal components of a sine wave or a signal with a desired amplitude, frequency, and phase. For example, the I signal can be used to represent the in-phase component of the sine wave, and the Q signal can be used to represent the quadrature component of the sine wave, which can be an equivalent representation of the sine wave. In some implementations, the I signal and the Q signal can be provided to the I/Q modulator 37 in a digital format. The baseband processor 34 can be any suitable processor configured to process baseband signals. For example, the baseband processor 34 can include a digital signal processor, a microprocessor, a programmable core, or any combination thereof. In addition, in some implementations, two or more baseband processors 34 can be included in the power amplifier system 26.

The I/Q modulator 37 may be configured to receive the I and Q signals from the baseband processor 34 and process the I and Q signals to generate an RF signal. For example, the I/Q modulator 37 may include a DAC configured to convert the I and Q signals to an analog format, a mixer for upconverting the I and Q signals to a radio frequency, and a signal combiner for combining the upconverted I and Q signals into an RF signal suitable for amplification by the power amplifier 17. In some implementations, the I/Q modulator 37 may include one or more filters configured to filter the frequency content of the signals processed therein.

Supply shaping block 35 may be used to convert envelope or amplitude signals associated with the I and Q signals into shaped power supply control signals, such as average power tracking (APT) signals or envelope tracking (ET) signals, depending on the embodiment. Shaping the envelope signal from baseband processor 34 may help enhance the performance of power amplifier system 26. In some implementations, such as where the supply shaping block is configured to implement envelope tracking functionality, supply shaping block 35 is a digital circuit configured to generate a digital shaped envelope signal, and DAC 36 is used to convert the digital shaped envelope signal into an analog shaped envelope signal suitable for use by supply control driver 30. However, in other implementations, DAC 36 may be omitted in favor of providing a digital envelope signal to supply control driver 30 to facilitate further processing of the envelope signal by supply control driver 30.

Supply control driver 30 can receive a supply control signal (e.g., an analog shaped envelope signal or APT signal) from transceiver 13 and a battery voltage V _BATT from battery 21, and can use the supply control signal to generate a power amplifier supply voltage V _{CC_PA} for power amplifier 17 that varies relative to the transmit signal. Power amplifier 17 can receive an RF transmit signal from I/Q modulator 37 of transceiver 13 and provide an amplified RF signal to antenna 14 via RF front end 12. In other cases, a fixed power amplifier supply voltage V _{CC_PA} can be provided to power amplifier 17. In some such embodiments, one or more of supply shaping block 35, DAC 36, and supply control driver 30 may not be included. Exemplary waveforms of power amplifier supply voltage V _{CC_PA} and corresponding RF transmit signals for fixed supply, APT, and ET power supply control operations are shown in Figures 8A, 8B, and 8C, respectively. In some embodiments, power amplifier system 26 is capable of implementing two or more supply control techniques. For example, the power amplifier system 26 allows selection (e.g., through firmware programming or other appropriate mechanism) of two or more of ET, APT, and fixed power supply control modes. In such a case, the baseband processor, or other appropriate controller or processor, can instruct the supply shaping block 35 to enter the appropriate selected mode.

Delay element 33 implements a selectable delay in the supply control path. As will be described in further detail, this can, in some cases, be used to compensate for nonlinearities and/or other potential sources of signal degradation. The illustrated delay element is shown as part of transceiver 13 in the digital domain and may include a FIFO or other type of memory-based delay element. However, delay element 33 may be implemented in any suitable manner and, in other embodiments, may be integrated as part of supply shaping block 35 or implemented in the analog domain, for example, after DAC 36.

The RF front end 12 receives the output of the power amplifier 17 and may include various components including one or more duplexers, switches (e.g., formed in an antenna switch module), directional couplers, etc. A detailed example of a compatible RF front end is shown and described below with respect to Figures 4A and 4B.

The directional coupler (not shown) within the RF front end 12 can be a bidirectional coupler, or other suitable coupler, or other device capable of providing a sensed output signal to the mixer 38. According to certain embodiments, including the illustrated embodiment, the directional coupler can provide an incident signal and a reflected signal (e.g., forward power and reverse power) to the mixer 38. For example, the directional coupler can have at least four ports, which can include an input port configured to receive a signal generated by the power amplifier 17, an output port coupled to the antenna 14, a first measurement port configured to provide forward power to the mixer 38, and a second measurement port configured to provide reverse power to the mixer 38.

Mixer 38 can multiply the sensed output signal by a frequency-controlled reference signal (not shown in FIG. 3 ) to downshift the spectrum of the sensed output signal. The downshifted signal can be provided to ADC 39, which can convert the downshifted signal into a feedback signal 47 in a digital format suitable for processing by baseband processor 34. As will be discussed in further detail, by including a feedback path between the output of power amplifier 17 and the input of baseband processor 34, baseband processor 34 can be configured to dynamically adjust the I and Q signals, and/or power control signals associated with the I and Q signals, to optimize the operation of power amplifier system 26. For example, configuring power amplifier system 26 in this manner can help control the power added efficiency (PAE) and/or linearity of power amplifier 32. In some embodiments, mixer 38, ADC 39, and/or other suitable components can generally perform a quadrature (I/Q) demodulation function.

Although power amplifier system 26 is shown as including a single power amplifier, the teachings herein are applicable to power amplifier systems including multiple power amplifiers, including, for example, multi-frequency and/or multi-mode power amplifier systems.

Additionally, although FIG. 3 illustrates a particular configuration of a transceiver, other configurations are possible, including, for example, configurations in which the transceiver 13 includes more or fewer components, and/or a different arrangement of components.

As shown, the baseband processor 34 may include a digital pre-distortion (DPD) table 40, an equalizer table 41, and a complex impedance detector 44. The DPD table 40 may be stored in non-volatile memory (e.g., flash memory, read-only memory (ROM), etc.) of the transceiver 34, accessible to the baseband processor 34. According to some embodiments, the baseband processor 34 accesses entries in the DPD table 40 to assist in linearizing the power amplifier 17. For example, the baseband processor 34 selects an appropriate entry in the DPD table 40 based on a sensed feedback signal 47 and adjusts the transmit signal accordingly before outputting it to the I/Q modulator 37. For example, DPD can be used to compensate for certain nonlinear effects of the power amplifier 17, including, for example, signal constellation distortion and/or signal spectral spreading. According to some embodiments, including the illustrated embodiment, the DPD table 40 implements memoryless DPD, where, for example, the current output of the DPD-corrected transmit signal depends solely on the current input.

Overview of equalization using a lookup table with values obtained by pre-characterizing the RF front end

Certain factors may contribute to memory effects that are difficult to handle using pure memoryless DPD via the DPD table 40, such as the inherent group delay in the duplexer of the RF front end 12 combined with the poor impedance matching seen by the power amplifier 17. To compensate for such memory effects, and/or other factors that contribute to nonlinearity or other signal degradation, the power amplifier system 26 may employ an equalizer table 41. The equalizer table 41 may be stored in a non-volatile memory (e.g., flash memory, read-only memory (ROM), etc.), which may be the same memory as the DPD table 40, or a different memory, depending on the embodiment. Although for illustrative purposes, the DPD table 40 and the equalizer table 41 are shown as residing within the baseband processor 34, the memory device containing the tables may reside in any suitable location on the transceiver 13, or elsewhere in the wireless device 11.

During the characterization phase, equalizer table 41 is populated, which can be performed at the point of manufacture, for example, in this case, characterizing power amplifier system 26 under selected input conditions. During characterization, power amplifier system 26 can be characterized at selected complex impedance points, in which case certain variables are recorded at each complex impedance point. For example, a programmable antenna tuner can be connected to power amplifier system 26 during characterization to set the desired complex impedance point. The system can additionally be characterized between other appropriate parameters. For example, in some embodiments, variables are additionally recorded across different channels and frequency bands, which can allow power amplifier system 26 to be adapted (e.g., adaptation of DPT table 40) for duplexer ripple on the transmit channel, accounting for some memory effects, and other benefits. A bidirectional coupler or other appropriate component can be used to capture the behavior of power amplifier system 26 at each set point (e.g., each characterized combination of phase, VSWR, channel, and frequency band). Each recorded variable can be stored in a table along with the corresponding characterization set point value.

The recorded variables that form the characterization information for each setpoint may include some or all of the following: (1) a desired (e.g., optimal) relative delay between the RF signal delivered to the power amplifier 17 and the supply shaped signal through the supply control branch 48; (2) a compression level of the power amplifier 17, which may correspond to the degree of compression at which the power amplifier 17 operates during peak envelope power; and (3) a maximum envelope power. Figures 6A-6B provide examples of portions 600, 650 of a table that includes recorded variables that characterize an embodiment of a power amplifier system. For example, such a table may form or be used to generate a portion of the equalizer table 41. The characterization process will be described in further detail herein, for example with respect to Figures 4A, 4B, 5, and 6A-6B.

During operation, the complex impedance (e.g., VSWR and/or phase) is detected using the impedance detector 44. Complex impedance. The impedance detector 44 can be implemented in any suitable manner and can include digital circuitry or analog circuitry. For example, some or all of the impedance detector 44 can be implemented within the baseband processor 34. In other embodiments, some or all of the impedance detector resides in a feedback path external to the baseband processor 34. Some examples of compatible components for detecting complex impedance are provided in U.S. Patent No. 8,723,531, entitled "Integrated VSWR Detector for Monolithic Microwave Integrated Circuits," which is incorporated herein by reference. One embodiment of a process for determining complex impedance is shown and described herein with respect to FIG.

As shown, the equalizer table 41 may include one or both of a tx table 42 and a feed control table 43. The tx table 42 may be used to compensate for the DPD table 40 with respect to mismatches, nonlinearities, etc., while the feed control table 43 may be used to control the delay of the delay element 33 of the feed control branch 48, e.g., based on a desired relative delay between the RF transmit signal 49 and the feed shaped signal.

As indicated by the dashed line extending from tx table 42 to tx signal 49, tx table 42 can be used to directly compensate tx signal 49, either instead of or in addition to compensating DPT table 40. For example, in some cases, power amplifier system 26 can be placed in a mode with DPD turned off, and tx table 42 used to compensate tx signal 49. For example, DPD and envelope tracking are disabled until a certain transmit power level (e.g., 100 milliwatts) is reached, at which point turning on envelope tracking and DPD becomes more energy-inefficient. Furthermore, in some cases, only one of tx table 42 and feed control table 43 is used at any given time. For example, in some embodiments, feed control table 43 is used only when power amplifier system 26 is placed in envelope tracking mode, while only tx table 42 is used when power amplifier system 26 is not in envelope tracking mode (e.g., in APT or fixed feed mode). In some embodiments, equalizer table 41 includes only one of tx table 42 and feed control table 43. Furthermore, the information contained in the equalizer table 41 may be organized in a variety of different ways. For example, although shown as separate tables, the tx table 42 and the supply control table 43 may be combined into a single table, or in other embodiments, the information provided in the equalizer table 41 may be combined with the DPD table 40.

For wideband signals (e.g., 50-resource block (RB) LTE signals), memory effects can become particularly problematic due to load line and delay variations across the RB frequency span. At VSWRs of 2:1 or greater, memoryless DPD table 40 may not adequately account for AM-AM/AM-PM response variations across the channel. In these situations, equalization of the baseband transmit signal (e.g., I/Q signal) may be appropriate, for example, using equalizer table 41, which can utilize memory coefficients to enhance DPD table 41. The use of equalizer table 41 can implement an equalizer function that equalizes the compression level of power amplifier 17 and/or achieves a desired (e.g., optimal) delay across the frequency band for power amplifier 17. Thus, equalizer table 41 (which can include the aforementioned variables extracted across the channel) can be used to perform an equalizer function for large RB signals (e.g., 50 or 100 RBs or uplink CA 40 MHz wide). According to certain embodiments, equalization can provide a dual role: adding memory effect compensation to the memoryless DPD, and adapting the DPD to operate under various characterization conditions (e.g., characterization VSWR conditions). As described, the equalizer function can have two paths, one for the RF transmit signal 49, such as by using the TX table 42, and one for the feed control path 48 (e.g., by using the feed control table 43), which can be, for example, an envelope tracker.

According to some implementations, equalization table 41 contains separate gains and delays for each individual RB, which are applied only to the RF transmit signal 49, and there is no separate equalization for feeding control path 48. In another embodiment, equalization table 41 implements a function that approximates a Volterra series via two separate paths: one for the RF transmit signal 49 and one for the envelope tracker path 48. This implementation can consist of a finite impulse response (FIR) filter, followed by a nonlinear lookup table, followed by another FIR. One block is applied to the RF signal, while the other is applied to the modulator signal. The FIR coefficients and the nonlinear lookup table are derived from the equalization table and a nominal condition memoryless DPD table.

Demonstration front-end module

4A and 4B illustrate an exemplary front-end module 45, either of which is compatible with and can be incorporated into the systems shown in FIG1-3. Referring to both FIG4A and 4B, the illustrated front-end module 45 includes an input switch 55, a set of power amplifiers 17, a set of duplexers 50, a set of antenna switch modules 51, a bidirectional coupler 52, and a measurement switch 53. The front-end module 45 shown in FIG4B also includes an integrated antenna tuner 54.

Input switch 55 switches the modulated RF transmit signal between different power amplifiers 17 and corresponding duplexers 50. The activated power amplifier 17 amplifies the received signal and forwards the amplified signal to duplexer 50. Duplexer 50 is configured to forward the transmitted signal to antenna switch module 51. For simplicity, only the transmit path is shown in Figures 4A-4B. However, it should be understood that duplexer 50 is configured to enable bidirectional communication between transceiver 13 and antenna 14. For example, duplexer 50 can also be configured to accept received signals from antenna switch module 51 and forward the received signals for transmission to transceiver 13. Duplexer 50 can also implement filtering or other suitable functions. For example, duplexer 50 can provide transmitter noise suppression at the receive frequency, isolation to prevent receiver desensitization, and the like.

The antenna switch module 51 can be configured to electrically connect the antenna 14 to a selected transmit path or receive path. Thus, the antenna switch module 51 can provide multiple switching functions associated with the operation of the front-end module 45. In certain embodiments, the antenna switch module 51 can include functions associated with, for example, switching between different frequency bands, switching between different power modes, switching between transmit and receive modes, or some combination thereof. The antenna switch module 51 can also be configured to provide additional functions, such as signal filtering and/or duplexing.

The illustrated embodiment includes a bidirectional coupler 52 capable of providing a sensed output signal to a measurement switch 53. The measurement switch 53 may be, for example, a single-pole double-throw (SPDT) switch. According to certain embodiments, including the illustrated embodiment, the directional coupler can provide measurements of both the incident and reflected signals in the transmit path (e.g., forward power and reverse power). For example, the bidirectional coupler 52 may have at least four ports, which may include: an input port configured to receive a signal generated by the power amplifier 17, an output port coupled to the antenna 14, a first measurement port configured to provide forward power to the measurement switch 53, and a second measurement port configured to provide reverse power to the measurement switch 53. Although the illustrated embodiment includes a bidirectional coupler 53, other types of devices, or combinations of devices, may be used in other embodiments. Generally, any device capable of detecting both the incident and reflected signals (e.g., forward power and reverse power) in the transmit path may be used. The bidirectional coupler 52 outputs a transmit signal for transmission to the antenna and outputs forward power and reverse power signals to the measurement switch 53. The measurement switch 53 switches between the two ports (eg, between the detected forward power and reverse power signals) and forwards the switched output to be transmitted to the impedance detector.

In contrast to the front-end module 45 shown in FIG4B , the front-end module 45 shown in FIG4A does not include a programmable antenna tuner. In such embodiments, the equalizer table 41 can be used to fully compensate for those memory effects caused by mismatches without the need for an integrated antenna tuner, thereby reducing cost and complexity and also avoiding the losses caused by incorporating an antenna tuner. In these cases, a programmable antenna tuner can be temporarily connected to the system, such as between the bidirectional coupler 52 and the antenna, in order to characterize the system. For example, the antenna tuner can be used during manufacturing to set the complex impedance value for each characterization set point. The configuration shown in FIG4A can be used in combination with a pre-characterized equalizer table 41 according to some embodiments to achieve a linearity improvement of at least 6 dB.

In some other embodiments, such as the embodiment shown in FIG. 4B , an integrated antenna tuner 54 is provided within the front-end module 45. In some embodiments, the antenna tuner 54 includes circuitry including a pi network and/or a T network. The antenna tuner 54 can be programmable to provide impedance tuning and, in some embodiments, can be used in combination with the equalizer table 41 to compensate for memory effects. For example, the programmable antenna tuner 54 can be used to provide coarse correction for certain nonlinearities (e.g., AM-AM and/or AM-PM response variations, memory effects, etc.). The antenna tuner 54 can be adjusted to provide impedance tuning so that the power amplifier 17 sees a specific impedance closer to a desired value (e.g., 50 ohms), thereby providing VSWR compensation. Alternatively, the equalizer table 41 can provide finer correction for certain nonlinearities (e.g., AM-AM and/or AM-PM response variations, memory effects, etc.). Including the integrated antenna tuner 54 can provide the additional benefit of providing calibration for the bidirectional coupler 52. For example, the directivity of the coupler 52 can be enhanced in software or firmware after calibration through de-embedding, linear transformation, etc. The integrated tuner 54 may also provide improved performance under server mismatch conditions.

Characterization of the front-end module 45 may be done at any desired frequency, including on a part-by-part basis, or to reduce calibration costs, on a part-per-batch or part-per-few-batch basis.

Example of a method for pre-characterizing a front-end module

FIG5 is a flow chart 500 illustrating a process for pre-characterizing a front-end module. Process 500 can result in the measurement of AM-AM and/or AM-PM response curves for each individual characterization state. One or more processors and/or other appropriate components of a wireless device can implement certain portions of the process. For example, while certain portions of the process are described for illustrative purposes as being implemented using certain components of the devices shown in FIG3 and FIG4A-4B, the process can also be implemented using the wireless device 11 of FIG1 , or any other compatible wireless device 11.

At block 502, the process includes using a programmable antenna tuner to set the VSWR to an appropriate value for the current characterization set point state. For example, referring to the first row 602 shown in the example partial equalizer lookup table 600 shown in FIG6A , the antenna tuner can be used to set the VSWR to a value (1.2) corresponding to the current characterization set point state. In the case where an integrated antenna tuner 54 ( FIG4B ) is provided in the front-end module 45, the integrated tuner 54 can be used to adjust the VSWR. In the case where an integrated tuner ( FIG4A ) is not provided, an antenna tuner can be temporarily attached to the front-end module 45 for characterization purposes. The antenna tuner can be adjusted while monitoring the VSWR point using the integrated impedance detector 44 or other detector until the set point is reached.

At block 504, other parameters corresponding to the current characterization setpoint are set to appropriate values. For example, referring again to the example setpoints corresponding to row 602 of the partial equalizer lookup table 600 shown in FIG6A , the phase, channel, and frequency band of the complex impedance can be set to appropriate values (0 degrees, 20525, B5). Some or all of these setpoints can be achieved by adjusting the test input signal using a signal generator or other appropriate tool.

At block 506, the system is characterized at the current characterization state. For example, at 506, a set of variables associated with the behavior of the front-end module 45 is recorded. The variables may generally include any suitable variables or measurements that may be used to compensate for the nonlinearity of the front-end module 45. For example, referring again to the first row 602 of the partial table 600 shown in FIG6A, the variables in the exemplary embodiment include: (1) a measured desired (e.g., optimal) relative delay (1.11 nanoseconds [ns]) between the RF signal transmitted to the power amplifier 17 and the supply shaped signal through the supply control branch 48; (2) a compression level (2.0 dB) for the power amplifier 17, which may correspond to the degree of compression at which the power amplifier 17 operates during peak envelope power; and (3) a maximum envelope power (29 decibel-milliwatts [dBm]). Referring to FIG6B, which includes another example of a partial lookup table 650, the recorded variables may also include: an AM-AM coefficient (variable B) and an AM-PM coefficient (variable C) that characterize the AM-AM and AM-PM response curves.

At block 508, the variables are recorded in the lookup table 41 or otherwise stored in non-volatile memory. In some implementations, the variables are recorded directly in non-volatile memory within the transceiver 13 at the time of characterization (e.g., to form the equalizer table 41). In other cases, the variables are recorded to some separate storage medium (e.g., a flash drive, a disk drive, etc.) and later downloaded to the baseband processor 34 or other appropriate location within the wireless device 11 in a timely manner. For example, in some cases, the front-end module 12 is characterized prior to assembling the wireless device 11, and upon assembling the wireless device 11 or portions thereof, the recorded values are downloaded to non-volatile memory accessible by the baseband processor 34, or to some other appropriate location within the wireless device 11.

The process is then repeated for the next characterization set point. Referring again to Figure 6A, the next set point may correspond to the second row 604 in the partial table 600, in which case the phase value is set to 45 degrees.

FIG6A shows only a portion of the characterization table, where the phase is swept by increasing values while holding the other set point parameters (VSWR, channel, and frequency band) constant. It should be understood that to complete the characterization and thereby obtain a complete set of recorded values for use in the equalization table 41, the phase can be swept by additional values (e.g., by 360 degrees) and each of the other set point parameters can also be swept while holding some or all of the other parameters constant.

While the partial tables 600, 650 shown in Figures 6A-B are referred to herein as forming part of the equalizer table 41, in some cases the values in the partial tables 600, 650 are not actually stored directly in the equalizer table 41. Instead, recorded values from the tables 600, 650 are used to derive values contained in the equalizer table 41. For example, the AM-AM coefficient (variable B) and the AM-PM coefficient (variable C) shown in the partial table 650 of Figure 6B may be derived from other variables recorded during characterization.

According to some embodiments, part or all of the characterization process 500 is performed while DPD is disabled.

7A and 7B illustrate an example process for compensating front-end module operation using an equalizer table having values obtained during characterization of the front-end module. For example, the process may involve using the equalizer table 41 shown in FIG3 , which may be obtained using the process shown in FIG5 , or a similar process. Although certain portions of the process are described for illustrative purposes as being implemented by the baseband processor 34 within the transceiver 13 of the power amplifier system 26 of FIG3 , the process may be implemented by any other suitable processor, such as another processor within the transceiver 13 of the power amplifier system 26 of FIG3 , any processor within the wireless device 11 of FIG2 , and so forth.

7A , at block 702 , the baseband processor 34 receives a complex impedance value (eg, VSWR and/or phase) sensed by the impedance detector 44 during signal transmission.

At block 704, the baseband processor 34 uses the sensed impedance value to access the appropriate record from the equalizer table 41. For example, referring to the partial tables 600, 650 shown in Figures 6A-6B, VSWR can be used along with other characterizing setpoint parameters (e.g., phase, channel, and frequency band information) to index the equalizer table 41. The baseband processor 34 can know the phase, channel, and frequency band information based on the current operating settings of the wireless device 11, or in some cases, can derive one or more of the phase, channel, and frequency band from a sensed feedback signal.

At block 706, the baseband processor 34 applies corrections based on the accessed record. Depending on the embodiment, the accessed record from the equalizer table 41 may contain values for one or more variables recorded during the characterization (e.g., RF to envelope tracker delay, compression level, and power maximum (Pmax)). In these cases, the baseband processor 34 may process the variables to apply the appropriate corrections. Taking power amplifier compression as an example, the baseband processor 34 may adjust the input signal to achieve the desired compression level. For example, if a compression level of 2.0 dBm is specified in the accessed record and the current gain is determined to be 2.7 dBm, the baseband processor 34 may reduce the input signal level accordingly. With respect to the delay offset, the baseband processor 34 may set the programmable delay of the delay element 33 according to the delay offset specified in the accessed record.

In some cases, the indexed records may contain values derived from variables. For example, where the records are used to compensate a DPD table, correction values may be derived from the recorded variables and stored in the equalizer table 41.

7B illustrates another process 750 for compensating front-end module operation using a pre-characterized lookup table. Similar to process 700 of FIG. 7A , the baseband processor 34 receives a sensed complex impedance value at block 752 .

At block 754, a coarse tuning function is performed using the antenna tuner 54 integrated within the front end module 45. As previously described with respect to FIG4B , the programmable antenna tuner 54 can be tuned to compensate for the sensed mismatch to some extent, e.g., tuning the impedance load seen by the power amplifier 17 to be closer to a desired value (e.g., closer to 50 ohms), thereby reducing the VSWR.

At block 756, the baseband processor 34 uses the sensed impedance value to access the appropriate record from the equalizer table 41, similar to block 704 of process 700 of FIG7A . At block 758, the baseband processor 34 applies a fine tuning correction based on the accessed record, similar to block 706 of process 700 of FIG7B . For example, the fine tuning may compensate for nonlinearities (e.g., memory effects) having relatively smaller magnitudes than those involved in the coarse correction implemented using the antenna tuner 54.

Example of power amplifier supply mode

8A-8C illustrate waveforms of a power amplifier operating in a fixed supply voltage mode, an average power tracking (APT) mode, and an envelope tracking mode, respectively.

In FIG8A , a graph shows the voltage of an RF signal 804 and a power amplifier supply voltage 802 relative to time. RF signal 804 has a signal envelope 805. It is important that the power amplifier supply voltage 802 of the power amplifier has a voltage level greater than the voltage level of RF signal 804. For example, providing a supply voltage having an amplitude less than that of RF signal 804 to the power amplifier may clip the signal, thereby causing signal distortion and/or other problems. Thus, it is important that the power amplifier supply voltage 802 is greater than the voltage of signal envelope 805. However, it may be desirable to minimize the voltage difference between the power amplifier supply voltage 802 and the signal envelope 805 of RF signal 804 because the area between the power amplifier supply voltage 802 and the signal envelope 805 can represent lost energy, which can reduce battery life and increase heat generated in a mobile device.

FIG8B is a graph showing a power amplifier supply voltage 808 that varies or changes relative to a signal envelope 807 of an RF signal 810. The graph shown in FIG8B may correspond to an average power tracking (APT) mode of power amplifier operation. In contrast to the power amplifier supply voltage 802 of FIG8A , the power amplifier supply voltage 808 of FIG8B varies in discrete voltage increments during different time slots depicted by dashed lines. The amplifier supply voltage 808 during a particular time slot may be adjusted, for example, based on the average power of the envelope 807 during that time slot. For example, the time slots on the right may correspond to a lower power operating mode than the time slots on the left. By reducing the supply voltage during certain time slots, APT operation may improve power efficiency compared to the fixed supply operation shown in FIG8A .

In FIG8C , a graph shows the voltage of an RF signal 816 and a power amplifier supply voltage 814 relative to time. The graph shown in FIG8C may correspond to an envelope tracking mode of operation of a power amplifier. In contrast to the power amplifier supply voltage 802 of FIG8A , the power amplifier supply voltage 814 of FIG8B varies or changes relative to a signal envelope 815. The area between the power amplifier supply voltage 814 and the signal envelope 815 in FIG8C is smaller than the area between the power amplifier supply voltage 802 and the signal envelope 805 in FIG8A , and thus the graph of FIG8C may be associated with a power amplifier system having higher energy efficiency. By tracking the supply voltage to the envelope, envelope tracking operation can improve power efficiency compared to both the fixed supply operation shown in FIG8A and the APT mode shown in FIG8B .

Although Figures 8A-8C show three examples of power amplifier supply voltage with respect to time, the teachings herein apply to other configurations of power supply generation, for example, the teachings herein apply to configurations in which a supply voltage module limits a minimum voltage level of the power amplifier supply voltage.

Example Method for Determining Complex Impedance

9 shows a flow chart of an example method 900 for determining a complex impedance.The determined impedance may be used, for example, to access a record in the equalizer table 41 and/or used during a characterization process.

At block 902, method 900 includes sampling an incident transmit signal path. For example, in this case, measurement switch 53 is switched to receive a forward power signal from the corresponding port of bidirectional coupler 52. At block 904, the method includes obtaining ideal I/Q data from baseband processor 34. For example, the I/Q data may correspond to the transmitted data stream before it is affected by mismatches and other effects within front-end module 45. At block 906, baseband processor 34 or other appropriate components correlate and time-align the ideal I/Q data with the I/Q data for the incident path received from front-end module 45. For example, baseband processor 34 may use a subsampling shifting technique. At block 908, baseband processor 34 or other appropriate components calculates a complex phasor associated with the incident signal, which may be calculated according to the exemplary equation shown in block 908 of FIG. 9 .

At block 910, the power amplifier system 26 switches the measurement switch 53 so that it couples to the reverse power signal from the corresponding port of the bidirectional coupler 52. At block 912, the reflected transmit signal path is sampled. At block 914, the method includes obtaining ideal I/Q data from the baseband processor 34, which may correspond to the transmitted data stream before the data stream is affected by mismatches and other effects within the front-end module 45. At block 906, the baseband processor 34 or other appropriate component correlates and time-aligns the ideal I/Q data with the I/Q data for the reflected path received from the front-end module 45. For example, the baseband processor 34 may use a subsampling shifting technique. At block 918, the baseband processor 34 or other appropriate component calculates the complex phasor associated with the reflected signal, which may be calculated according to the exemplary equation shown in block 918 of FIG. 9 .

At block 920, the baseband processor 34, impedance detector 44, or other appropriate component calculates raw gamma (eg, complex impedance). For example, raw gamma may be calculated by dividing the calculated reflected complex phase by the incident complex phase.

application

Some of the above embodiments have provided examples related to mobile phones. However, the principles and advantages of the embodiments can be applied to any other system or device requiring a power amplifier system.

Such a power amplifier system can be implemented in a variety of electronic devices. Examples of electronic devices may include, but are not limited to, consumer electronic products, components of consumer electronic products, electronic test equipment, and the like. Examples of electronic devices may also include, but are not limited to, memory chips, memory modules, circuits for optical networks or other communication networks, and disk drive circuits. Consumer electronic products may include, but are not limited to, mobile phones, telephones, televisions, computer monitors, computers, handheld computers, personal digital assistants (PDAs), microwave ovens, refrigerators, automobiles, stereo systems, cassette recorders or players, DVD players, CD players, VCRs, MP3 players, radios, camcorders, cameras, digital cameras, portable memory chips, washing machines, dryers, washer/dryers, copiers, fax machines, scanners, multifunction peripherals, watches, clocks, and the like. Electronic devices may include unfinished products.

in conclusion

Unless the context clearly requires otherwise, the words "including", "comprising", etc. throughout this specification and claims are to be interpreted as having an inclusive meaning, rather than an exclusive or exhaustive meaning; that is, as "including, but not limited to". The word "coupled", as generally used herein, means that two or more elements can be connected directly, or connected through one or more intermediate elements. Similarly, the word "connected" means that two or more elements can be connected directly, or connected through one or more intermediate elements. In addition, the words "herein", "above", "below" and similar words, when used in this application, shall refer to the entirety of this application and not to any particular part of this application. When the context permits, the singular or plural words used in the above-mentioned specific implementations may also include the plural or singular, respectively. The word "or" refers to a list of two or more items, and this word covers all of the following interpretations of the word: any item in the list, all items in the list, and any combination of items in the list.

Furthermore, unless expressly stated otherwise or understood otherwise in the context of use, conditional language used herein, such as "may," "might," "can," "could," "could," "for example," "such as," "for example," and the like, is generally intended to convey that some embodiments include and other embodiments do not include certain features, elements, and/or states. Thus, such conditional language is generally not intended to imply that features, elements, and/or states are in any way required for one or more embodiments, or that one or more embodiments necessarily include logic to determine, with or without author input or prompting, whether such features, elements, and/or states are included in or will be performed in any particular embodiment.

The above detailed description of the embodiment of the present invention is not intended to be exhaustive or limit the present invention to the precise form disclosed above. Although for illustrative purposes, specific embodiments of the present invention and examples have been described above, various equivalent modifications within the scope of the present invention are possible, and those skilled in the relevant art will recognize these. For example, although processes or blocks are presented in a given order, alternative embodiments may perform a program with steps or use a system with blocks in a different order, and some processes or blocks may be deleted, moved, increased, subdivided, combined, and/or modified. Each of these processes or blocks may be performed in various ways. Similarly, although processes or blocks are shown as being performed continuously in time, these processes or blocks may be performed in parallel, or at different times.

The teachings of the invention provided herein can be applied to other systems, not necessarily the system described above.The elements and acts of the various embodiments described above can be combined to provide further embodiments.

Although certain embodiments of the present invention have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the invention. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit of the invention, and the appended claims and their equivalents are intended to cover such forms or modifications as fall within the scope and spirit of the invention.

Claims (19)

1. A power amplifier system, comprising: Modulator, configured to generate radio frequency transmit signals; A front-end module includes a power amplifier and a coupler, the power amplifier being configured to amplify the radio frequency transmit signal to generate an amplified radio frequency transmit signal, the coupler being located between the antenna and the power amplifier, and the coupler being configured to output measurements of both the forward power and the reverse power associated with the amplified radio frequency transmit signal; One or more non-volatile memory devices storing an equalizer table and a digital predistortion table, the equalizer table having multiple entries generated during pre-characterization of the front-end module, the digital predistortion table being configured to perform memoryless digital predistortion on the RF transmit signal; and The processor is configured to: (a) receive a voltage standing wave ratio (VSWR) measurement derived from the forward power and the reverse power output from the coupler; (b) access entries in the equalizer table based at least in part on the VSWR measurement; and (c) adjust the RF transmit signal based on the digital predistortion table and entries accessed from the equalizer table to compensate for one or more memory effects present in the power amplifier system before the RF transmit signal is amplified by the power amplifier. 2. The power amplifier system of claim 1, wherein a programmable antenna tuner is used to tune the front-end module to the desired voltage standing wave ratio (VSWR) point to generate the equalizer table. 3. The power amplifier system of claim 1, wherein the front-end module does not include an integrated antenna tuner. 4. The power amplifier system of claim 1, wherein the front-end module further comprises a programmable antenna tuner located between the antenna and the coupler. 5. The power amplifier system of claim 1, wherein the front-end module further comprises one or more duplexers located between the power amplifier and the bidirectional coupler, and the duplexers facilitate at least some of the memory effects. 6. The power amplifier system of claim 4, wherein the programmable antenna tuner is adjustable to tune the impedance seen by the power amplifier in order to provide coarse nonlinear correction within the power amplifier system, and the modulation of the radio frequency transmit signal based on the accessed entry provides fine nonlinear correction within the power amplifier system. 7. The power amplifier system of claim 1, wherein the coupler is a bidirectional coupler. 8. The power amplifier system of claim 1, wherein the processor is further configured to adjust the radio frequency transmit signal by adapting the values in the digital predistortion table based on entries accessed in the equalizer table. 9. The power amplifier system of claim 1, further comprising an envelope tracking system configured to provide a power supply control signal to the power amplifier to control the voltage level of the power amplifier based on a shaped envelope signal, the processor further configured to adjust the delay between the radio frequency transmit signal and the supply control signal based on a delay value contained in an accessed equalizer table entry. 10. A method for characterizing a front-end module of a wireless device, comprising: A programmable antenna tuner is used to tune the impedance load at the output of the power amplifier of the front-end module, thereby achieving a voltage standing wave ratio (VSWR) value associated with a first characterization state among multiple front-end module characterization states. The front-end module is driven by a radio frequency (RF) transmission signal, which is driven according to one or more additional parameter values associated with the first characterization state. When the front-end module is driven and tuned to the voltage standing wave ratio (VSWR) using the radio frequency (RF) transmit signal, one or more variables associated with the behavior of the front-end module are measured; and A table in non-volatile memory records the variables of the one or more measurements associated with the first characterization state, the variables of the one or more recorded variables including power amplifier compression. 11. The method of claim 10, further comprising: repeating the steps of using, driving, measuring, and recording for a plurality of additional representation states among the plurality of front-end module representation states. 12. The method of claim 10, wherein the programmable antenna tuner is separate from the front-end module, and the front-end module does not include the antenna tuner. 13. The method of claim 10, wherein the programmable antenna tuner is integrated in the front-end module. 14. The method of claim 10, wherein the variable of the one or more records further includes the maximum envelope power. 15. The method of claim 10, wherein the one or more recorded variables further include a delay between the power control signal for the power amplifier and the radio frequency transmit signal. 16. A mobile device, comprising: Modulator, configured to generate radio frequency transmit signals; A front-end module includes a power amplifier and a coupler, wherein the power amplifier is configured to amplify the radio frequency (RF) transmit signal to generate an amplified RF transmit signal, the coupler is configured to receive the amplified RF transmit signal, the power amplifier is configured to receive a power amplifier supply voltage for powering the power amplifier, and the coupler is configured to output measured values of both forward power and reverse power associated with the amplified RF transmit signal. An antenna configured to transmit the amplified radio frequency signal; One or more non-volatile memory devices storing an equalizer table and a digital predistortion table, the equalizer table having multiple entries generated during pre-characterization of the front-end module, the digital predistortion table being configured to perform memoryless digital predistortion on the RF transmit signal; and The processor is configured to: (a) receive a voltage standing wave ratio (VSWR) measurement derived from the forward power and the reverse power output from the coupler; (b) access entries in the equalizer table based at least in part on the VSWR measurement; and (c) adjust the RF transmit signal based on the digital predistortion table and the accessed entries to compensate for one or more memory effects present in the power amplifier before the RF transmit signal is amplified by the power amplifier. 17. The mobile device of claim 16, wherein the front-end module further comprises one or more duplexers that facilitate at least some of the one or more memory effects. 18. A power amplifier system, comprising: A front-end module includes: a power amplifier configured to amplify a radio frequency (RF) transmit signal to generate an amplified RF transmit signal; a programmable antenna tuner coupled to an antenna; and a coupler located between the power amplifier and the antenna tuner, the coupler being configured to output measurements of both forward and reverse power associated with the amplified RF transmit signal; the antenna tuner is adjustable to tune the impedance seen by the power amplifier in order to provide coarse correction for nonlinearity within the power amplifier system. One or more non-volatile memory devices storing an equalizer table and a digital predistortion table, the equalizer table having multiple entries generated during pre-characterization of the front-end module, the digital predistortion table being configured to perform memoryless digital predistortion on the RF transmit signal; and The processor is configured to: (a) receive a voltage standing wave ratio (VSWR) measurement derived from the forward power and the reverse power output from the coupler; (b) access entries in the equalizer table based at least in part on the VSWR; and (c) adjust the radio frequency (RF) transmit signal based on the digital predistortion table and the accessed entries before the RF transmit signal is amplified by the power amplifier. 19. The power amplifier system of claim 18, wherein the front-end module further comprises a duplexer.