HK1215886A1 - 利用世代數的重命名 - Google Patents

利用世代數的重命名

Info

Publication number
HK1215886A1
HK1215886A1 HK16103789.1A HK16103789A HK1215886A1 HK 1215886 A1 HK1215886 A1 HK 1215886A1 HK 16103789 A HK16103789 A HK 16103789A HK 1215886 A1 HK1215886 A1 HK 1215886A1
Authority
HK
Hong Kong
Prior art keywords
renaming
generation numbers
numbers
generation
Prior art date
Application number
HK16103789.1A
Other languages
English (en)
Inventor
索菲．威爾遜
約翰．雷德福
塔里克．庫爾德
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Publication of HK1215886A1 publication Critical patent/HK1215886A1/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
HK16103789.1A 2014-04-25 2016-04-05 利用世代數的重命名 HK1215886A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201461984706P 2014-04-25 2014-04-25
US14/530,111 US9841974B2 (en) 2014-04-25 2014-10-31 Renaming with generation numbers

Publications (1)

Publication Number Publication Date
HK1215886A1 true HK1215886A1 (zh) 2016-09-23

Family

ID=53039212

Family Applications (1)

Application Number Title Priority Date Filing Date
HK16103789.1A HK1215886A1 (zh) 2014-04-25 2016-04-05 利用世代數的重命名

Country Status (4)

Country Link
US (1) US9841974B2 (zh)
EP (1) EP2937775A1 (zh)
CN (1) CN105242906B (zh)
HK (1) HK1215886A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9841974B2 (en) * 2014-04-25 2017-12-12 Avago Technologies General Ip (Singapore) Pte. Ltd. Renaming with generation numbers
US11561792B2 (en) * 2015-06-08 2023-01-24 Qualcomm Incorporated System, apparatus, and method for a transient load instruction within a VLIW operation
EP3994573A4 (en) * 2019-07-03 2022-08-10 Huaxia General Processor Technologies Inc. SYSTEM AND ARCHITECTURE OF A PURE FUNCTIONAL NEURAL NETWORK ACCELERATOR
US11119772B2 (en) 2019-12-06 2021-09-14 International Business Machines Corporation Check pointing of accumulator register results in a microprocessor

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5539911A (en) * 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5996063A (en) * 1997-03-03 1999-11-30 International Business Machines Corporation Management of both renamed and architected registers in a superscalar computer system
EP0863460B1 (en) * 1997-03-03 2005-08-24 International Business Machines Corporation Management of renamed registers in a superscalar computer system
US6370637B1 (en) * 1999-08-05 2002-04-09 Advanced Micro Devices, Inc. Optimized allocation of multi-pipeline executable and specific pipeline executable instructions to execution pipelines based on criteria
GB0002848D0 (en) * 2000-02-08 2000-03-29 Siroyan Limited Communicating instruction results in processors and compiling methods for processors
JP3817436B2 (ja) * 2000-09-28 2006-09-06 株式会社東芝 プロセッサおよびリネーミング装置
US7069411B1 (en) * 2003-08-04 2006-06-27 Advanced Micro Devices, Inc. Mapper circuit with backup capability
US7043626B1 (en) * 2003-10-01 2006-05-09 Advanced Micro Devices, Inc. Retaining flag value associated with dead result data in freed rename physical register with an indicator to select set-aside register instead for renaming
US7529913B2 (en) * 2003-12-23 2009-05-05 Intel Corporation Late allocation of registers
KR100628573B1 (ko) * 2004-09-08 2006-09-26 삼성전자주식회사 조건부실행명령어의 비순차적 수행이 가능한 하드웨어장치 및 그 수행방법
US7363469B2 (en) * 2006-03-28 2008-04-22 International Business Machines Corporation Method and system for on-demand scratch register renaming
US9841974B2 (en) * 2014-04-25 2017-12-12 Avago Technologies General Ip (Singapore) Pte. Ltd. Renaming with generation numbers

Also Published As

Publication number Publication date
US9841974B2 (en) 2017-12-12
CN105242906B (zh) 2018-05-04
US20150309796A1 (en) 2015-10-29
EP2937775A1 (en) 2015-10-28
CN105242906A (zh) 2016-01-13

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