HK1213402B - Methods and apparatus for video encoders and decoders - Google Patents

Description

Methods and apparatus for video encoders and decoders

This application is a divisional application of an invention patent application filed on June 29, 2010, with application number 201080038907.7 and invention name “Method and device for signaling intra-frame prediction of large blocks for video encoders and decoders”.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Application Serial No. 61/222,177 (Attorney Docket No. PU090082), filed July 1, 2009, which is hereby incorporated by reference in its entirety.

Technical Field

The present principles relate generally to video encoding and decoding, and more particularly to methods and apparatus for video encoders and decoders to signal intra prediction of large blocks.

Background Art

Most modern video coding standards employ various coding modes to effectively reduce correlation in the spatial and temporal domains. For example, in the International Organization for Standardization/International Electrotechnical Commission (ISO/IEC) Moving Picture Experts Group-4 (MPEG-4) Part 10 Advanced Video Coding (AVC) standard/International Telecommunication Union-Telecom (ITU-T) H.264 Recommendation (hereinafter referred to as the "MPEG-4 AVC standard"), pictures can be intra-coded or inter-coded. In intra-pictures, all macroblocks are coded in intra mode, thereby exploiting spatial correlation within the picture. Intra modes can be categorized into the following three types: INTRA4×4; INTRA8×8; and INTRA16×16. INTRA4×4 and INTRA8×8 support nine intra-prediction modes, while INTRA16×16 supports four intra-prediction modes.

INTRA4×4 and INTRA8×8 support the following nine intra-frame prediction modes: vertical prediction, horizontal prediction, DC prediction, diagonal down/left prediction, diagonal down/right prediction, vertical-left prediction, horizontal-down prediction, vertical-right prediction, and horizontal-up prediction. INTRA16×16 supports the following four intra-frame prediction modes: vertical prediction, horizontal prediction, DC prediction, and planar prediction. Turning to FIG. 1 , the INTRA4×4 and INTRA8×8 prediction modes are generally indicated by reference numeral 100. In FIG. 1 , reference numeral 0 indicates a vertical prediction mode, reference numeral 1 indicates a horizontal prediction mode, reference numeral 3 indicates a diagonal down/left prediction mode, reference numeral 4 indicates a diagonal down/right prediction mode, reference numeral 5 indicates a vertical-right prediction mode, reference numeral 6 indicates a horizontal-down prediction mode, reference numeral 7 indicates a vertical-left prediction mode, and reference numeral 8 indicates a vertical-up prediction mode. The DC mode, which is part of the INTRA4×4 and INTRA8×8 prediction modes, is not shown. 2 , the INTRA16x16 prediction mode is generally indicated by reference numeral 200. In FIG2 , reference numeral 0 indicates vertical prediction mode, reference numeral 1 indicates horizontal prediction mode, and reference numeral 3 indicates planar prediction mode. The DC mode, which is part of the INTRA16x16 prediction mode, is not shown.

INTRA4×4 uses a 4×4 discrete cosine transform (DCT). INTRA8×8 uses an 8×8 transform. INTRA16×16 uses a cascaded 4×4 transform. For signaling, INTRA4×4 and INTRA8×8 share the same macroblock type (mb_type) 0 and are distinguished by a transform size flag (transform_8×8_size_flag). The choice of intra prediction mode in INTRA4×4 or INTRA8×8 is then signaled by the most likely mode (and possibly the remaining modes if necessary). For INTRA16×16, all intra prediction modes are signaled in mb_type along with the coded block pattern (cbp) type, which uses mb_type values from 1 to 24. Table 1 shows the detailed signaling of the macroblock types for intra-coded slices (I slices). If larger blocks of size greater than 16×16 are used for intra prediction, several possible problems are faced as follows.

(1) If INTRA32×32 or INTRA64×64 prediction were added by simply extending mb_type in the MPEG-4 AVC standard, it would cause too much overhead for the two new modes, and in addition, hierarchical types of intra prediction would not be allowed. An example of hierarchical types of intra prediction is explained as follows. If a 32×32 block is used as a large block and sub-division into 16×16 is allowed, then for each 16×16 sub-division, INTRA4×4, INTRA8×8, and INTRA16×16 should be allowed.

(2) If a larger transform (such as a 16x16 transform) instead of a concatenated transform is used for INTRA16x16, the current signaling cannot be applied.

(3) Different priorities should be given to intra prediction modes within an intra partition type.

Table 1

There are several prior art methods related to signaling large motion (inter) partitions in the extensions of the MPEG-4 AVC standard. Regarding the first prior art method, an example of how large motion (inter) partitions are signaled in the extensions of the MPEG-4 AVC standard is described. The first prior art method describes how to signal for 32×32 blocks or 64×64 blocks using a hierarchical coding structure.

Furthermore, in addition to the existing motion partition sizes (16×16, 16×8, 8×16, 8×8, 8×4, 4×8, and 4×4) in the MPEG-4 AVC standard, extended inter-frame coding for the MPEG-4 AVC standard has been proposed using 32×32, 32×16, and 16×32 partitions. Turning to FIG3 , motion partitions for 32×32 blocks are generally indicated by reference numeral 300. These partitions include 32×32, 32×16, 16×32, and 16×16. A 16×16 partition can be further divided into partitions of sizes 16×16, 16×8, 8×16, and 8×8. Furthermore, an 8×8 partition can be further divided into partitions of sizes 8×8, 8×4, 4×8, and 4×4.

For each 32x32 block, mb32_skip_flag is used to signal SKIP mode or DIRECT mode in a manner similar to that performed for other modes of the MPEG-4 AVC standard. In addition, the original mb_type for the M×N (M=8 or 16 and N=8 or 16) partition in the MPEG-4 AVC standard is also used to signal the 2M×2N partition in the 32x32 block. If the mb32_type of 32×32 indicates the use of 16×16 partition, four 16×16 blocks are signaled in raster scan order using the same syntax elements as macroblock_layer() in the MPEG-4 AVC standard. Each 16×16 block can be further partitioned down from size 16×16 to size 4×4 in a quadtree manner.

For the macroblock size 64×64, the following partitions are added above the partition used in the 32×32 block: 64×64, 64×32, and 32×64. Thus, more than one hierarchical layer is added to the macroblock partitions above the block size 32×32. The original mb_type of the M×N (M=8 or 16 and N=8 or 16) macroblock partition in the MPEG-4 AVC standard is used to signal the 4M×4N macroblock partition in the 64×64 macroblock. If the 32×32 macroblock partition is used for the 64×64 block, each 32×32 block will be processed in the same manner as described above.

However, existing literature does not address how to signal large intra mode, where large intra mode is defined to mean intra prediction involving partition blocks having a size equal to or greater than 32x32.

Summary of the Invention

These and other deficiencies and shortcomings of the prior art are addressed by the present principles, which are directed to methods and apparatus for video encoders and decoders for signaling intra prediction of large blocks.

According to one aspect of the present principles, an apparatus is provided. The apparatus includes a video encoder that encodes picture data for at least one large block in a picture by signaling intra prediction for the at least one large block. The intra prediction is signaled by selecting a basic coding unit size and assigning a single spatial intra partition type for the basic coding unit size. The single spatial intra partition type is selectable from a plurality of spatial intra partition types. The at least one large block has a large block size that is larger than a block size of the basic coding unit. The intra prediction is hierarchical intra prediction and is performed on the at least one large block by at least one of: splitting the large block size into the basic coding unit size and merging from the basic coding unit size to the large block size.

According to another aspect of the present principles, a method in a video encoder is provided. The method includes encoding picture data of at least one large block in the picture by signaling intra prediction for the at least one large block. The intra prediction is signaled by selecting a basic coding unit size and assigning a single spatial intra partition type for the basic coding unit size. The single spatial intra partition type is selectable from a plurality of spatial intra partition types. The at least one large block has a large block size that is larger than a block size of the basic coding unit. The intra prediction is hierarchical intra prediction and is performed on the at least one large block by at least one of: splitting the large block size into the basic coding unit size and merging from the basic coding unit size to the large block size.

According to yet another aspect of the present principles, an apparatus is provided. The apparatus includes a video decoder configured to decode picture data of at least one large block in a picture by determining intra prediction to be performed for the at least one large block. The intra prediction is determined by determining a basic coding unit size and determining a single spatial intra partition type for the basic coding unit size. The single spatial intra partition type is determinable from a plurality of spatial intra partition types. The at least one large block has a large block size that is larger than a block size of the basic coding unit. The intra prediction is hierarchical intra prediction and is performed on the at least one large block by at least one of: splitting the large block size into the basic coding unit size and merging the basic coding unit size into the large block size.

According to yet another aspect of the present principles, a method in a video decoder is provided. The method includes decoding picture data of at least one large block in a picture by determining intra prediction to be performed for the at least one large block. The intra prediction is determined by determining a basic coding unit size and determining a single spatial intra partition type for the basic coding unit size. The single spatial intra partition type is determinable from a plurality of spatial intra partition types. The at least one large block has a large block size that is larger than a block size of the basic coding unit. The intra prediction is hierarchical intra prediction and is performed on the at least one large block by at least one of: splitting the large block size into the basic coding unit size and merging from the basic coding unit size to the large block size.

These and other aspects, features and advantages of the present principles will become apparent from the following detailed description of example embodiments, which is to be read in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The present principles will be better understood with reference to the following exemplary drawings, in which:

FIG1 is a diagram illustrating INTRA4×4 and INTRA8×8 prediction modes to which the present principles may be applied;

FIG2 is a diagram illustrating an INTRA16×16 prediction mode to which the present principles may be applied;

FIG3 is a diagram illustrating motion partitioning for a 32×32 block to which the present principles may be applied;

FIG4 is a block diagram of an exemplary video encoder to which the present principles may be applied, according to an embodiment of the present principles;

FIG5 is a block diagram of an exemplary video decoder to which the present principles may be applied, according to an embodiment of the present principles;

FIG6 is a block diagram of an exemplary hierarchical partitioning to which the present principles may be applied, according to an embodiment of the present principles;

7A and 7B are flowcharts illustrating exemplary methods for encoding picture data of a large block by signaling intra-frame prediction for the large block, in accordance with an embodiment of the present principles; and

8A and 8B illustrate flowcharts of exemplary methods for decoding picture data of a large block by determining intra prediction to be applied to the large block, in accordance with an embodiment of the present principles.

DETAILED DESCRIPTION

The present principles are directed to methods and apparatus for video encoders and decoders to signal intra prediction for large blocks.

This description illustrates the present principles. Thus, it will be appreciated that those skilled in the art will be able to develop various arrangements not explicitly described or shown herein that embody the present principles and are included within their spirit and scope.

All examples and conditional language recited herein are intended for teaching purposes to aid the reader in understanding the present principles and concepts contributed by the inventor(s) to further the art, and should be construed as not being limited to such specifically recited examples and conditions.

In addition, all statements herein reciting principles, aspects, and embodiments of the present principles, and specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents and equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.

Thus, for example, those skilled in the art will recognize that the block diagrams presented herein represent conceptual views of illustrative circuitry embodying the present principles. Similarly, it will be recognized that any flow charts, flow diagrams, state transition diagrams, pseudo-code, and the like may substantially represent various processes that are embodied in a computer-readable medium and thereby executed by a computer or processor, whether or not such computer or processor is explicitly shown.

The functions of the various elements shown in the figures can be provided by using dedicated hardware and hardware capable of executing software in association with appropriate software. When a processor is utilized to provide the functions, the functions can be provided by a single dedicated processor, by a single shared processor, or by a plurality of independent processors, some of which can be shared. In addition, the explicit use of the terms "processor" or "controller" should not be interpreted as referring exclusively to hardware capable of executing software, but rather may implicitly include, without limitation, digital signal processor ("DSP") hardware, read-only memory ("ROM") for storing software, random access memory ("RAM"), and non-volatile storage.

Other conventional and/or custom hardware may also be included. Similarly, any switches shown in the figures are conceptual only. Their functions may be performed by the operation of program logic, by dedicated logic, by the interaction of program control and dedicated logic, or even manually, as will be more specifically understood from the context, the implementer having the choice of the specific technique.

In the claims herein, any element referred to as a means for performing a specified function is intended to encompass any means of performing that function, including, for example, a) a combination of circuit elements that perform that function or b) any form of software, thus including firmware or microcode, combined with appropriate circuitry for executing the software to perform the function. The invention defined by such claims resides in the fact that the functionality provided by the various recited components is combined and brought together in the manner required by the claims. Any components that can provide those functions are therefore considered equivalent to those shown herein.

Reference throughout this specification to "one embodiment" or "an embodiment" of the present principles and other variations thereof means that a particular feature, structure, characteristic, etc. described in connection with the embodiment is included in at least one embodiment of the present principles. Thus, the appearances of the phrases "in one embodiment" and "in an embodiment," as well as any other variations, throughout the specification are not necessarily all referring to the same embodiment.

It should be appreciated that the use of any of “/,” “and/or,” and “at least one of,” such as in the case of “A/B,” “A and/or B,” and “at least one of A and B,” is intended to include a selection of only the first listed option (A), or only the second listed option (B), or a selection of both options (A and B). As another example, in the case of “A, B, and/or C,” and “at least one of A, B, and C,” such wording is intended to include a selection of only the first listed option (A), or only the second listed option (B), or only the third listed option (C), or only the first and second listed options (A and B), or only the first and third listed options (A and C), or only the second and third listed options (B and C), or a selection of all three options (A, B, and C). As will be readily appreciated by those of ordinary skill in this and related arts, this can be extended to many listed items.

Furthermore, it should be understood that although one or more embodiments of the present principles are described herein with respect to an extension to the MPEG-4 AVC standard, the present principles are not limited to only that extension or that standard and, therefore, may be utilized with respect to other video coding standards, recommendations, and extensions thereof while maintaining the spirit of the present principles.

As used herein, "high-level syntax" refers to syntax present in a bitstream that resides hierarchically above the macroblock layer. For example, as used herein, high-level syntax may refer to, but is not limited to, syntax at the slice header level, the supplemental enhancement information (SEI) level, the picture parameter set (PPS) level, the sequence parameter set (SPS) level, and the network abstraction layer (NAL) unit header level.

Also, as used herein, the words "picture" and "image" are used interchangeably and refer to a still image or a picture from a video sequence.As is known, a picture can be a frame or a field.

Furthermore, as used herein, the term "signaling" refers to indicating something to a corresponding decoder. For example, an encoder may signal intra-prediction designated for a particular large block (as defined herein) so that the decoder knows that a particular prediction type (e.g., intra or inter) is used on the encoder side. In this way, the same prediction type may be used on both the encoder and decoder sides. Thus, for example, an encoder may transmit an indication (e.g., a signal) for a particular large block that intra-prediction is to be performed on the large block so that the decoder is simply aware of and selects the same prediction type for the large block. It will be appreciated that this signaling may be implemented in a variety of ways. For example, one or more syntax elements, flags, etc. may be used to signal information to the corresponding decoder.

4 , an exemplary video encoder to which the present principles may be applied is indicated generally by the reference numeral 400 , in accordance with an embodiment of the present principles.

The video encoder 400 includes a frame ordering buffer 410 having an output in signal communication with a non-inverting input of a combiner 485. The output of the combiner 485 is connected in signal communication with a first input of a transformer and quantizer 425. The output of the transformer and quantizer 425 is connected in signal communication with a first input of an entropy encoder 445 and a first input of an inverse transformer and inverse quantizer 450. The output of the entropy encoder 445 is connected in signal communication with a first non-inverting input of a combiner 490. The output of the combiner 490 is connected in signal communication with a first input of an output buffer 435.

A first output of the encoder controller 405 is connected in signal communication with a second input of the frame sorting buffer 410, a second input of the inverse transformer and inverse quantizer 450, an input of the picture type determination module 415, an input of the macroblock type (MB type) determination module 420, a second input of the super intra prediction module 460, a second input of the deblocking filter 465, a first input of the motion compensator 470, a first input of the motion estimator 475, and a second input of the reference picture buffer 480.

A second output of the encoder controller 405 is connected to a first input of a supplemental enhancement information (SEI) inserter 430, a second input of the transformer and quantizer 425, a second input of the entropy encoder 445, a second input of the output buffer 435, and an input of a sequence parameter set (SPS) and picture parameter set (PPS) inserter 440 in a signal communication manner.

A first output of the picture type determination module 415 is connected in signal communication with a third input of the frame sorting buffer 410. A second output of the picture type determination module 115 is connected in signal communication with a second input of the macroblock type determination module 420.

An output of the sequence parameter set (SPS) and picture parameter set (PPS) inserter 440 is connected in signal communication with a third non-inverting input of the combiner 490 .

An output of the inverse quantizer and inverse transformer 450 is connected in signal communication with a first non-inverting input of a combiner 419. An output of the combiner 419 is connected in signal communication with a first input of a super intra prediction module 460 and a first input of a deblocking filter 465. An output of the deblocking filter 465 is connected in signal communication with a first input of a reference picture buffer 480. An output of the reference picture buffer 480 is connected in signal communication with a second input of a motion estimator 475. A first output of the motion estimator 475 is connected in signal communication with a second input of a motion compensator 470. A second output of the motion estimator 475 is connected in signal communication with a third input of the entropy encoder 445.

An output of the motion compensator 470 is connected in signal communication with a first input of a switch 497. An output of the super intra prediction module 460 is connected in signal communication with a second input of the switch 497. An output of the macroblock type determination module 420 is connected in signal communication with a third input of the switch 497. The third input of the switch 497 determines whether the "data" input (as opposed to the control input (i.e., the third input)) of the switch is provided by the motion compensator 470 or the super intra prediction module 460. An output of the switch 497 is connected in signal communication with a second non-inverting input of the combiner 419 and an inverting input of the combiner 485.

The frame sorting buffer 410 and the input of the encoder controller 405 are available as inputs to the encoder 400 for receiving input pictures 401. In addition, the input of the supplemental enhancement information (SEI) inserter 430 is available as input to the encoder 400 for receiving metadata. The output of the output buffer 435 is available as an output of the encoder 400 for outputting a bitstream.

5 , an exemplary video decoder to which the present principles may be applied is indicated generally by the reference numeral 500 , in accordance with an embodiment of the present principles.

The video decoder 500 includes an input buffer 510 having an output connected in signal communication with a first input of an entropy decoder 545. The first output of the entropy decoder 545 is connected in signal communication with a first input of an inverse transformer and inverse quantizer 550. The output of the inverse transformer and inverse quantizer 550 is connected in signal communication with a second non-inverting input of a combiner 525. The output of the combiner 525 is connected in signal communication with a second input of a deblocking filter 565 and a first input of a super intra prediction module 560. A second output of the deblocking filter 565 is connected in signal communication with a first input of a reference picture buffer 580. The output of the reference picture buffer 580 is connected in signal communication with a second input of a motion compensator 570.

A second output of the entropy decoder 545 is connected in signal communication with a third input of the motion compensator 570 and a first input of the deblocking filter 565. A third output of the entropy decoder 545 is connected in signal communication with an input of the decoder controller 505. A first output of the decoder controller 505 is connected in signal communication with a second input of the entropy decoder 545. A second output of the decoder controller 505 is connected in signal communication with a second input of the inverse transformer and inverse quantizer 550. A third output of the decoder controller 505 is connected in signal communication with a third input of the deblocking filter 565. A fourth output of the decoder controller 505 is connected in signal communication with a second input of the super intra prediction module 560, a first input of the motion compensator 570, and a second input of the reference picture buffer 580.

An output of the motion compensator 570 is connected in signal communication with a first input of a switch 597. An output of the super intra prediction module 560 is connected in signal communication with a second input of the switch 597. An output of the switch 597 is connected in signal communication with a first non-inverting input of the combiner 525.

An input of the input buffer 510 is available as an input of the decoder 500 for receiving an input bitstream. A first output of the deblocking filter 565 is available as an output of the decoder 500 for outputting an output picture.

As noted above, the present principles are directed to methods and apparatus for signaling intra prediction of large blocks for video encoders and decoders.Furthermore, as noted above, a large block to which the present principles may apply is defined to mean a block having a size equal to or greater than 32x32.

In an embodiment, for ease of notation, the signaling of intra prediction is split into two parts: sip_type (spatial intra partitioning type, which can be INTRA4×4, INTRA8×8, INTRA16×16, etc.); and intra_pred_mode within each sip_type (such as, for example, 9 intra prediction modes within INTRA4×4 and INTRA8×8). In further detail regarding a specific embodiment, the following three rules are proposed for the present principle: (1) selecting a basic coding unit; (2) allowing hierarchical intra prediction by splitting or merging from the largest intra prediction type; and (3) for each sip_type, assigning a higher priority to the most frequently used intra_pred_mode. With respect to rule (1), several sip_types are allowed to be used for a basic coding unit.

One embodiment

In one embodiment, the basic coding unit is set to 16×16. In this coding unit, sip_type is allowed to be INTRA4×4, INTRA8×8, and INTRA16×16. Hierarchical intra prediction is also allowed, as shown in FIG6 .

6 , an exemplary hierarchical partitioning to which the present principles may be applied is indicated generally by reference numeral 600 . In this embodiment, if the maximum block size is set to 64×64, “split signaling” is used to allow hierarchical intra prediction. That is, in an embodiment, an intra64_flag is added. If intra64_flag is equal to 1, INTRA64×64 is used. Otherwise, if intra64_flag is equal to 0, the 64×64 block 611 is split into four 32×32 blocks 621 . For each 32×32 block 621 , an intra32_flag is added. If intra32_flag is equal to 1, INTRA32×32 is used. Otherwise, if intra32_flag is equal to 0, all sip_types allowed in a 16×16 basic coding unit are also allowed here (e.g., for the 32×32 block 621). For intra_pred_mode in INTRA16×16, there are DC mode and directional mode. The latter allows different types of directional prediction by transmitting mode information. Thus, the 32×32 intra prediction block 621 can be further split into four 16×16 intra prediction blocks 631. One or more of the four 16×16 intra prediction blocks 631 can be further split into DC mode (not shown), 16×16 mode 641, 8×8 mode 651, and 4×4 mode 661. In this embodiment, the following four 16×16 intra prediction modes are assumed: DC; horizontal (HOR); vertical (VER); and multi-directional (Multi_DIR). Intra_pred_mode is signaled by considering the priority of each mode. In INTRA16×16, since DC mode is used more frequently than other modes, INTRA16×16DC is added to the sip_type table before INTRA16×16. Then, the most_probable_mode indication in intra_pred_mode for INTRA16x16 is removed. Instead, the other three modes (16x16, 8x8 and 4x4) are absolutely indicated.

grammar

Tables 2 and 3 illustrate examples of syntax used in this embodiment. Specifically, Table 2 shows an exemplary specification of sip_type for a 16×16 coding unit in accordance with an embodiment of the present principles, and Table 3 shows an exemplary INTRA16×16 prediction mode in accordance with an embodiment of the present principles. For INTRA32×32/INTRA64×64, the same modes as INTRA16×16 are used. For signaling, the most_probable_mode indication is replaced with intra32_DC_flag and intra64_DC_flag, due to the more frequent use of DC. Other intra_pred_modes are then coded absolutely.

The intra_pred_mode signaling for INTRA4x4 and INTRA8x8 may be performed exactly as in the MPEG-4 AVC standard, so these modes are not listed in any table.

Table 2

Sip_type index binary bits SIP8×8 0 0 SIP16×16DC 1 10 SIP16×16 2 110 SIP4×4 3 1110

Table 3

Intra prediction mode index binary bits VER 0 0 HOR 1 10 Multi-DIR 2 11

Table 4 shows an exemplary macroblock layer syntax according to an embodiment of the present principles.

Table 4

The semantics of some syntax elements in Table 4 are as follows:

Intra64_flag equal to 1 specifies that INTRA64x64 is used. Intra64_flag equal to 0 specifies that the 64x64 block is further split into 32x32 partitions.

Intra64_DC_flag equal to 1 specifies that intra_pred_mode is the DC mode for INTRA64x64. Intra64_DC_flag equal to 0 specifies that intra_pred_mode is not the DC mode for INTRA64x64.

intra_pred_mode_64 specifies the intra prediction mode (excluding DC mode) for INTRA64×64.

intra_multidir_index specifies the index of the angle used for Multi_Dir mode in INTRA64×64.

Intra32_flag[i] equal to 1 specifies that INTRA32x32 is used for the i-th 32x32 chunk. intra32_flag[i] equal to 0 specifies that the i-th 32x32 chunk is further split into 16x16 partitions.

Intra32_DC_flag[i] equal to 1 specifies that for the i-th 32x32 block intra_pred_mode is the DC mode for INTRA32x32. Intra32_DC_flag[i] equal to 0 specifies that for the i-th 32x32 block intra_pred_mode is not the DC mode for INTRA32x32.

intra_pred_mode_32[i] specifies the INTRA32x32 intra prediction mode (excluding DC mode) for the i-th 32x32 large block.

intra_multidir_index specifies the index of the angle used for Multi_Dir mode in INTRA32x32.

sip_type[i] specifies the spatial intra partitioning type used for the basic block coding unit in the i-th 16×16 block.

intra_pred_mode_16[i] specifies the INTRA16x16 intra prediction mode (excluding DC mode) for the i-th 16x16 block.

intra_multidir_index specifies the index of the angle of the Multi_Dir mode in INTRA16x16 for the i-th 16x16 block.

Another embodiment

In another embodiment, the large block unit is adaptively selected to be 32x32 or 64x64. One or more high-level syntax elements may be used to signal the selection. In an embodiment, if 32x32 is selected, all syntax related to 64x64 is simply removed.

In another embodiment, hierarchical intra prediction may include merging from basic coding units. For example, if the largest block unit is 64×64 and the basic coding unit is 16×16, a flag (is_all_16×16_coding) is used to indicate whether all 16×16 blocks within a 64×64 block belong to the 16×16 coding type. If is_all_16×16_coding is equal to 1, this indicates that the 16×16 coding type is used and signaling is stopped. Otherwise, a flag (is_all_32×32_coding) is used to indicate whether all 32×32 blocks within a 64×64 block belong to the 32×32 coding type. If is_all_32×32_coding is equal to 1, this indicates that all 32×32 blocks within a 64×64 block belong to the 32×32 coding type. Otherwise, if is_all_32x32_coding and is_all_16x16_coding are equal to 0, this indicates that INTRA64x64 is used.

In another embodiment, a SIP type (large_sip_type) is introduced for block units with a size of not less than 16×16. The three types are referred to as follows: large_intra_16×16; large_intra_32×32; and large_intra_64×64. large_intra_16×16 means that all 16×16 blocks within a large block belong to the 16×16 coding type. large_intra_32×32 means that all 32×32 blocks within a large block belong to the 32×32 coding type. In one embodiment, large_intra_32×32 can be combined with the embodiment described above using intra32_flag to allow hierarchical intra-frame prediction. large_intra_64×64 means that all 64×64 blocks within a large block are coded as INTRA64×64.

In another embodiment, several sip/mode tables may be introduced. These tables may be pre-stored in both the encoder and decoder, or they may be user-specified and transmitted using one or more high-level syntax elements. Table 5 shows an exemplary macroblock layer syntax according to an embodiment of the present principles.

Table 5

The semantics of some syntax elements in Table 5 are as follows:

is_all_16x16_coding equal to 1 specifies that all 16x16 blocks within the large block are coded using the 16x16 coding type. is_all_16x16_coding equal to 0 specifies that the large block is not coded using the 16x16 coding type.

is_all_32x32_coding equal to 1 specifies that all 32x32 blocks within the large block are coded using the 32x32 coding type. is_all_32x32_coding equal to 0 specifies that the large block is not coded using the 32x32 coding type.

7A and 7B , which together illustrate an exemplary method for encoding picture data of a large block by signaling intra prediction for the large block, generally indicated by the reference numeral 700. Method 700 includes a start block 705, which passes control to a function block 710. Function block 710 performs initialization and passes control to a loop limit block 715. Loop limit block 715 performs a loop (hereinafter also referred to as loop 1) on a 64×64 block (i.e., a block having a 64×64 block size) and passes control to a function block 785 and a loop limit block 720.

Function block 785 performs the intra 64×64 mode decision, sets the Intra64_DC_flag based on RD64 (ie, the rate-distortion resulting from the Intra64×64 mode decision), and passes control to decision block 770 .

The loop limit block 720 performs a loop (hereinafter also referred to as loop 2) on four 32×32 blocks (i.e., four blocks having a 32×32 block size and obtained from the current 64×64 block processed by loop 1) and passes control to the function block 790 and the loop limit block 725.

Function block 790 performs the intra 32×32 mode decision, sets the Intra32_DC_flag based on RD32 (ie, the rate-distortion resulting from the Intra32×32 mode decision), and passes control to decision block 750 .

The loop limit block 725 performs a loop (hereinafter also referred to as loop 3) on four 16×16 blocks (i.e., four blocks having a 16×16 block size and obtained from the current 32×32 block processed by loop 2) and passes control to function blocks 730 and 735.

Function block 730 evaluates the Intra16x16_DC mode and passes control to function block 740. Function block 735 evaluates other 16x16 modes (i.e., other than Intra16x16_DC) and following modes (e.g., 8x8, 4x4, etc.) and passes control to function block 740.

Function block 740 performs a 16×16 mode decision based on RD16 (i.e., the rate-distortion resulting from the Intra16×16 mode decision), then accumulates the RD16 for each 16×16 block to obtain TotRD16 (which indicates the total rate-distortion for the entire 32×32 block when encoded by four 16×16 blocks), and passes control to loop limit block 745. Loop limit block 745 ends the loop for the 16×16 blocks (i.e., loop 3) and passes control to decision block 750.

Decision block 750 determines whether RD32 is less than TotRD16 (i.e., whether the rate-distortion cost of the current 32×32 block is less than the total rate-distortion cost of the four 16×16 blocks obtained from the current 32×32 block). If so, control is passed to function block 755. Otherwise, control is passed to function block 742.

Function block 755 sets Intra32_flag equal to 1 and passes control to function block 760. Function block 742 sets Intra32_flag equal to 0 and passes control to function block 760.

Function block 760 sets the accumulation of RD32 for each 32×32 block to TotRD32 to indicate the total rate-distortion of the entire 64×64 block when encoded by four 32×32 blocks, and passes control to loop limit block 765. Loop limit block 765 ends the loop for the 32×32 blocks (i.e., loop 2) and passes control to decision block 770.

Decision block 770 determines whether RD64 is less than TotRD32 (i.e., whether the rate-distortion cost of the current 64×64 block is less than the total rate-distortion cost of the four 32×32 blocks obtained from the current 64×64 block). If so, control is passed to function block 775. Otherwise, control is passed to function block 780.

Function block 775 sets Intra64_flag equal to 1 and passes control to loop limit block 795. Function block 780 sets Intra64_flag equal to 0 and passes control to loop limit block 795.

The loop limit block 795 ends the loop on the 64×64 block (ie, loop 1) and passes control to a function block 797 . The function block 797 entropy encodes the flag, intra_pred_mode, and residual, and passes control to an end block 799 .

8A and 8B , which together illustrate an exemplary method, generally designated by the reference numeral 800 , for decoding picture data for a large block by determining intra-frame prediction to be applied to the large block. Method 800 includes a start block 805 , which passes control to a function block 808 . Function block 808 initializes the decoder and then passes control to a function block 810 . Function block 810 parses the bitstream and passes control to a loop limit block 815 . Loop limit block 815 performs a loop on the 64×64 blocks (hereinafter also referred to as loop 1 ) and passes control to a decision block 820 . Decision block 820 determines whether the Intra64_flag is set equal to 1. If so, control is passed to a function block 885 . Otherwise, control is passed to a loop limit block 825 .

Function block 885 determines whether Intra64_DC_flag is set equal to 1. If so, control is passed to function block 887. Otherwise, control is passed to function block 888. Function block 887 performs Intra64×64 DC prediction and then passes control to function block 890. Function block 888 performs Intra64×64 prediction except for Intra64×64 DC mode and then passes control to function block 890. Function block 890 decodes the current 64×64 block and passes control to loop limit block 880. Loop limit block 880 ends the loop on the 64×64 block (i.e., loop 1) and passes control to end block 899.

The loop limit block 825 performs a loop on the four 32×32 blocks (hereinafter also referred to as loop 2) and passes control to a decision block 830. The decision block 830 determines whether Intra32_flag is equal to 1. If so, control is passed to a function block 835. Otherwise, control is passed to a loop limit block 845.

Function block 835 determines whether Intra32_DC_flag is equal to 1. If so, control is passed to function block 837. Otherwise, control is passed to function block 838. Function block 837 performs Intra32×32 DC prediction and passes control to function block 840. Function block 838 performs intra prediction modes other than Intra32×32 DC mode and then passes control to function block 840. Function block 840 decodes the 32×32 block and passes control to loop limit block 875.

The loop limit block 875 ends the loop on the 32×32 block (ie, loop 2 ) and passes control to the loop limit block 880 .

The loop limit block 845 performs a loop on the four 16×16 blocks (hereinafter also referred to as loop 3) and passes control to the decision block 850. The decision block 850 determines whether sip_type=Intra16_DC. If so, control is passed to the function block 855. Otherwise, control is passed to the function block 860.

Function block 855 performs Intra16x16_DC mode prediction and passes control to function block 865. Function block 860 performs mode prediction using other intra prediction modes (ie, other than Intra16x16_DC mode) and passes control to function block 865.

Function block 865 decodes the 16×16 block and passes control to loop limit block 870 . Loop limit block 870 ends the loop on the 16×16 block (ie, loop 3 ) and passes control to loop limit block 875 .

Some of the many attendant advantages/features of the present invention will now be described, some of which have been mentioned above. For example, one advantage/feature is an apparatus having a video encoder that encodes picture data for at least one large block in a picture by signaling intra-frame prediction for the at least one large block. The intra-frame prediction is signaled by selecting a basic coding unit size and assigning a single spatial intra-frame partitioning type for the basic coding unit size. The single spatial intra-frame partitioning type is selectable from a plurality of spatial intra-frame partitioning types. The at least one large block has a large block size that is larger than the block size of the basic coding unit. The intra-frame prediction is hierarchical intra-frame prediction and is performed on the at least one large block by at least one of the following operations: splitting the large block size into the basic coding unit size and merging from the basic coding unit size to the large block size.

Another advantage/feature is the apparatus having the video encoder as described above, wherein for each of a plurality of spatial intra partition types, a most frequently used particular intra prediction mode among a plurality of available intra prediction modes is assigned a higher priority.

Yet another advantage/feature is the apparatus having the video encoder as described above, wherein the macroblock size is adaptively selected.

Yet another advantage/feature is the apparatus having the video encoder as described above, wherein signaling is performed using one or more high-level syntax elements.

Furthermore, another advantage/feature is the apparatus having the video encoder as described above, wherein at least one of the spatial intra partition type table and the intra prediction mode table is pre-stored and used by the video encoder to encode at least one large block, and wherein the at least one of the spatial intra partition type table and the intra prediction mode table is pre-stored and used by a corresponding video decoder to decode the at least one large block.

Additionally, another advantage/feature is an apparatus having a video encoder as described above, wherein at least one of the spatial intra partitioning type table and the intra prediction mode table is used by the video encoder to encode at least one large block and is transmitted by the video encoder using one or more high-level syntax elements.

Based on the teachings herein, those skilled in the art can easily determine these and other features and advantages of the present principles.It should be understood that the teachings of the present principles can be implemented in various forms of hardware, software, firmware, special purpose processors, or a combination thereof.

More preferably, the teaching of the present principles is implemented as a combination of hardware and software. In addition, the software can be implemented as an application program tangibly embodied on a program storage unit. The application program can be uploaded to a machine comprising any appropriate architecture and executed by the machine. Preferably, the machine is implemented on a computer platform having hardware such as one or more central processing units ("CPUs"), random access memories ("RAMs"), and input/output ("I/O") interfaces. The computer platform can also include an operating system and microinstruction code. The various processes and functions described herein can be a part of the microinstruction code that may be executed by the CPU or a part of the application program, or any combination thereof. In addition, various other peripheral units such as additional data storage units and printing units can be connected to the computer platform.

It should also be understood that since some of the constituent system components and methods depicted in the accompanying drawings are preferably implemented in software, the actual connections between these system components or processing function blocks may vary depending on how the present principles are programmed. Given the teachings herein, one of ordinary skill in the art will be able to contemplate these and similar implementations or configurations of the present principles.

Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the present principles are not limited to those precise embodiments, and that various changes and modifications may be made therein by one of ordinary skill in the art without departing from the scope and spirit of the present principles. All such changes and modifications are intended to be included within the scope of the present principles as set forth in the appended claims.

Claims (8)

1. A method in a video encoding apparatus, the method comprising: The large blocks of frame data are encoded by determining which large blocks in the frame need to be encoded using intra-frame prediction, wherein the large blocks have a block size larger than the basic coding unit size, the large block size being one of 32×32 and 64×64, and the basic coding unit size is 16×16. For the large block, the intra-frame prediction is signaled through the following operation: Encode binary split signaling syntax elements, which specify whether the large block is further split into four equal-sized sub-blocks; In the case where the binary split signaling syntax element specifies that the block is not to be further split, the intra-frame prediction mode for the block is encoded. Otherwise, in the case where the binary splitting signaling syntax element specifies that the large block is further split: For each sub-block, if the sub-block is 32×32, a binary splitting signaling syntax element is encoded specifying whether the 32×32 sub-block is further split into four blocks of equal basic coding unit size; and if the binary splitting signaling syntax element specifying whether the 32×32 sub-block is further split into four blocks of equal basic coding unit size specifies that the 32×32 sub-block is not further split, an intra-prediction mode for the 32×32 sub-block is encoded; and For each sub-block, in the case that the sub-block is 16×16, a single spatial intra-frame partition type is encoded, which can be determined from multiple spatial intra-frame partition types. 2. The method of claim 1, further comprising: Encode at least one binary merge signaling syntax element, which specifies whether blocks of basic coding unit size are merged into larger blocks. 3. The method of claim 1, wherein at least one of the spatial intra-frame partitioning type table and the intra-frame prediction mode table is pre-stored and used by the encoding method to encode the bulk block. 4. The method of claim 1, wherein at least one of the spatial intra-frame partitioning type table and the intra-frame prediction mode table is encoded by the encoding method using one or more high-level syntax elements, and is used by the encoding method to encode the bulk block. 5. A method in a video decoding apparatus, comprising: Decoding the large chunk of frame data involves determining which chunk needs to be intra-frame prediction performed. The large block has a block size larger than the basic coding unit size, and the large block size is one of 32×32 and 64×64, while the basic coding unit size is 16×16. For the large block, the intra-frame prediction is signaled through the following operation: Decode the binary split signaling syntax element, which specifies whether the large block is further split into four equal-sized sub-blocks; In the case where the binary split signaling syntax element specifies that the block is not to be further split, decode the intra-prediction mode for the block; Otherwise, in the case where the binary splitting signaling syntax element specifies that the large block is further split: For each sub-block, if the sub-block is 32×32, decode the binary splitting signaling syntax element specifying whether the 32×32 sub-block is further split into four blocks of equal basic coding unit size; and if the binary splitting signaling syntax element specifying whether the 32×32 sub-block is further split into four blocks of equal basic coding unit size indicates that the 32×32 sub-block is not further split, decode the intra-prediction mode for the 32×32 sub-block; and For each sub-block, in the case that the sub-block is 16×16, a single spatial intra-frame partition type is decoded, which can be determined from multiple spatial intra-frame partition types. 6. The method of claim 5, further comprising: Decode at least one binary merge signaling syntax element, which specifies whether blocks of basic coding unit size are merged into larger blocks. 7. The method of claim 5, wherein at least one of the spatial intra-frame partitioning type table and the intra-frame prediction mode table is pre-stored and used by the decoding method to decode the block. 8. The method of claim 5, wherein at least one of the spatial intra-frame partitioning type table and the intra-frame prediction mode table is received by the decoding method using one or more high-level syntax elements and used by the decoding method to decode the block.