HK1165039A1 - Register mapping techniques for efficient dynamic binary translation - Google Patents
Register mapping techniques for efficient dynamic binary translationInfo
- Publication number
- HK1165039A1 HK1165039A1 HK12105271.5A HK12105271A HK1165039A1 HK 1165039 A1 HK1165039 A1 HK 1165039A1 HK 12105271 A HK12105271 A HK 12105271A HK 1165039 A1 HK1165039 A1 HK 1165039A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- mapping techniques
- binary translation
- dynamic binary
- register mapping
- efficient dynamic
- Prior art date
Links
- 238000013507 mapping Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/441—Register allocation; Assignment of physical memory space to logical memory space
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/24—Loading of the microprogram
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
- G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
- G06F9/45516—Runtime code conversion or optimisation
- G06F9/45525—Optimisation or modification within the same instruction set architecture, e.g. HP Dynamo
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Devices For Executing Special Programs (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/815,023 US8479176B2 (en) | 2010-06-14 | 2010-06-14 | Register mapping techniques for efficient dynamic binary translation |
Publications (1)
Publication Number | Publication Date |
---|---|
HK1165039A1 true HK1165039A1 (en) | 2012-09-28 |
Family
ID=44785163
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK12105271.5A HK1165039A1 (en) | 2010-06-14 | 2012-05-30 | Register mapping techniques for efficient dynamic binary translation |
Country Status (9)
Country | Link |
---|---|
US (1) | US8479176B2 (ko) |
EP (1) | EP2400388A1 (ko) |
JP (1) | JP2012003761A (ko) |
KR (2) | KR20130018925A (ko) |
CN (2) | CN102934082B (ko) |
HK (1) | HK1165039A1 (ko) |
RU (1) | RU2515217C2 (ko) |
SG (1) | SG176872A1 (ko) |
WO (1) | WO2011159739A2 (ko) |
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US8479176B2 (en) * | 2010-06-14 | 2013-07-02 | Intel Corporation | Register mapping techniques for efficient dynamic binary translation |
US9195486B2 (en) * | 2010-07-30 | 2015-11-24 | Apple Inc. | Observation and analysis based code optimization |
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US9141389B2 (en) * | 2011-04-07 | 2015-09-22 | Via Technologies, Inc. | Heterogeneous ISA microprocessor with shared hardware ISA registers |
US9336180B2 (en) | 2011-04-07 | 2016-05-10 | Via Technologies, Inc. | Microprocessor that makes 64-bit general purpose registers available in MSR address space while operating in non-64-bit mode |
US9043580B2 (en) | 2011-04-07 | 2015-05-26 | Via Technologies, Inc. | Accessing model specific registers (MSR) with different sets of distinct microinstructions for instructions of different instruction set architecture (ISA) |
US9128701B2 (en) | 2011-04-07 | 2015-09-08 | Via Technologies, Inc. | Generating constant for microinstructions from modified immediate field during instruction translation |
US8880851B2 (en) | 2011-04-07 | 2014-11-04 | Via Technologies, Inc. | Microprocessor that performs X86 ISA and arm ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline |
US9032189B2 (en) | 2011-04-07 | 2015-05-12 | Via Technologies, Inc. | Efficient conditional ALU instruction in read-port limited register file microprocessor |
US9317288B2 (en) | 2011-04-07 | 2016-04-19 | Via Technologies, Inc. | Multi-core microprocessor that performs x86 ISA and ARM ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline |
US9378019B2 (en) | 2011-04-07 | 2016-06-28 | Via Technologies, Inc. | Conditional load instructions in an out-of-order execution microprocessor |
US9898291B2 (en) | 2011-04-07 | 2018-02-20 | Via Technologies, Inc. | Microprocessor with arm and X86 instruction length decoders |
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US9292470B2 (en) | 2011-04-07 | 2016-03-22 | Via Technologies, Inc. | Microprocessor that enables ARM ISA program to access 64-bit general purpose registers written by x86 ISA program |
US9146742B2 (en) * | 2011-04-07 | 2015-09-29 | Via Technologies, Inc. | Heterogeneous ISA microprocessor that preserves non-ISA-specific configuration state when reset to different ISA |
US9645822B2 (en) | 2011-04-07 | 2017-05-09 | Via Technologies, Inc | Conditional store instructions in an out-of-order execution microprocessor |
US9274795B2 (en) | 2011-04-07 | 2016-03-01 | Via Technologies, Inc. | Conditional non-branch instruction prediction |
US9244686B2 (en) | 2011-04-07 | 2016-01-26 | Via Technologies, Inc. | Microprocessor that translates conditional load/store instructions into variable number of microinstructions |
WO2013048468A1 (en) * | 2011-09-30 | 2013-04-04 | Intel Corporation | Instruction and logic to perform dynamic binary translation |
US10146545B2 (en) | 2012-03-13 | 2018-12-04 | Nvidia Corporation | Translation address cache for a microprocessor |
US9880846B2 (en) | 2012-04-11 | 2018-01-30 | Nvidia Corporation | Improving hit rate of code translation redirection table with replacement strategy based on usage history table of evicted entries |
US10241810B2 (en) | 2012-05-18 | 2019-03-26 | Nvidia Corporation | Instruction-optimizing processor with branch-count table in hardware |
US9032381B2 (en) | 2012-06-29 | 2015-05-12 | Intel Corporation | State recovery methods and apparatus for computing platforms |
KR101642556B1 (ko) * | 2012-09-21 | 2016-07-25 | 인텔 코포레이션 | 이진 번역을 수행하기 위한 방법 및 시스템 |
US10157063B2 (en) * | 2012-09-28 | 2018-12-18 | Intel Corporation | Instruction and logic for optimization level aware branch prediction |
US20140189310A1 (en) | 2012-12-27 | 2014-07-03 | Nvidia Corporation | Fault detection in instruction translations |
KR20140097927A (ko) * | 2013-01-30 | 2014-08-07 | 삼성전자주식회사 | 소프트웨어의 보안을 높이는 방법 |
US10108424B2 (en) * | 2013-03-14 | 2018-10-23 | Nvidia Corporation | Profiling code portions to generate translations |
US9891936B2 (en) | 2013-09-27 | 2018-02-13 | Intel Corporation | Method and apparatus for page-level monitoring |
US20150277914A1 (en) * | 2014-03-27 | 2015-10-01 | John H. Kelm | Lock elision with binary translation based processors |
WO2016162721A1 (en) * | 2015-04-10 | 2016-10-13 | Google Inc. | Binary translation on shared object level |
GB2554201B (en) * | 2015-04-10 | 2022-05-11 | Google Llc | Binary translation into native client |
US10176001B2 (en) | 2015-05-28 | 2019-01-08 | Mitsubishi Electric Corporation | Simulation device, simulation method, and computer readable medium |
US9811324B2 (en) * | 2015-05-29 | 2017-11-07 | Google Inc. | Code caching system |
CN107851006B (zh) * | 2015-08-18 | 2020-12-04 | 华为技术有限公司 | 多线程寄存器映射 |
US10235177B2 (en) * | 2016-07-02 | 2019-03-19 | Intel Corporation | Register reclamation |
US10282182B2 (en) * | 2016-09-23 | 2019-05-07 | Intel Corporation | Technologies for translation cache management in binary translation systems |
US10191745B2 (en) * | 2017-03-31 | 2019-01-29 | Intel Corporation | Optimized call-return and binary translation |
KR102006242B1 (ko) * | 2017-09-29 | 2019-08-06 | 주식회사 인사이너리 | 바이너리 파일에 기초하여 오픈소스 소프트웨어 패키지를 식별하는 방법 및 시스템 |
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US10691435B1 (en) * | 2018-11-26 | 2020-06-23 | Parallels International Gmbh | Processor register assignment for binary translation |
CN111459572B (zh) * | 2020-03-31 | 2023-01-31 | 深圳市汇顶科技股份有限公司 | 程序加载方法、控制器、芯片以及电子设备 |
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US8479176B2 (en) | 2010-06-14 | 2013-07-02 | Intel Corporation | Register mapping techniques for efficient dynamic binary translation |
-
2010
- 2010-06-14 US US12/815,023 patent/US8479176B2/en active Active
-
2011
- 2011-06-08 EP EP11169050A patent/EP2400388A1/en not_active Ceased
- 2011-06-13 JP JP2011130887A patent/JP2012003761A/ja active Pending
- 2011-06-14 SG SG2011093044A patent/SG176872A1/en unknown
- 2011-06-14 KR KR1020127032581A patent/KR20130018925A/ko not_active Application Discontinuation
- 2011-06-14 WO PCT/US2011/040406 patent/WO2011159739A2/en active Application Filing
- 2011-06-14 CN CN201180029387.8A patent/CN102934082B/zh not_active Expired - Fee Related
- 2011-06-14 KR KR1020110057530A patent/KR101381274B1/ko not_active IP Right Cessation
- 2011-06-14 CN CN201110159437.6A patent/CN102298514B/zh not_active Expired - Fee Related
- 2011-06-14 RU RU2011153335/08A patent/RU2515217C2/ru not_active IP Right Cessation
-
2012
- 2012-05-30 HK HK12105271.5A patent/HK1165039A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
CN102298514A (zh) | 2011-12-28 |
CN102934082B (zh) | 2017-06-09 |
WO2011159739A3 (en) | 2012-04-05 |
CN102934082A (zh) | 2013-02-13 |
US20110307876A1 (en) | 2011-12-15 |
RU2515217C2 (ru) | 2014-05-10 |
RU2011153335A (ru) | 2013-07-10 |
KR101381274B1 (ko) | 2014-04-04 |
KR20110136749A (ko) | 2011-12-21 |
JP2012003761A (ja) | 2012-01-05 |
WO2011159739A2 (en) | 2011-12-22 |
SG176872A1 (en) | 2012-01-30 |
US8479176B2 (en) | 2013-07-02 |
KR20130018925A (ko) | 2013-02-25 |
CN102298514B (zh) | 2014-07-16 |
EP2400388A1 (en) | 2011-12-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |
Effective date: 20190619 |