HK1123647B - Method and system for providing service for shared communication network node with mac layer and phy layer - Google Patents

Method and system for providing service for shared communication network node with mac layer and phy layer Download PDF

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Publication number
HK1123647B
HK1123647B HK08113018.3A HK08113018A HK1123647B HK 1123647 B HK1123647 B HK 1123647B HK 08113018 A HK08113018 A HK 08113018A HK 1123647 B HK1123647 B HK 1123647B
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Hong Kong
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burst
data
phy layer
layer
interface
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HK08113018.3A
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Chinese (zh)
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HK1123647A1 (en
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阿维.克利格
伊特谢克.奥哈纳
莫舍.塔拉布
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美国博通公司
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Priority claimed from US11/924,457 external-priority patent/US7782850B2/en
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Publication of HK1123647A1 publication Critical patent/HK1123647A1/en
Publication of HK1123647B publication Critical patent/HK1123647B/en

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Description

System and method for servicing a shared communication network node having a MAC layer and a PHY layer
Technical Field
The present invention relates to information networks, and more particularly to the transmission of information, such as media information, over communication lines, such as coaxial cables, to form communication networks.
Background
Many buildings, including homes, have coaxial cable (coax) based networks.
Multimedia over coax alliance (' MoCA)TM") provides an example of a specification (i.e., available under MoCA 1.0, incorporated herein by reference in its entirety) in its website (www.mocalliance.org) for delivering digital video and entertainment information over coaxial cable. The specification has been published to open members.
Technologies and related technologies (prior art) based on MoCA and other specifications involve a large amount of unused bandwidth of the coaxial cable. For example, over 70% of U.S. households have coaxial cables installed. Some homes have coaxial cables in one or more major entertainment and leisure facilities, such as living rooms, media rooms, and main home rooms. MoCATMThe technology allows homeowners to utilize installed coaxial cable as a network system to deliver higher quality of service (QoS) entertainment and information programming.
The prior art provides high rates (270mbps) and high quality of service, as well as the security inherent in both the highest level of packet-level encryption and the shielded wired connection. Coaxial cables are designed to carry high bandwidth video information. Currently, coaxial cable is commonly used to securely transport millions of dollars in pay-per-view and premium video content. Prior art based networks can be used as a backbone for multiple wireless access points, extending the coverage of wireless services within a building.
The prior art provides a reliable, high throughput, and high quality connection through existing coaxial cables to the location of video equipment currently installed in the home without affecting other service signals in the cable. The prior art provides digital entertainment links and interacts with other wired and wireless networks to extend entertainment throughout a building.
The prior art works in conjunction with access technologies such as asymmetric digital subscriber line ("ADSL"), very high speed digital subscriber line ("VDSL"), and fiber to the home ("FTTH") to provide signals that typically enter the building via twisted pair or fiber, in the operating band of hundreds of kilohertz to 8.5 mhz for ADSL and 12 mhz for VDSL. When services reach the building through any digital subscriber line ("xDSL") or FTTH, these services can be forwarded to the video equipment through existing technology and coaxial cable. Cable operators can provide cable functions such as video, audio, and internet access to the building via cables and utilize coaxial cables running within the building to reach various cable service utilization devices within the building. Typically, the prior art functions are in parallel with the wired functions, but at different frequencies.
Coaxial cable installations in buildings typically include coaxial cables, distributors, and outlets. The splitter typically has one input and two or more outputs for carrying signals in either a forward (input to output) or backward (output to input) direction and isolates the outputs from the different splitters to prevent signals from flowing from one coaxial cable outlet to another. Isolation is very useful because it can a) reduce interference from other devices and b) maximize power transfer from point of entry ("POE") to egress for optimal TV reception.
Prior art components (elements), such as MoCA-based, are dedicated to back-propagation through isolators ("insertion") and from output to output ("isolation"). One can go from one exit to another in a building through a particular "isolation hop" and multiple "insertion hops". Typically the attenuation of the isolation hops is 5 to 40dB, while each intervening hop will attenuate by approximately 3 dB. MoCATMThe technique has a 55dB surplus dynamic range while supporting 200Mbps throughput. Thus, MoCATMThe technology can operate efficiently with a large number of isolators.
Managing network policies, such as MoCATMTechniques are specifically designed to support streaming video without packet loss, thereby providing quality video across outlets.
Since digital cable programs are delivered to buildings where the packet error rate ("PER") threshold is below one part PER million, programs delivered between exits in the building should have similar or less error rates to provide similar visibility. Accordingly, there is a need to provide a system and method for transmitting information over coaxial cables in a building network.
Disclosure of Invention
In accordance with the principles of the present invention, there is provided a system for serving a particular node in a shared communication network having a MAC layer and a PHY layer, the system operating at an interface between the MAC layer and the PHY layer, the system comprising a first physical channel for transmitting at least one data packet between the layers, a second physical channel for transmitting at least one burst parameter between the layers, and a third physical channel for transmitting at least one timing signal for the burst data between the layers, the burst data being defined by the at least one burst parameter and comprising the at least one data packet.
Further in accordance with a preferred embodiment of the present invention the timing signal includes an indication provided by the MAC layer to the PHY layer as to when to transmit at least one burst of data.
Furthermore in accordance with a preferred embodiment of the present invention the timing signal includes an indication provided by the MAC layer to the PHY layer as to when to receive at least one burst of data.
Furthermore, in accordance with a preferred embodiment of the present invention, the at least one burst parameter is transmitted from the MAC layer to the PHY layer before the burst.
Further in accordance with a preferred embodiment of the present invention the at least one burst parameter comprises at least one status parameter of said burst, which is transmitted from the PHY layer to the MAC layer after the burst.
Furthermore in accordance with a preferred embodiment of the present invention the at least one burst parameter comprises at least one reception profile of the burst data.
Further in accordance with a preferred embodiment of the present invention the at least one burst parameter comprises at least one transmission profile of the burst data.
Still further in accordance with a preferred embodiment of the present invention the second physical channel is used for transmitting from the PHY layer to the MAC layer an indication of the range of importance of the physical layer to the different types of status parameters.
Further in accordance with a preferred embodiment of the present invention, the second physical channel includes a multi-criteria pre-processor for pre-processing at least one burst parameter, formatted according to any one of a plurality of access mode defining standards, for transmission between layers.
According to some communication standards, information transmission between PHY layers of a plurality of nodes (possibly including up to several tens of nodes) in a network is multi-channel. These standards include the Tx and Rx bit load tables for each particular node N1 in the network, as well as the Tx and Rx bit load tables for each node with which node N wishes to interact (receive ("Rx") or transmit ("Tx")). The Tx bit loading table for node Ni for a particular node Nn defines for each of a plurality of frequency channels (e.g., 256 or 512 frequency channels) the number of bits loaded in that frequency channel when transmitted to node Nn. The Rx bit loading table for node Ni for a particular node Nn defines for each of a plurality of frequency channels (e.g., 256 or 512 frequency channels) the number of bits loaded in that channel upon reception from node Nn. Keys to access these tables are in the MAC layer.
Further in accordance with a preferred embodiment of the present invention, the system further comprises at least one bit loading table externally saved to the PHY layer.
Further in accordance with a preferred embodiment of the present invention, the second physical channel is used to transfer a specific bit load table represented by a pair of nodes including a Tx node and an Rx node to a PHY layer of at least one of the Tx node and the Rx node when the node is ready to communicate with other nodes.
Further in accordance with a preferred embodiment of the present invention the second physical channel is adapted to transmit at least one information item related to the data burst, except for the content of the data packets contained in the data burst and the time indicated for the transmission of the data burst.
Still further in accordance with a preferred embodiment of the present invention the timing signal includes an alert provided by the PHY layer to the MAC layer that a burst of data has been received.
Further in accordance with a preferred embodiment of the present invention the system further comprises at least one per channel gain table saved externally to the PHY layer.
According to certain communication standards, the transmission of information between PHY layers of multiple nodes of a network (which may include up to several tens of nodes) is multi-channel. Some of these standards include a per-channel gain table for each particular node N in the network that defines the transmit power of each of a plurality of frequency channels (e.g., 256 or 512 frequency channels) as node N transmits to other nodes. Keys to access these tables are in the MAC layer.
Further in accordance with a preferred embodiment of the present invention, the second physical channel is used to transmit the per-channel gain table represented by a particular Tx node to the PHY layer of that Tx node.
Still further in accordance with a preferred embodiment of the present invention, the at least one status parameter transmitted after the burst of data includes at least one of: SNR information indicating the burst data and channel response information indicating the burst data.
Furthermore, according to the preferred embodiment of the present invention, the second physical channel transmits the configuration information of the specific burst data, and at least one data packet of the burst data before the specific burst data is still transmitted through the first physical channel, thereby shortening the inter-frame distance between the specific burst data and the burst data before the specific burst data.
There is also provided, in accordance with the principles of the present invention, a method of operating a particular node in a shared communication network having a MAC layer and a PHY layer, the method operating at an interface between the MAC layer and the PHY layer, the method including transmitting at least one data packet over a first physical channel between the layers, transmitting at least one burst parameter over a second physical channel between the layers, and transmitting at least one timing signal for a burst over a third physical channel between the layers, the burst being defined by the at least one burst parameter and including the at least one data packet.
Further in accordance with a preferred embodiment of the present invention, the burst data is transmitted from a particular node to another node.
Drawings
The foregoing and other features and advantages of the invention will be apparent from the following detailed description of the invention when taken in conjunction with the accompanying drawings. In the drawings:
FIG. 1 is a simplified functional block diagram of a MAC-PHY interface in a single device constructed and operative in accordance with the principles of the present invention;
FIGS. 2A-2B are tables of signals with respect to FIG. 1, illustrated from a PHY perspective, in accordance with the principles of the present invention;
fig. 3 is a timing diagram from MAC to PHY illustrating preferred timing from the MAC of fig. 1 to the PHY of fig. 1 in accordance with the principles of the present invention;
fig. 4 is several state diagrams of the operation of the PHY of fig. 1 in accordance with the principles of the present invention;
fig. 5 is a table of parameters for the PHY layer of fig. 1 in accordance with the principles of the present invention;
FIG. 6 is a preferred block diagram of data transfer between the MAC and PHY through the MAC protocol data ("MPD") interface of FIG. 1;
fig. 7 is a schematic diagram of a burst initialization parameter structure according to the principles of the present invention;
FIG. 8 is a preferred timing diagram for a preferred mode of operation of the interface device of FIG. 1;
fig. 9 is a timing diagram for burst initialization according to the principles of the present invention;
fig. 10 is a timing diagram of the result of a receive ("RX") burst according to the principles of the present invention.
FIG. 11 is a graph of RX result budget time according to the principles of the present invention;
FIG. 12 is a timing diagram illustrating the results of a burst data initialization interrupt RX burst in a system constructed in accordance with the present invention;
13-16 are tables and timing diagrams that together illustrate features of an exemplary embodiment of a portion of the interface of FIG. 1, in accordance with the principles of the present invention;
FIGS. 17-20 are timing diagrams that together illustrate a partial interface implementation of FIG. 1, in accordance with the principles of the present invention;
fig. 21 is a block diagram of a single-chip or multi-chip device that may be used in connection with the interface of fig. 1 in accordance with the principles of the present invention.
Detailed Description
Fig. 1 is a MAC-PHY interface 1 in a single device constructed and operative in accordance with the principles of the present invention. Interface 1 may be implemented using MoCATMThe MAC-PHY interface ("MPI") of the art is established in a standard manner, supporting communication between the PHY layer 10 and the MAC layer 20, while the PHY layer 10 and the MAC layer 20 communicate with different devices.
The interface 1 includes: a MAC protocol data ("MPD") interface 110 including an 8-bit data bus 112, a management interface 120 including a 4-bit data bus 122, a control interface 130, and a configuration interface 140. Interface 110 may be used to receive data from MAC 20 or transmit data to MAC 20. The management interface 120 may be used to transmit burst initiation parameters and receive RX burst result parameters. Control interface 130 may be used for PHY operation and burst arrival time. Interface 140 may be used to configure PHY layer 10.
Fig. 2A-2B together form a table that shows, from the perspective of PHY layer 10, attributes of example signals communicated via interface 1 (see fig. 1) (i.e., signals identified as input ("I") are from MAC layer 20 and are inputs to PHY layer 10).
A CPU connected to the MAC layer 20 can access the PHY layer 10 (see fig. 1) via the MAC layer 20 using the interface 1. The CPU may do so through a serial port for configuration, initialization, and debugging. The configuration port may utilize the PHY _ CLK 134 (see fig. 1) signal as a serial clock. Protocols are generally defined in conjunction with a serial interface to allow read and write access.
Management interface 120 is a channel through which MAC layer 20 can configure PHY layer 10 (typically with MoCA)TMBurst parameters together) and receives the burst result and status from the PHY layer 10 therethrough.
Fig. 3 is a timing diagram of MAC to PHY showing the timing from the MAC layer 20 to the PHY layer 10. MNG _ DIR signal 124 may be used to set the direction of data transmission.
MPD interface 110 may be used to transmit RX/TX data.
Fig. 4 shows several operational state diagrams, such as reset, wait, and activity that PHY layer 10 may accomplish. In the reset state, the PHY layer 10 and the MAC layer 20 normally change their signals to inactive values. The reset signal is not part of the MAC-PHY interface apparatus shown and described herein. The wait is the state of the PHY layer 10 when the PHY layer 10 is inactive in RX or TX. While in the standby state, the PHY layer 10 reduces power consumption by turning off unnecessary functions. However, the parameter registrar typically remains active for read and write operations. Upon PHY _ STRT 132 (see fig. 1) determination, PHY layer 10 enters the active state and remains in that state until the burst processing ends. While in the active state, paths MPD _ TX 116 and/or MPD _ TX 118 (see interface 110 in fig. 1) may be in the active state. Both MPD _ TX 116 and MPD _ TX 118 may be active if when TX immediately follows RX and RX is not yet finished after TX starts. In the active state, only the active path is open and the other paths should be closed.
Fig. 5 shows exemplary parameters that may include performance and dynamic parameters of the PHY layer 10 (see fig. 1). The parameter may be based on the specific implementation of the vendor. The PHY layer 10 dynamic parameters are preferably separated from the burst parameters and configuration parameters. The burst parameters may vary on a per burst basis, while the configuration parameters may vary during operation of interface 1 (see fig. 1) and may affect operation of PHY layer 10. Burst parameters may be accessed through management interface 120 and configuration parameters may be accessed through configuration interface 140.
Fig. 6 illustrates data transferred between MAC layer 20 and PHY layer 10 via MPD interface 140, which may include an example MAC frame 200, which may include CRCs 210 and 214 for header 218 and payload 222, respectively. A forward error correction ("FEC") pad field 230 is typically added by the PHY layer 10. In MoCATMIn RX (PHY to MAC), typically, the FEC padding field 230 is transmitted over the MPD interface 140, while the MAD layer 20 strips off (de-pad) the FEC padding field.
Fig. 7 shows an exemplary format for transferring data through the management interface 120 (see fig. 1). The format typically includes a list of variable parameters. Different parameters are typically initialized according to TX, RX, and burst data types. The data starts with a segment length of 32 bits and a list of parameters as shown in fig. 7.
Fig. 8 shows an exemplary mode of operation of the interface 1 (see fig. 1). Prior to each RX or TX burst, MAC layer 20 typically sends parameters to PHY layer 10 via MNG _ DATA bus 122, which PHY layer 10 may use to send or receive. After the RX burst, the PHY layer 10 generally transmits RX burst parameters, which generally include a reception burst status, RX learning parameters, and a probe result in a probe (probe), to the MAC layer 20.
Fig. 9 shows an exemplary burst initialization ("burst initialization"). PHY _ STRT 132 is typically acknowledged (alert) at the burst delay time before the first symbol of the header appears on the coax. The MAC layer 20 may send the burst initialization parameters using the first part of the burst delay time. PHY layer 10 may use the second portion of the burst delay time to hold off the burst initialization point until the first symbol of the header appears on the coax. In an RX burst, the PHY layer 10 typically starts acquisition at the end of the burst delay. Once PHY _ STRT 132 determines (authorization), PHY layer 10 starts reading burst parameters from MAC layer 20 even if the RX result is in the process of transmitting. The burst initialization time typically allows 400 bits of burst parameters to be sent to the PHY layer 10 before a burst. The PHY layer 10 start delay may be 5 microseconds ("uS" or "μ S") which may provide increased pre-burst preparation time.
Fig. 10 shows that PHY layer 10 may begin transmitting RX burst results after the RX processing delay end time. The RX processing delay time is typically measured from the end of the last symbol of the coaxial cable to the maximum delay in processing the RX burst. Fig. 11 shows that the maximum time to transmit the RX result parameter may be 33.8 μ S (854B). Fig. 12 shows that RX burst results may be interrupted by burst initialization.
Fig. 13-16 illustrate exemplary features of a data interface, such as MPD interface 110 (see fig. 1).
MPD interface 110 of fig. 1 generally includes a DATA bus, e.g., MPD _ DATA bus 112, DATA enable signals, e.g., MPD _ DATA _ EN signal 114, and TX/RX signals, e.g., MPD _ TX signal 116 and MPD _ RX signal 118. Signals 116 and 118 generally define the direction of data bus 112 and generally cannot be activated simultaneously. MPD _ RX signal 118 generally stops transmission to MAC layer 20 before MPD _ TX 116 transmits. The tail of MPD _ RX signal 118 may be transmitted over MPD _ DATA 112 before the header of the next TX burst begins transmission.
The mid-data gap ("MDG") is defined herein as the time on the coaxial cable between the last symbol of the RX and the first symbol of the TX payload. During this gap, all RX data is typically transmitted to MAC layer 20, and after the header ends, enough data can be read for transmission. In some embodiments, the MDG may be 21.52uS in a 50MHz bandwidth, although any suitable MDG may be used. MDGs typically include a minimum interframe gap ("IFG") of 7.8us (10us-2.2us) and a minimum header time. In some embodiments, the minimum preamble time (minimum preamble, "P4," minimum allowed cyclic prefix of size 10 samples, "CP") may be 13.72us in a 50MHz bandwidth, although any suitable minimum preamble time may be used. In some embodiments, this time may be 6.86us in turbo mode, although any suitable minimum preamble time may be used.
The middle symbol gap ("MSG") is defined as the time between the end of the last symbol of RX in the coaxial cable and the first symbol from a device, such as a consumer electronics ("CE") device. During this gap, the FFT machine typically completes processing of the last RX symbol, while the IFFT typically completes processing of the CE symbol, with the first CE sample typically appearing in the medium at the end of the preamble. In certain embodiments, the MSG may be generally 9.08us in a 50MHz bandwidth, but may be any suitable MSG. In some embodiments, in turbo mode (100MHz), the MSG may be 8.44, but may be any suitable MSG. MSG typically includes a minimum IFG of 7.8us (10us-2.2us) and a short preamble time. In some embodiments, the short preamble time may be 1.28us (L2) in a 50MHz bandwidth, although any short preamble time may be used. In some embodiments, this time may be 0.64us in turbo mode, although any suitable minimum header time may be used.
IFG (see fig. 11 and 12) is the gap time on MPD _ DATA bus 112 between two bursts of DATA transmitted on MPD _ DATA bus 112. IFG is typically the MAC time of the internal delay, which is typically 0.5us (25 cycles for PHY _ CLK).
The timing of the PHY layer 10 will now be explained. There are generally two time critical (time critical) paths between RX and TX bursts in the PHY:
path a: FFT to IFFT. The time between the end of the FFT processing the last symbol of the RX burst and the beginning of the IFFT processing the first symbol (CE) of the TX burst; and
and a path B: RX data to TX data. The time between the last bit of the RX burst data across interface 1 (see fig. 1) and the first bit of the TX burst data beginning to be transmitted across interface 1.
For path a, the time from RX path to FFT is typically cumulative, except for the time from IFFT to TX path. For path B, the time for all RX and TX paths is typically accumulated, except for MPD _ IFG.
Examples of RX path delay and TX path time are given in fig. 13 and 14, respectively.
Referring again to the two DATA bursts transmitted on MPD _ DATA bus 112, as shown in fig. 15, MPD _ TX signal 116 is generally asserted by PHY layer 10 when the first DATA bit of TX burst TX (1) is transmitted over MPD _ DATA bus 112 until the last bit of the burst. Fig. 16 illustrates that MPD _ RX signal 118 is asserted from the first DATA symbol (e.g., an adaptive constellation polyphonic ("ACMT") symbol) received on the coax medium until the last bit of the RX burst is transmitted on MPD _ DATA bus 112. MAC layer 20 typically detects the acknowledgement of MPD RX signal 118 and locks the network timer ("NT") to the arrival timestamp ("ATS"). The ATS is typically used to compare with the transmission start time to synchronize NT with the network controller NT. MPD _ RX signal 118 is typically deasserted when detection is finished and two CE symbols arrive within an allowable range defined by a predetermined number of samples. The time between the beginning of the preamble appearing on the medium and the acknowledgement MPD _ RX signal 118 is generally based on the preamble type and CP.
Fig. 17-20 illustrate attributes of an exemplary embodiment of the configuration interface 140 (see fig. 1). Fig. 17 illustrates a serial read operation in which the MAC layer 20 drives the first part of the process, including the PHY register address. The PHY layer 10 drives the second part of the process, including the request data. Whether MAC layer 20 or PHY layer 10 drives management interface 120, each bit driven on CNFG _ SERIAL _ DATA line 142 is synchronized with PHY _ CLK 134 (see fig. 1). MAC layer 20 may set the first bit of CNFG _ SERIAL _ DATA line 142 to "1". The second bit is a "1," indicating a read operation. The MAC layer 20 may drive the next 16 bits, where the PHY register address is stored. After the 16-bit address, MAC layer 20 typically sets the bit to "0" and sets CNFG _ SERIAL _ DATA line 142 to a known state.
PHY layer 10 may drive 0 to 32 bit "0" bits on CNFG _ SERIAL _ DATA line 142, starting with a second PHY _ CLK 134, after MAC layer 20 stops driving interface 1 (see fig. 1). PHY layer 10 may set a bit to "1" to indicate that data begins with 32 data bits thereafter. This process is typically complete by setting the end to "0" and setting the CNFG _ SERIAL _ DATA line 142 to a known state before releasing the line to be driven by the MAC layer 20.
Fig. 18 shows an exemplary timing of the fastest PHY layer 10 in response to a read operation. When MAC layer 20 is no longer driving a signal, CNFG _ SERIAL _ DATA line 142 may be set to 0 using internal and external pull-down resistors. CNFG _ SERIAL _ DATA pin 142 generally continues to be controlled by MAC layer 20.
FIG. 19 shows an exemplary serial write operation. For serial write operations, the MAC layer 20 typically drives the entire process. Each bit driven by MAC layer 20 on CNFG _ seral _ DATA line 142 is generally synchronized with PHY _ CLK signal 134. MAC layer 20 typically sets a "1" to the first bit of CNFG _ SERIAL _ DATA line 142. The second bit is "0" to indicate a write operation. The next 16 bits are typically the address location of the PHY layer 10. The next 32 bits are typically data written to the located PHY layer 10 register. At the end of the 32-bit data, the MAC layer 20 typically terminates with a "0". Once this process is complete, the MAC layer 20 typically stops driving the management interface 120. When MAC layer 20 is no longer driving a signal, CNFG _ SERIAL _ DATA line 142 may be set to 0 using internal and external pull-down resistors. CNFG _ SERIAL _ DATA line 142 generally continues to be controlled by MAC layer 20.
Fig. 20 shows the fastest timing diagram for a read operation followed immediately by a write operation.
FIG. 21 illustrates a single-chip or multi-chip module 2102, which may be one or more integrated circuits in data processing system 2100, in accordance with the present invention. The data processing system 2100 may include one or more of the following components: I/O circuitry 2104, peripherals 2106, processor 2108, and memory 2110. These components may be connected together by a system bus or other connector 2112 and placed on a circuit board 2120 in an end user system 2130. Where end user system 2130 may communicate with a coaxial cable medium via an interface, such as interface 1 (see fig. 1).
For clarity, the above description, including specific examples of parameter values provided, is sometimes specific to a particular protocol only, such as by the name MoCATMAnd/or ethernet identification. However, this is not intended to be limiting and the present invention is generally applicable to other protocols and/or other packet protocols. Using a protocol specific to a particular protocol (e.g. by the name MoCA)TMAnd/or ethernet) to describe a particular attribute and embodiment is not intended to limit the attribute and embodiment to a particular protocol. In fact, the term is used generically and each datum includes the same or similar terms defined in other protocols.
It will be appreciated that the software portions of the invention, including programs and data, may be implemented in the form of ROM (read only memory) including CD-ROMs, EPROMs, and EEPROMs, or any other suitable computer-readable medium including, but not limited to, various hard disks, various cards, and RAM. Components such as software described herein may be implemented in whole or in part in hardware, if desired, using conventional techniques.
Features of the invention which are described in the context of separate embodiments may be combined in one embodiment. Conversely, features of the invention which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable combination.
Cross reference to other applications
The following U.S. provisional applications are incorporated herein by reference in their entirety: a provisional application, U.S. Pat. No. 60/866,532, entitled "A METHOD FOR packaging IN ACOORDINED HOME NETWORK", filed on 20.11.2006; provisional application No. 60/866,527, entitled "TRANSMISSION IN COORDINATED HOME NETWORK", filed on 20.11.2006; U.S. provisional application No. 60/866,519, entitled "IQIMBALANCE CORRECTION USE 2-TONE SIGNAL IN MULTI-CARRIER RECEIVERS", filed on 20.11.2006; provisional application No. 60/907,111, entitled "SYSTEMAND METHOD FOR AGGREGATION OF PACKETS FOR TRANSMISSION THROUGH ACOMMUNICATIONS NETWORK", filed 3/21/20076; a provisional application, U.S. Pat. No. 60/907,126 filed on 22.3.2007 entitled "MAC TO PHY INTERFACE APPATUS AND METHOD FOR TRANSRANSMISSION OF PACKETS THROUGH A COMMUNICATIONS NETWORK"; a provisional application, U.S. Pat. No. 60/907,819 filed on 25.3.2007 entitled "SYSTEM ANDMETHODS FOR RETRANSMITTING PACKETS OVER A NETWORK OF COMMUNICATIONCHANNELS"; and U.S. provisional application No. 60/940,998, entitled "MOCA aggregate", filed on 31/5/2007.

Claims (10)

1. A system for servicing a shared communication network node having a MAC layer and a PHY layer, the system operating at an interface between the MAC layer and the PHY layer, the system comprising:
a first physical channel for transmitting at least one data packet between layers;
a second physical channel for transmitting at least one burst parameter between layers; and
a third physical channel for transmitting at least one timing signal between layers for burst data defined by the at least one burst parameter and comprising the at least one data packet;
the interface further comprises a management interface for transmitting burst initial parameters and receiving RX burst result parameters, a control interface for operating as a PHY layer, and a configuration interface for configuring the PHY layer.
2. The system of claim 1, wherein the timing signal comprises an indication provided by the MAC layer to the PHY layer of when to transmit the burst data.
3. The system of claim 1, wherein the timing signal comprises an indication of when to receive the burst data provided by the MAC layer to the PHY layer.
4. The system of claim 1, wherein the at least one burst parameter is transmitted from a MAC layer to a PHY layer prior to the burst data.
5. The system of claim 4, wherein the burst parameter comprises at least one reception configuration attribute of the burst data.
6. The system of claim 4, wherein the at least one burst parameter comprises at least one transmission profile of burst data.
7. The system of claim 1, wherein the at least one burst parameter comprises at least one burst status parameter, and wherein the burst status parameter is transmitted from the PHY layer to the MAC layer after the burst of data.
8. The system of claim 7, wherein the second physical channel is configured to communicate an indication of the range of importance of different types of status parameters from the PHY layer to the MAC layer.
9. The system of claim 1, wherein the second physical channel comprises a multi-criteria pre-processor for pre-processing at least one burst parameter for inter-layer transmission formatted according to any one of a plurality of access mode defining criteria.
10. A method of operating a shared communication network node having a MAC layer and a PHY layer, the method operating at an interface between the MAC layer and the PHY layer, the method comprising:
transmitting at least one data packet between layers through a first physical channel;
transmitting at least one burst parameter over a second physical channel between layers; and
transmitting at least one timing signal for a burst of data defined by the at least one burst parameter and comprising the at least one data packet over a third physical channel between layers;
the interface further comprises a management interface for transmitting burst initial parameters and receiving RX burst result parameters, a control interface for operating as a PHY layer, and a configuration interface for configuring the PHY layer.
HK08113018.3A 2006-11-20 2008-11-28 Method and system for providing service for shared communication network node with mac layer and phy layer HK1123647B (en)

Applications Claiming Priority (16)

Application Number Priority Date Filing Date Title
US86651906P 2006-11-20 2006-11-20
US86652706P 2006-11-20 2006-11-20
US86653206P 2006-11-20 2006-11-20
US60/866,519 2006-11-20
US60/866,527 2006-11-20
US60/866,532 2006-11-20
US90711107P 2007-03-21 2007-03-21
US60/907,111 2007-03-21
US90712607P 2007-03-22 2007-03-22
US60/907,126 2007-03-22
US90781907P 2007-04-18 2007-04-18
US60/907,819 2007-04-18
US94099807P 2007-05-31 2007-05-31
US60/940,998 2007-05-31
US11/924,457 2007-10-25
US11/924,457 US7782850B2 (en) 2006-11-20 2007-10-25 MAC to PHY interface apparatus and methods for transmission of packets through a communications network

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HK1123647B true HK1123647B (en) 2012-09-07

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