HK1069020B

HK1069020B - Vertical cavity surface emitting laser

Info

Publication number: HK1069020B
Application number: HK05101475.7A
Authority: HK
Inventors: Elyahou Kapon; Vladimir Iakovlev; Alexei Sirbu; Alok Rudra
Original assignee: Ecole Polytechnique Federale De Lausanne
Priority date: 2001-03-15
Filing date: 2002-03-08
Publication date: 2007-01-05

Description

Vertical cavity surface emitting laser and method of manufacturing the same

Technical Field

The present invention relates to Vertical Cavity Surface Emitting Lasers (VCSELs), and in particular to electrically pumped long wavelength VCSELs and multi-wavelength VCSEL arrays, and methods of fabricating the same.

Background

A VCSEL is a semiconductor laser comprising an active region sandwiched between mirror stacks, which may be semiconductor Distributed Bragg Reflectors (DBRs) [ n.m. margalit et al, "transverse oxidation long wavelength continuous wave vertical cavity laser", appl.phys.lett., 69(4), 1996, 7, 22, pp.471-472], or a combination of semiconductor and dielectric DBRs [ y.oshi o et al, "1.55 micron VCSEL with wafer fused ingaasp/alrsia DBR", Electronics Letters, vol.32, No.16, 1966, 8, 1 ]. One of the mirror stacks is typically partially reflective to pass a portion of the coherent light that is generated within the resonant cavity formed by the mirror stack sandwiching the active region. The VCSEL is excited by a current flowing through the active region. The mirror stack is typically formed of a plurality of layer pairs of a material system, typically composed of two materials, which have different refractive indices and are readily lattice matched to the rest of the VCSEL. For example, gaas-based VCSELs typically employ an aluminum-as/gaas or aluminum-as/gaas material system in which the different refractive indices of each layer in a layer pair are achieved by varying the aluminum content within the layer pair.

VCSEL is a preferred light source that is widely accepted in communication applications because it has the following excellent properties: the single mode signal produced by a VCSEL is easily coupled to an optical fiber, has low divergence, and is inherently monochromatic in operation.

Due to the small characteristics of VCSELs, it is often an important requirement for VCSELs to operate to compensate for the small amount of gain medium. This is related to the following fact: in order to reach the threshold of excitation, the total gain of the VCSEL must be equal to the total optical loss of the VCSEL. To compensate for the small amount of gain medium and to be able to reach and maintain the threshold of excitation, a wafer of one or two mirror stacks with reflectivity values above 99.5% is typically fused for the active region. Wafer fusion is a process whereby materials with different lattice constants are atomically bonded by applying pressure and heat to create a true physical fusion.

VCSELs emitting long wavelength light are very useful in the optical communications industry. The long wavelength VCSEL can be obtained by using a VCSEL with an InGaAs/InGaAsP active cavity material, and an InGaP/InGaAsP material system is used as a mirror lamination to realize lattice matching with InP. However, such a system is practically impossible to obtain a DBR-based mirror with a sufficiently high reflectivity because of the small difference in refractive index in this material. Attempts have been made to solve this problem from a number of aspects, including wafer fusion techniques, in which a DBR mirror is grown on a separate substrate and fused into the active region.

Another important requirement for VCSEL fundamental mode operation and optical coupling to single mode fibers is current confinement and optical confinement. In order to reduce the light emitting area of VCSELs (in practice to 5-10 microns), the current flow aperture (current aperture) can be restricted by lateral oxidation of the aluminum-containing layer, which also causes a change in the lateral refractive index of the fundamental optical mode operation of these devices. In this type of lateral oxidation technique, a mesa is etched onto the top surface of the VCSEL wafer and the exposed sidewalls of the aluminum-containing layer (typically an aluminum gallium arsenide layer) are exposed to water vapor at an elevated temperature, the exposure of the water vapor causing the aluminum gallium arsenide to convert to AlGaOx, which occurs within a certain distance (related to the duration of oxidation) from the sidewalls to the central vertical axis. The formation of the current aperture defines the active region of the device, in which the active cavity material is located, in which current flows and light is generated, and the lateral refractive index variation allows control of the mode structure of the emitted light. This method can be used for virtually all short wavelength AlGaAs/Ga (in) As (P) VCSELs (i.e., emission between 0.65-1.1 microns), but also for long wavelength VCSELs (i.e., emission between 1.25-1.65 microns), which may include DBR mirrors grown in the same material system as the active region [ S.Rapp et al, "near room temperature continuous wave operation of an electrically pumped 1.55 micron vertical cavity laser with InGaAsP/InP bottom mirror," Electronics Letters, Vol.35, No.1, 1999, 1, 7], and AlGaAs-based DBRs grown [ W.Yuen et al, "high performance 1.6 micron Top emission VCSELs," Electronics Letters, Vol.36, No.13, 2000, 6, 22] or formed by fusing wafers to active cavity materials grown on InP (as described in Marglit et al, cited earlier). However, this method results in a non-planar structure, which requires mesa etching, and thus has a complicated process and low productivity. Lateral oxidation is sensitive to many factors such as temperature, surface quality and defects, and does not yield current apertures of precise dimensions, especially sufficient uniformity required for processing multi-wavelength arrays using cavity length fabrication. In the case of laterally oxidized devices, it is difficult to utilize a high performance aluminum arsenic/gallium arsenic DBR with the highest index contrast and the best thermal characteristics compared to other aluminum gallium arsenic/gallium arsenic DBRs.

Current confinement and optical confinement can be achieved during fusion of a p-type gaas based DBR to the p-side of an active cavity material grown on an inp wafer using wafer fusion techniques. For this purpose, a special structural treatment of one of the two contact wafers is required. The structured surface comprises a central mesa surrounded by a shallow etched region and an unetched semiconductor facet. The fused front surface in the central mesa and the large surface of the unetched semiconductor are in the same plane. Current confinement is obtained by placing the original oxide layer of the fused interface outside the central mesa [ a.v. syrbu, v.p.iakovler, f.gabofit, i.sagnes, j.c. hart and r.raj for "30 ° continuous wave operation of 1.52 micron ingaasp/algaas vertical cavity laser with lateral current confinement produced in situ by local fusion", Electronics Letters, vol.34, No.18, 1998, 9, 3], or the fused interface where the proton implant region of the fused interface is placed outside the central mesa (see us patent 5,985,686). However, this method has the following drawbacks: the fused p-gaas and p-inp based interfaces are generally high resistive, causing severe overheating of the device; it is difficult to optimize a p-AlGaAs/GaAs DBR for long wavelength VCSELs to make it combine high reflectivity (low absorption) with low resistivity.

According to a different approach to long wavelength VCSEL fabrication techniques, a tunnel junction can be used to inject holes into the active region, thus allowing the use of n-type DBRs on both sides of the active cavity material. In U.S. patent No. WO 98/07218, the p-side of an indium phosphorus based active cavity material is fused to a substrate comprising an n-type DBR stack and an n-type DBR layer⁺⁺/p⁺⁺A p-GaAs surface of the tunnel junction with AlGaAs/GaAs-based structure. In these devices, standard mesa etching and aluminum gallium arsenide wet oxidation are performed for lateral optical confinement and current confinement. In addition to the above-mentioned drawbacks associated with this particular lateral confinement technique and the high resistance p-gaas/p-inp fused junction, it is also difficult to obtain a low resistance reverse biased tunnel junction in gaas with respect to low bandgap materials.

In a more recent approach, a so-called "buried tunnel junction structure" is employed, which is formed within a low bandgap indium phosphorous-based active cavity material. [ M.Ortsiefer et al, "data-guided room temperature operation of 1.55 micron InP-based VCSELs", Electronic Letters, Vol.36, No.13, 2000, 3, 2 l. The VCSEL structure includes an oxide DBR and a semiconductor DBR. An n-type semiconductor DBR, a p-type material terminated cavity material, and a p⁺⁺/n⁺⁺The tunnel junction structure is grown in a first epitaxial process. Then, the shallow mesa structure is etched through the tunnel junction until p is reached⁺⁺And regrowing an n-type InP layer in the second epitaxial process. An oxide DBR is then deposited over the n-InP. In this structure, the buried tunnel junction provides a lateral current confinement path. However, an oxide DBR with an inherently low thermal conductivity is placed between the active region and the heat sink. The resulting device represents a free standing epitaxial structure without a substrate, thus increasing the complexity of handling such devices and degrading productivity.

A paper published by Boucart et al in IEEE Journal of Selected topocs in Quantum electronics, Vol.5, No.3, 1999, pp.520-529 "degenerate DBR and tunnel junction implants: a continuous wave RT monolithic long wavelength VCSEL "discloses a VCSEL that includes a tunnel junction incorporated into the active cavity material and a metamorphic n-type AlGaAs/GaAs DBR that is grown on the active cavity material in the same epitaxial process. In this case, since the n-AlGaAs DBR has good thermal conductivity, heat dissipation is improved. Lateral current limiting is achieved due to deep proton implantation into the top AlGaAs/GaAs DBR and the tunnel junction. However, this structure is characterized by a 3.7% lattice mismatch between the gaas and inp-based compounds, and therefore a high density of defects is present in the modified algan/gaas DBR. These defects propagate to the active region and may cause the device to deteriorate quickly. Proton implantation can also create defects, particularly in indium phosphorous based active cavity materials. In addition, the resulting structure does not include a way to achieve lateral optical confinement.

A new generation of local area network will employ a wavelength division multiplexing transmission (WDM) scheme to achieve broadband transmission. Multi-wavelength VCSEL arrays may play an important role in these systems. V.jayaraman and m.kilcoyne in proc.spie: the article "WDM array with Long wavelength vertical Cavity lasers" on wavelength division multiplexing element, Vol.2690, 1996, pp.325-336 discloses optically pumped VCSEL arrays emitting at 1550 nm, where the cavity lengths of the different VCSELs within the array are varied by selectively etching the InGaAsP/InP superlattice contained in the VCSEL cavities. A disadvantage of this device structure is that it also does not contain a way to obtain lateral optical confinement.

Summary of The Invention

Accordingly, there is a need in the art to provide a new VCSEL device structure and method of fabricating the same to improve the operation of long wavelength VCSELs.

The main idea of the invention is as follows: a VCSEL device structure containing an active cavity material sandwiched between two DBRs is formed with an active region defined by an aperture between a structured surface of the active cavity material and a substantially planar surface of an n-type layer of the DBR, the structured surface and the planar surface of the n-type layer being fused to each otherTogether. The structured surface is formed by a mesa (the mesa comprising at least one p)⁺⁺/n⁺⁺Upper n of tunnel junction⁺⁺A layer, a tunnel junction is formed atop a p-semiconductor layer that is part of the active cavity material) and a top surface and an out-of-mesa p-type layer (i.e., the p-type of the tunnel junction)⁺⁺Layer or p-semiconductor layer, as the case may be). The structured surfaces (i.e., the top surface of the mesa and the surface of the p-type layer outside the mesa) are fused to the plane of the n-type layer of the DBR as a result of deformation of these surfaces. Thus, an air gap is formed around the mesa between the fused structure surfaces, allowing pores to appear between the fused structure surfaces. This can limit the current flow to the active cavity material (i.e., form current apertures defining the active region) and lateral variations in the refractive index within the active region.

Thus, the aperture defining the active region includes a mesa (at least the upper n-type of the tunnel junction) that is held by wafer fusion between the structured surface of the active cavity material and the substantially planar surface of the n-type layer of the DBR stack⁺⁺Layers). The presence of an air gap between the fused structure surfaces provides the lateral refractive index variation for the device structure we propose.

The term "p-type layer outside the mesa" as used herein means that the active cavity material is in p⁺⁺/n⁺⁺A p-type layer under the tunnel junction structure, or p under the active cavity material⁺⁺And (3) a layer. The term "fusion" refers to a wafer fusion technique that atomically bonds two surfaces by applying pressure and heat to create a physical bond between the fused structure surfaces.

Thus, according to the method of the invention, at the tunnel junction (p)⁺⁺And n⁺⁺Stack of layers) the top of the p-layer (part of the active cavity material) forms a mesa and wafer fusion occurs between the n-type planar layer and the structural layer of active cavity material under the DBR. Due to the deformation of the wafers (DBR structure and active cavity material structure), this process will create a specific layer layout around the mesa and create an air gap, the latter being added by the height of the mesa and at the fusion temperatureIs determined. The presence of the air gap allows for lateral refractive index variations in the active region of the device. The application of an electric field from top to bottom will cause a tunnel junction and n-p (or n-p) in the mesa⁺⁺) The fused interface is reverse biased, thereby limiting current flow through the mesa.

According to the invention, a VCSEL device is to be manufactured as follows:

end is p⁺⁺/n⁺⁺An active cavity material of the tunnel junction is grown on an indium phosphorous substrate. The active cavity material comprises a bottom n-type spacer, a multiple quantum well structure, and a top spacer terminating in a p-layer on which the tunnel junction is grown. The mesa is then etched through the tunnel junction to the p-layer or p⁺⁺A layer (typically a p-type layer), thereby obtaining an n-termination on top of the mesa⁺⁺Active cavity material structure surfaces of the layer and the p-type layer outside the mesa. The n-type AlAs/GaAs DBR is then fused to the structured surface of the active cavity material by bringing the wafers into face-to-face contact and applying pressure at elevated temperature. Thus n on top of the mesa is obtained due to deformation of the wafer⁺⁺P (or p) outside the material and mesa⁺⁺) The material fuses with high quality of the n-type AlAs/GaAs DBR. The InP substrate is then selectively etched and the bottom n-type AlAs/GaAs DBR is fused to the n-face of the active cavity material structure. The GaAs substrate of the top DBR is then selectively etched and ohmic contacts are deposited on both sides of the device.

The tunnel junction and the n-p (or n-p) in the mesa when a bias voltage is applied appropriately to the device contacts to direct the corresponding electric field from top to bottom (DC voltage)⁺⁺) The fused interface is reverse biased. Reverse biased active cavity materials conduct well, while reverse biased n-p (or n-p)⁺⁺) The fused interface is not conductive. Thereby limiting the current flow through the mesa (i.e., forming the current aperture). The portion of the active cavity material after current flows through the current aperture is the active region of the device where light is generated. Forming an additional current confinement region prior to fusing with the n-DBR(e.g., a proton implant layer on the active cavity material structure surrounding the mesa) can further improve electrical confinement.

Thus, according to one aspect of the present invention, there is provided a VCSEL device structure comprising a semiconductor active cavity material sandwiched between top and bottom Distributed Bragg Reflector (DBR) stacks, the top DBR stack comprising at least one n-type semiconductor layer and an active region for generating light determined by a dc voltage applied to a device contact, wherein:

the active cavity material comprises a multi-quantum well stack sandwiched between bottom and top isolation regions terminating in a p-layer and a p-layer on top of the p-layer⁺⁺/n⁺⁺Tunnel junction of each p^{+ +}And the p-layer provides a p-type layer, at least the upper n of the tunnel junction⁺⁺The layer is a mesa leading from the underlying p-type layer, the structured surface of the active cavity material being formed by the upper surface of the mesa and the upper surface of the p-type layer outside the mesa;

the active region is defined by a current aperture comprising a mesa surrounded by an air gap between the fused structured surface of the active cavity material structure and the surface of the n-type semiconductor layer of the DBR stack.

The VCSEL device structure according to the present invention may comprise at least one additional active region sandwiched between the same top and bottom DBRs, which active regions are fabricated starting from the same active cavity material. The different active regions have separate contacts and electrical isolation so that separate electrical pumping can be performed for each active region. Different active regions can be designed with different cavity lengths and thus the light emitted through the DBR will be of different wavelengths. For this purpose, the mesas defining the different active regions may be machined to different heights, so that the different active regions will have different cavity lengths. To do this, the at least one additional mesa may be formed as n terminated by a tunnel junction^{+ +}An additional n-type layer on top of the layer. Preferably, the thickness of this additional n-type layer does not exceed 1 ≦ or more for the emission wavelength within the VCSEL structure8 and consists of a number of layer pairs, each layer of each pair having a different chemical composition. If there are n such additional mesas (active regions), each additional mesa contains a portion of the additional n-type layer having a thickness different from the thickness of the other additional mesas. In order to have equal minimum wavelength separation between the light emitted by the DBRs sandwiched between different active regions, the difference between the thickness values of the active cavity material containing the additional n-type layer in the respective active regions is made equal.

According to another aspect of the present invention, there is provided a method of fabricating a VCSEL device structure, comprising the steps of:

(i) growing a semiconductor active cavity material comprising a stack of MQW layers sandwiched between bottom and top isolation regions terminating in a p-layer and a p-layer grown on top of the p-layer⁺⁺/n⁺⁺Tunnel junction of each p⁺⁺-and the p-layer presents a p-type layer;

(ii) (ii) etching the active cavity material formed in step (i) to form an upper n-type layer containing at least a tunnel junction leading from the underlying p-type layer⁺⁺A mesa of the layer, thereby creating a structured surface of the active cavity material, the structured surface of the active cavity material being formed by an upper surface of the mesa and an upper surface of the p-type layer outside the mesa;

(iii) applying wafer fusion between the structured surface of the active cavity material and a substantially planar surface of the n-type semiconductor layer of the first DBR stack to deform the fused structured surface around the mesa and define an aperture region through which current flows, the aperture region including the mesa surrounded by an air gap between the deformed fused structured surfaces and defining an active region of the device;

(iv) forming a second DBR stack on a surface of the active cavity material opposite the structured surface;

(v) ohmic contacts are formed on the VCSEL device structure to enable current to flow through the current aperture to the active region.

To form at least one active cavity(iii) a VCSEL device structure with additional active region starting from bulk material, before carrying out step (ii) at tunnel junction n⁺⁺On top of the layer an additional n-type layer is provided. In this case, during step (ii) at least one additional mesa is formed which also comprises a part of this additional n-type layer.

Unlike the prior art methods of fabricating long wavelength VCSELs in the tunnel junction approach, the method of the present invention can employ high structural quality AlAs/GaAs DBRs with excellent thermal conductivity. When AlAs/GaAs DBR is fused to n-based substrates with low resistivity⁺⁺Both electrical and optical limitations are obtained when the Inp-/n-GaAs is fused into the active cavity material of the junction.

It has to be noted that the device manufacturing method according to the invention is simple, does not involve any non-standard processes, and allows the fabrication of multi-wavelength VCSEL arrays. The final device is mechanically stable and can be produced on a large scale at low cost.

Brief description of the drawings

For the purpose of understanding the invention and to see how it may be carried out in practice, several embodiments will now be described, by way of non-limiting examples, with reference to the accompanying drawings, in which:

FIG. 1A shows a layer structure of a VCSEL device in accordance with an embodiment of the invention;

FIG. 1B shows the refractive index change and optical standing waves within the active cavity material and adjacent DBR of the device of FIG. 1A;

figures 2 to 4 show the fabrication of the VCSEL device of figure 1A;

FIG. 5 is a schematic diagram of a VCSEL device according to another embodiment of the invention;

FIG. 6 illustrates fabrication of the VCSEL device of FIG. 5;

FIG. 7 is a schematic diagram of a VCSEL device in accordance with another embodiment of the invention;

FIG. 8 is a schematic diagram of an electrically pumped multi-wavelength VCSEL array in accordance with the present invention;

fig. 9 and 10 illustrate fabrication of the device of fig. 8.

Detailed description of the invention

Figure 1A is a VCSEL device structure, indicated generally at 10, in accordance with one embodiment of the present invention. The device 10 includes bottom and top n-AlAs/GaAs DBRs 12a and 12b with an active cavity material 14 therebetween. The DBRs 12a and 12b are connected to the bottom surface 14a and the upper structured surface 14b of the active cavity material 14, respectively, by wafer fusion. Ohmic contacts 15 are made on opposite sides of the device 10.

The active cavity material 14 structure comprises a bottom n-type spacer layer 16a, a Multiple Quantum Well (MQW) structure 18, a top spacer layer 16b terminating in a p-type layer 20, and a mesa 22 formed by p-type layers⁺⁺Bottom and top n⁺⁺P of layer composition⁺⁺/n⁺⁺And (4) a tunnel junction. Thus, the structured surface 14b is formed by the upper surface of the mesa 22 and the p-type layer 20 outside the mesa. The lower surface of the n-type DBR 12b on one side (i.e., the mirror structured n-semiconductor layer) and the structured surface 14b on the other side form a fused interface. The mesa 22 is sandwiched between the fused structural surfaces as a result of the deformation of the fused structural surfaces, forming an elongated air gap 24 around the mesa. The mesa in the air gap between the deformed fused structure surfaces provides an current aperture 25 for current to flow through, while the air gap provides lateral refractive index variation for optical mode confinement. The current aperture 25 defines an active region as part of the active cavity material 14 where current flows after passing through the current aperture 25 and generates light.

Applying a bias voltage to contact 15 creates an electric field that points from the top to the bottom so that the tunnel junction and the n-P fused interface within mesa 22 are reverse biased to become well conductive and non-conductive, respectively. This achieves a restriction of the current flow through the mesa.

Fig. 1B shows the refractive index variation within the active cavity material and adjacent DBRs of the VCSEL device structure 10, as well as the standing wave (electric field) profile at the emission wavelength. As shown, the multiple quantum well structure region 18 is at a maximum electric field, while the tunnel junction TJ is at a minimum point of the standing wave, and therefore does not cause absorption of light emitted by the VCSEL device structure 10.

The main steps in the manufacture of the device 10 will be described below with reference to fig. 2-4:

in a first step (fig. 2), the active cavity material 14 (wafer structure) is fabricated by growing in sequence on the following layers: an n-type InP structure 26, an InGaAsP-etch stop layer 17, a bottom n-InP spacer layer 16a, an undoped MQW structure 18, a top InP spacer layer 16b terminating in a p-type InP layer 20, and a p-type InP layer⁺⁺/n⁺⁺The tunnel junction TJ.

In this example, the following layer parameters are used. The InGaAsP-etch stop layer 17 has a maximum fluorescence (Plmax) at a thickness of 1.4 microns (i.e., Plmax ═ 1.4 microns) and 113 nanometers. The doping level n of the bottom n-InP spacer 16a is 3.10¹⁷Centimeter^-3And a thickness of 305 nm. The undoped MQW structure 18 contains 6 InGaAsP quantum wells (with Plmax of 1.54 microns and a thickness of 1.38 microns) and 7 InGaAsP barriers (with Plmax of 1.38 microns and a thickness of 9.4 nanometers). The top InP spacer 16b comprises 101 nm of undoped InP. The p-type InP layer 20 has a thickness of 192 nm and p 5 · 10¹⁷Centimeter^-3The doping level of (a). P⁺⁺/n⁺⁺The tunnel junction TJ is formed by doping at 5-10¹⁹Centimeter^-3And p with a thickness of 15 nm⁺⁺InGaAs layer 22a and doping level of 5.10¹⁹Centimeter^-3And an n + + -InGaAs layer 22b having a thickness of 15 nm, so that the tunnel junction TJ has a total thickness of 30 nm. Typically the tunnel junction is between 20 and 50 nanometers thick.

In a second step (FIG. 3), the method is based on H₃PO₄:H₂O₂:H₂O, the mesa-structure 22 is etched through the tunnel junction TJ, thereby obtaining the structured surface 14b of the active cavity material structure 14. In this example, the etch is with a 10 micron etchThe photoresist mask of diameter is applied and continues until the p-type layer 20 is reached, thus creating a p-type layer at the surface of the layer 20 outside the mesa to be fused to the n-type DBR 12 b. It should be noted, however, that the etch may continue until p of the tunnel junction is reached⁺⁺Layer 22a, in that case the surface of layer 22a creates a p-type layer outside the mesa to be fused.

In a third step (fig. 4), the n-type DBR stack 12b and the active cavity material 14 are brought into face-to-face contact and pressurized at an elevated temperature to fuse the lower n-semiconductor layer surface of the DBR 12b to the structured surface 14 b. The DBR stack 12b is an AlAs/GaAs DBR structure grown on a GaAs-substrate using metal-organic chemical vapor deposition (MOCVD) and containing 25 pairs of AlAs (doping level n 10)¹⁸Centimeter^-3And 130 nm thick) and GaAs (doping level n 10)¹⁸Centimeter^-3And a thickness of 114 nm).

The fusion apparatus, which is essentially a pneumatic press, can vary the pressure applied to the wafers that are in contact with each other at various stages of the fusion process. To avoid defects in the active region, it is important that the pressure applied to the wafer during cleaning at room temperature does not exceed 0.5 bar. This low pressure is maintained during the heating cycle up to the fusion temperature of 650 c. The pressure was then gradually increased to 2.0 bar and the wafer was allowed to stand under these conditions for 30 minutes. The wafer is deformed during the fusion process, thereby obtaining n at the top of the mesa 22⁺⁺Both the material and the p-type material outside the mesa fuse with the high quality of the n-type AlAs/GaAs DBR 12b and form the air gap 24.

In the final step, the InP substrate is selectively etched in HCl until an InGaAsP etch stop layer 17 is reached, also in H₃PO₄:H₂O₂:H₂And performing selective etching in the O solution. The bottom n-type AlAs/GaAs DBR 12a is then fused to the n-face of the active cavity material. In this example, the DBR 12a contains 27 pairs of aluminum arsenic and gallium arsenic layers having the same thickness and doping level values as the layers in the top DBR stack 12 b. GaAs substrate of top DBR at H₂O₂-NH₃The OH solution is selectively etched until the first AlAs layer (which acts as an etch-barrier and is also selectively etched in HF) is reached and nickel-gold-germanium-gold ohmic contacts 15 are deposited on both sides of the device. The VCSEL device structure 10 resulting from this process emits at 1520 nanometers.

Referring to fig. 5 and 6, a VCSEL device structure 100 in accordance with another embodiment of the present invention is shown. For ease of understanding, like reference numerals have been used to identify like elements in devices 10 and 100. The fabrication of the device 100 further improves the electrical confinement through the aperture region 25 of the VCSEL device structure 100 by using a proton implant through the active cavity material 14 outside the mesa 22 prior to the fusion of the top DBR 12 b.

To fabricate device 100, the structured active cavity material can be prepared as described above for device 10, and then a photoresist disk 27 is formed over mesa 22 in such a way that the disk is concentric with the mesa, as shown in fig. 6. The disk 27 was used as a mask with a diameter of 30 microns and a thickness of 2 microns. After the mesa is masked at an energy of 80keV at 5.10¹⁴The dose of (a) is to implant protons into the surface of the active cavity material 14. The implant energy and dose are chosen such that the implant current confinement layer 28 (fig. 5) reaches the bottom n-InP spacer 16 a.

Following the proton implant, the photoresist mask 27 is removed in acetone and oxygen plasma, and the following steps are similar to those described above for the fabrication of device 10. The resulting VCSEL device 100 thus has an additional proton implant current confinement layer 28 that touches only the outer edge of the air gap 24 surrounding the mesa 22 and does not introduce defects in the active region defined by the aperture 25 because it is outside the active region and far apart. Oxygen or other ion implantation may also be employed for this purpose.

Figure 7 is a schematic diagram of a VCSEL device structure 200 in accordance with another embodiment of the present invention. Also, elements common to both examples are identified with the same reference numerals. In the example of FIG. 7, the top DBR is an AlAs/GaAs stack in which there is only one top GaAs layer 30Is measured at a concentration of 5.10¹⁸Centimeter^-3The carrier of (a) is doped n-type, while all other layers are undoped. The DBR stack 12b is in contact with the active cavity material 14 and the top n-GaAs layer of the DBR stack 12b is fused to the structured surface 14b of the active cavity material 14 as described above. Thereafter at H₂O₂-NH₃The GaAs-substrate of the top DBR 12b is selectively etched in an OH solution. Is adopted in Cl₂-Ch₄Dry etching with reactive plasma in Ar forms a ring-shaped pit 31 in the top DBR stack 12b up to the n-type GaAs layer 30, and thus forms a central stack region 29 of the top DBR 12b surrounded by this ring-shaped pit 31. A top ohmic contact 32 is then deposited within the pit 31.

When a dc voltage is applied between the top ohmic contact 32 and the bottom contact 15b, current flows along the n-type layer 30 to the aperture region 25 and then through the active region. The advantage of using all of the top DBR 12b layers except the top layer 30 to be undoped also reduces the light absorption in the DBR through which light is extracted from the device, thus increasing the emissive capability of the VCSEL.

Turning now to fig. 8-10, another embodiment of the present invention is shown. FIG. 8 shows a VCSEL device structure 300 in the form of a multi-wavelength VCSEL array, which in this example comprises an array of three VCSEL devices 300a, 300b, 300c, each emitting a different wavelength λ₁，λ₂，λ₃. Fig. 9 and 10 illustrate the fabrication of device structure 300.

Due to the different heights of the mesas 33, 34, 35, the structural active cavity material in adjacent devices 300a, 300b, 300c each have a different length L₁，L₂，L₃So that different wavelengths are emitted. After selectively etching the top GaAs substrate, annular ohmic contacts 36, 37, 38 are formed on the top n-type DBR 12 b. Then, by reacting in Cl₂-CH₄Reactive plasma etch in-Ar produces insulating mesas 39, 40, 41 on the top DBR 12 b. Each annular ohmic contact 36, 37, 38 and the corresponding insulating mesa structure 39, 40, 41 is formed through the corresponding mesa 33, 34, respectively35 is central. Applying a dc voltage between one of the annular ohmic contacts 36, 37 or 38 and one of the bottom contacts 15b, a current flows through the active region of each VCSEL device (300a, 300b or 300c) while emitting light of the corresponding wavelength (depending on the cavity length of that particular device).

For communication applications, it is important to precisely control the laser emission wavelengths in a multi-wavelength VCSEL array so that there is an equal wavelength separation Δ λ between the VCSELs in the array. This is necessary to ensure that adjacent devices have equal cavity length separation Δ L. In this embodiment of the invention (shown in figure 9) the tunnel junction layers 22a and 22b are grown over InP based cavity material, followed by two InP-InGaAsP layer pairs 42. Each layer in the pair of InP-InGaAsP has a thickness of 10 nm and an n-type doping level of 5.10¹⁷Centimeter^-3. The composition of the InGaAsP layer corresponds to a PLmax of 1.4 microns. Usually this additional n-type layer is composed of the required number of layer pairs Np, each pair having two layers of different chemical composition. The relationship between the desired number of separation wavelengths N and Np is Np — N-1.

After the above steps of forming each layer, the layer is formed on the basis of H₃PO₄:H₂O₂:H₂Layer 42 and tunnel junction layers 22a and 22b are selectively etched in O solution and HCl until p-type layer 20 of InP based cavity material is reached to form mesas 43, 44 and 45 (fig. 10). Each mesa 43, 44, 45 has a diameter of 10 microns.

Returning to FIG. 8, after the above selective etching process is performed, the mesa is finely trimmed by photolithography and then H-based₃PO₄:H₂O₂:H₂A solution of O and HCl is selectively etched to form mesas 33, 34, 35 of different heights. Mesa 35 contains tunnel junction layers 22a and 22b and two layer pairs 42 having an overall height of 70 nanometers. Mesa 34 includes tunnel junction layers 22a and 22b and two layer pairs 42 having an overall height of 50 nanometers. Mesa 33 contains only tunnel junction layers 22a and 22b and has a height of 30 nanometers. Every two adjacent VCSEL devices in the array (300a and 300b, 300b and 300c) are the same (20 nm times the effective refractive index of the pair of InP-InGaAsP layers), so that the difference Δ λ between the emission wavelengths of the adjacent VCSELs can be made equal. In this particular example, the devices with mesas 33, 34 and 35 measured emission wavelength values of 1520 nm, 1538 nm and 1556 nm, respectively, and Δ λ was 18 nm.

Typically to provide mesas of different heights, some of the mesas terminate in a tunnel junction n⁺⁺An additional n-type layer on top of layer 22 b. The additional n-type layer consists of a certain number of layer pairs, each pair having two layers of different chemical composition. A portion of the additional n-type layer within the respective mesa has a different height than the other mesas. Assuming that this additional N-type layer has a thickness d after deposition and before etching to form a plurality of different mesas, after this layer has been selectively etched, its remaining portion in the i (i ═ 1, 2.. N) th mesa has a thickness d_iIs d_iAlgorithm (i-1) d/(N-1). Thickness d_iNot exceeding 1/8, i.e. around 60 nm, of the emission wavelength within the corresponding VCSEL device.

It will be readily apparent to those skilled in the art that various modifications and changes may be made to the preferred embodiments of the present invention, as exemplified above, without departing from the scope of the invention, which is to be determined from the appended claims. It should also be noted that all publications in brackets are incorporated herein by reference.

Claims

1. A vertical cavity surface emitting laser device structure comprising a semiconductor active cavity material structure sandwiched between top and bottom distributed bragg reflector stacks, the top distributed bragg reflector comprising at least one n-type semiconductor layer; and defining an active region for generating light in response to a direct current voltage applied to the device contacts, wherein:

-said active cavity material comprises a stack of MQWEL layers sandwiched between top and bottom isolation regions, the top isolation region terminating in a p-layer and a p-layer on top of the p-layer⁺⁺/n⁺⁺Tunnel junction of each p⁺⁺And the p-layer presents a p-type layer, at least the upper n of the tunnel junction⁺⁺The layer is a mesa which leads from the underlying p-type layer, one structured surface of the active cavity material being formed by the upper surface, the side surfaces of the mesa and the upper surface of the p-type layer outside the mesa;

the active region is defined by a current aperture comprising a mesa surrounded by an air gap between the structured surface of the active cavity material and the surface of the lowermost n-type layer of the top distributed bragg reflector stack.

2. The device structure of claim 1, wherein the tunnel junction is at the smallest point in the standing wave optical field of the device structure and has a thickness of about 20-50 nm.

3. The device structure of claim 1 wherein the active cavity material further comprises a current confinement region in the cavity material outside the mesa at least within the top isolation region.

4. The device structure of claim 3 wherein said confinement layer is an ion implanted layer.

5. The device structure of claim 1, further comprising at least one additional active region sandwiched between the top and bottom distributed bragg reflectors, additional electrical contacts being formed on the top and bottom distributed bragg reflectors to allow current to flow between the active cavity material structure and the distributed bragg reflector stack, the at least one additional active region being defined by an additional mesa surrounded by an air gap between the structural surface of the active cavity material and the surface of the n-type semiconductor layer of the top distributed bragg reflector stack, the at least two active regions being arranged in an array.

6. The device structure of claim 5, wherein the heights of the at least two mesas are different, the at least two active regions operable to cause light emitted by the distributed Bragg reflectors within the two active regions to have different wavelengths, respectively.

7. The device structure of claim 6 wherein the end of the at least one additional mesa is at n of the tunnel junction⁺⁺An additional n-type layer on top of the layer has a thickness not exceeding 1/8 of the emission wavelength within the VCSEL structure.

8. The device structure of claim 7 wherein the additional n-type layer is comprised of a number of layer pairs, each pair having two layers of different chemical compositions.

9. A device structure as claimed in claim 8, wherein there are a plurality of such additional mesas, each of which contains an additional n-type layer of a different thickness than the other additional mesas.

10. The device structure of claim 9, wherein the difference between the active cavity material thickness values determined by each two locally adjacent active regions is equal, thereby providing equal wavelength separation for light emitted by the distributed bragg reflector sandwiched between each two locally adjacent active regions.

11. A method of fabricating a vertical cavity surface emitting laser device structure, comprising the steps of:

(i) growing a semiconductor active cavity material comprising a stack of MQW layers sandwiched between bottom and top isolation regions terminating in a p-layer and a p-layer grown on top of the p-layer⁺⁺/n⁺⁺Tunnel junction of each p⁺⁺-and the p-layer is present as a p-type layer;

(ii) (ii) etching the active cavity material formed in step (i) to form an upper n-type layer containing at least a tunnel junction leading from the underlying p-type layer⁺⁺A mesa of a layer, thereby creating a structured surface of the active cavity material, the activeThe structured surface of the cavity material is formed by the upper surface and the side surfaces of the mesa and the upper surface of the p-type layer outside the mesa;

(iii) applying wafer fusion between the structured surface of the active cavity material and the planar surface of the lowermost n-type layer of the first distributed bragg reflector stack, thereby deforming the structured surface around the mesa and defining an aperture region through which current flows, the aperture region comprising the mesa surrounded by air gaps between the respective deformed structured surfaces and defining an active region of the device;

(iv) forming a second distributed bragg reflector stack on a surface of the active cavity material opposite the surface of the structure;

(v) ohmic contacts are formed on the vertical cavity surface emitting laser device structure to enable current to flow through the current aperture to the active region.

12. The method of claim 11 wherein the active cavity material is grown on an indium phosphorous substrate.

13. The method of claim 11, wherein the tunnel junction is at a minimum of an optical field of the standing wave in the device structure and has a thickness of about 20 nm to about 50 nm.

14. The method of claim 11, further comprising the step of forming a current confinement region in the cavity material structure outside the mesa after said step (ii).

15. The method of claim 14, wherein forming the current confinement region comprises placing a photoresist disk concentric with the mesa using the photoresist disk as a mask and implanting ions into a surface of the active cavity material above the mesa to create an ion implanted current confinement layer that reaches an outer boundary of the air gap and is outside the active region.

16. The method of claim 11, further comprising the step of forming at least one additional active region sandwiched between the first and second distributed bragg reflector stacks starting from the active cavity material and forming an additional ohmic contact on the vertical cavity surface emitting laser device structure to enable current flow through the additional active region, the at least one additional active region comprising an additional mesa surrounded by an air gap between a structural surface of the active cavity material and a surface of the lowermost n-type layer of the first distributed bragg reflector stack.

17. A method as claimed in claim 16, wherein the formation of said at least one additional active region includes the step of providing an additional n-type layer having a thickness not exceeding 1/8 of the emission wavelength within the vertical cavity surface emitting laser structure, the etching being performed in a manner to form at least one additional mesa terminating in said additional n-type layer.

18. The method of claim 17, wherein the etching is performed in a manner to form at least two additional mesas, each of the additional mesas comprising a portion of an additional n-type layer having a thickness different from the thickness of the n-type layer of the other additional mesas.

19. The method of claim 11, wherein the two distributed bragg reflector stacks are made of AlAs and GaAs layers.

20. The method of claim 11, wherein the second distributed bragg reflector stack is bonded to the surface of the active cavity material by wafer fusion.