HK1050405A1 - Method for communicating data and hub for communicating data. - Google Patents
Method for communicating data and hub for communicating data.Info
- Publication number
- HK1050405A1 HK1050405A1 HK03102453A HK03102453A HK1050405A1 HK 1050405 A1 HK1050405 A1 HK 1050405A1 HK 03102453 A HK03102453 A HK 03102453A HK 03102453 A HK03102453 A HK 03102453A HK 1050405 A1 HK1050405 A1 HK 1050405A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- communicating data
- hub
- communicating
- data
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40058—Isochronous transmission
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
- G06F13/4059—Coupling between buses using bus bridges where the bridge performs a synchronising function where the synchronisation uses buffers, e.g. for speed matching between buses
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40123—Interconnection of computers and peripherals
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Small-Scale Networks (AREA)
- Computer And Data Communications (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/361,677 US6792495B1 (en) | 1999-07-27 | 1999-07-27 | Transaction scheduling for a bus system |
PCT/US2000/010930 WO2001008019A1 (fr) | 1999-07-27 | 2000-04-25 | Ordonnancement de transactions pour systeme de bus |
Publications (1)
Publication Number | Publication Date |
---|---|
HK1050405A1 true HK1050405A1 (en) | 2003-06-20 |
Family
ID=23423021
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK03102453A HK1050405A1 (en) | 1999-07-27 | 2003-04-07 | Method for communicating data and hub for communicating data. |
Country Status (6)
Country | Link |
---|---|
US (2) | US6792495B1 (fr) |
EP (1) | EP1203300B1 (fr) |
CN (2) | CN1179283C (fr) |
HK (1) | HK1050405A1 (fr) |
TW (1) | TW518471B (fr) |
WO (1) | WO2001008019A1 (fr) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7570724B1 (en) * | 1999-10-14 | 2009-08-04 | Pluris, Inc. | Method of link word synchronization |
US7512082B1 (en) * | 1999-12-14 | 2009-03-31 | Intel Corporation | Tracking transaction status for a bus system providing legacy bus compatibility |
US6771664B1 (en) * | 1999-12-28 | 2004-08-03 | Intel Corporation | Transaction scheduling for a bus system in a multiple speed environment |
US7028124B2 (en) * | 2001-09-26 | 2006-04-11 | Intel Corporation | Method and apparatus for dual queue head processing of interrupt endpoints |
DE10224163B4 (de) * | 2002-05-31 | 2005-05-04 | Advanced Micro Devices, Inc., Sunnyvale | Transaktionsdauermanagement in einem USB-Hostcontroller |
KR100943742B1 (ko) * | 2003-06-03 | 2010-02-23 | 삼성전자주식회사 | Usb 트랜잭션을 무선 pan 상에서 전송하는 장치 및방법 |
US7412574B2 (en) * | 2004-02-05 | 2008-08-12 | Micron Technology, Inc. | System and method for arbitration of memory responses in a hub-based memory system |
US20050210185A1 (en) * | 2004-03-18 | 2005-09-22 | Kirsten Renick | System and method for organizing data transfers with memory hub memory modules |
WO2005125093A2 (fr) * | 2004-06-15 | 2005-12-29 | Koninklijke Philips Electronics N.V. | Controleur de bus permettant de manipuler des transactions fractionnees |
US7296129B2 (en) | 2004-07-30 | 2007-11-13 | International Business Machines Corporation | System, method and storage medium for providing a serialized memory interface with a bus repeater |
US7549004B1 (en) * | 2004-08-20 | 2009-06-16 | Altera Corporation | Split filtering in multilayer systems |
US7331010B2 (en) | 2004-10-29 | 2008-02-12 | International Business Machines Corporation | System, method and storage medium for providing fault detection and correction in a memory subsystem |
US7299313B2 (en) | 2004-10-29 | 2007-11-20 | International Business Machines Corporation | System, method and storage medium for a memory subsystem command interface |
US7512762B2 (en) | 2004-10-29 | 2009-03-31 | International Business Machines Corporation | System, method and storage medium for a memory subsystem with positional read data latency |
US7277988B2 (en) * | 2004-10-29 | 2007-10-02 | International Business Machines Corporation | System, method and storage medium for providing data caching and data compression in a memory subsystem |
US7340550B2 (en) * | 2004-12-02 | 2008-03-04 | Intel Corporation | USB schedule prefetcher for low power |
US20060190655A1 (en) * | 2005-02-24 | 2006-08-24 | International Business Machines Corporation | Apparatus and method for transaction tag mapping between bus domains |
US7702825B2 (en) * | 2005-06-29 | 2010-04-20 | Intel Corporation | Enhancements to universal serial bus (USB) suspend and resume operations |
US7478259B2 (en) | 2005-10-31 | 2009-01-13 | International Business Machines Corporation | System, method and storage medium for deriving clocks in a memory system |
US7685392B2 (en) | 2005-11-28 | 2010-03-23 | International Business Machines Corporation | Providing indeterminate read data latency in a memory system |
US7594055B2 (en) * | 2006-05-24 | 2009-09-22 | International Business Machines Corporation | Systems and methods for providing distributed technology independent memory controllers |
US7490255B2 (en) * | 2006-06-30 | 2009-02-10 | Intel Corporation | Power efficient flow control model for USB asynchronous transfers |
US7669086B2 (en) | 2006-08-02 | 2010-02-23 | International Business Machines Corporation | Systems and methods for providing collision detection in a memory system |
US7870459B2 (en) | 2006-10-23 | 2011-01-11 | International Business Machines Corporation | High density high reliability memory module with power gating and a fault tolerant address and command bus |
US20080162974A1 (en) * | 2006-12-29 | 2008-07-03 | Keys John S | Universal serial bus host controller |
US7721140B2 (en) | 2007-01-02 | 2010-05-18 | International Business Machines Corporation | Systems and methods for improving serviceability of a memory system |
JP2011198046A (ja) * | 2010-03-19 | 2011-10-06 | Kddi Corp | 中継装置及び方法 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4792495A (en) * | 1985-04-22 | 1988-12-20 | Seiko Epson Corporation | Fusible ink sheet |
US4785394A (en) * | 1986-09-19 | 1988-11-15 | Datapoint Corporation | Fair arbitration technique for a split transaction bus in a multiprocessor computer system |
US5262942A (en) * | 1990-06-05 | 1993-11-16 | Bankers Trust Company | Financial transaction network |
JP3411300B2 (ja) * | 1992-02-18 | 2003-05-26 | 株式会社日立製作所 | 情報処理装置 |
US5553310A (en) * | 1992-10-02 | 1996-09-03 | Compaq Computer Corporation | Split transactions and pipelined arbitration of microprocessors in multiprocessing computer systems |
US5708794A (en) | 1993-08-10 | 1998-01-13 | Dell Usa, L.P. | Multi-purpose usage of transaction backoff and bus architecture supporting same |
US5533204A (en) * | 1994-04-18 | 1996-07-02 | Compaq Computer Corporation | Split transaction protocol for the peripheral component interconnect bus |
US5546546A (en) * | 1994-05-20 | 1996-08-13 | Intel Corporation | Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge |
US5742847A (en) | 1994-10-31 | 1998-04-21 | Intel Corporation | M&A for dynamically generating and maintaining frame based polling schedules for polling isochronous and asynchronous functions that guaranty latencies and bandwidths to the isochronous functions |
US5621897A (en) * | 1995-04-13 | 1997-04-15 | International Business Machines Corporation | Method and apparatus for arbitrating for a bus to enable split transaction bus protocols |
US5732244A (en) * | 1995-07-24 | 1998-03-24 | Unisys Corp. | Multiprocessor with split transaction bus architecture for sending retry direction to other bus module upon a match of subsequent address bus cycles to content of cache tag |
JPH0944443A (ja) | 1995-07-31 | 1997-02-14 | Nec Eng Ltd | バスインタフェース制御装置 |
US5961623A (en) * | 1996-08-29 | 1999-10-05 | Apple Computer, Inc. | Method and system for avoiding starvation and deadlocks in a split-response interconnect of a computer system |
US5978878A (en) * | 1996-09-26 | 1999-11-02 | Vlsi Technology | Selective latency reduction in bridge circuit between two busses |
US5870567A (en) * | 1996-12-31 | 1999-02-09 | Compaq Computer Corporation | Delayed transaction protocol for computer system bus |
US5933611A (en) * | 1997-06-23 | 1999-08-03 | Opti Inc. | Dynamic scheduler for time multiplexed serial bus |
US6366590B2 (en) * | 1998-03-16 | 2002-04-02 | Sony Corporation | Unified interface between an IEEE 1394-1995 serial bus transaction layer and corresponding applications |
US6243778B1 (en) * | 1998-10-13 | 2001-06-05 | Stmicroelectronics, Inc. | Transaction interface for a data communication system |
US6145039A (en) * | 1998-11-03 | 2000-11-07 | Intel Corporation | Method and apparatus for an improved interface between computer components |
US6389029B1 (en) * | 1998-11-10 | 2002-05-14 | Nortel Networks Limited | Local area network incorporating universal serial bus protocol |
US6813251B1 (en) * | 1999-07-27 | 2004-11-02 | Intel Corporation | Split Transaction protocol for a bus system |
-
1999
- 1999-07-27 US US09/361,677 patent/US6792495B1/en not_active Expired - Lifetime
-
2000
- 2000-04-25 CN CNB00813460XA patent/CN1179283C/zh not_active Expired - Lifetime
- 2000-04-25 EP EP00923592A patent/EP1203300B1/fr not_active Expired - Lifetime
- 2000-04-25 CN CN200310113847A patent/CN100594705C/zh not_active Expired - Lifetime
- 2000-04-25 WO PCT/US2000/010930 patent/WO2001008019A1/fr active Application Filing
- 2000-04-27 TW TW089108014A patent/TW518471B/zh not_active IP Right Cessation
-
2003
- 2003-04-07 HK HK03102453A patent/HK1050405A1/xx unknown
-
2004
- 2004-07-08 US US10/888,665 patent/US20040268010A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP1203300B1 (fr) | 2011-06-08 |
EP1203300A1 (fr) | 2002-05-08 |
CN1520122A (zh) | 2004-08-11 |
US6792495B1 (en) | 2004-09-14 |
US20040268010A1 (en) | 2004-12-30 |
WO2001008019A1 (fr) | 2001-02-01 |
CN1376280A (zh) | 2002-10-23 |
TW518471B (en) | 2003-01-21 |
CN1179283C (zh) | 2004-12-08 |
CN100594705C (zh) | 2010-03-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
CORR | Corrigendum |
Free format text: CORRECTED DATA OF SECTION 27 TO JOURNAL OF 20050722: [54] METHOD FOR COMMUNICATING DATA AND HUB FORCOMMUNICATING - DATA |