HK1048179A1 - Split transaction protocol for a bus system - Google Patents

Split transaction protocol for a bus system

Info

Publication number
HK1048179A1
HK1048179A1 HK03100415A HK03100415A HK1048179A1 HK 1048179 A1 HK1048179 A1 HK 1048179A1 HK 03100415 A HK03100415 A HK 03100415A HK 03100415 A HK03100415 A HK 03100415A HK 1048179 A1 HK1048179 A1 HK 1048179A1
Authority
HK
Hong Kong
Prior art keywords
bus system
transaction protocol
split transaction
split
protocol
Prior art date
Application number
HK03100415A
Other languages
English (en)
Inventor
John I Garney
John S Howard
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1048179A1 publication Critical patent/HK1048179A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1642—Handling requests for interconnection or transfer for access to memory bus based on arbitration with request queuing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
    • G06F13/426—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using an embedded synchronisation, e.g. Firewire bus, Fibre Channel bus, SSA bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40058—Isochronous transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40123—Interconnection of computers and peripherals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0054—Split transaction bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/40—Bus coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/40—Bus coupling
    • G06F2213/4002—Universal serial bus hub with a single upstream port
HK03100415A 1999-07-27 2003-01-16 Split transaction protocol for a bus system HK1048179A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/362,991 US6813251B1 (en) 1999-07-27 1999-07-27 Split Transaction protocol for a bus system
PCT/US2000/010923 WO2001008018A1 (fr) 1999-07-27 2000-04-25 Protocole pour transactions fractionnables pour systeme de bus

Publications (1)

Publication Number Publication Date
HK1048179A1 true HK1048179A1 (en) 2003-03-21

Family

ID=23428340

Family Applications (1)

Application Number Title Priority Date Filing Date
HK03100415A HK1048179A1 (en) 1999-07-27 2003-01-16 Split transaction protocol for a bus system

Country Status (7)

Country Link
US (8) US6813251B1 (fr)
EP (2) EP1203301B1 (fr)
CN (1) CN1205562C (fr)
DE (2) DE60035882T2 (fr)
HK (1) HK1048179A1 (fr)
TW (1) TW466409B (fr)
WO (1) WO2001008018A1 (fr)

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Also Published As

Publication number Publication date
US20140281073A1 (en) 2014-09-18
US20110099308A1 (en) 2011-04-28
US9558142B2 (en) 2017-01-31
US6813251B1 (en) 2004-11-02
US20100169516A1 (en) 2010-07-01
DE60035882D1 (de) 2007-09-20
TW466409B (en) 2001-12-01
US8677032B2 (en) 2014-03-18
US20050033892A1 (en) 2005-02-10
US20170249277A1 (en) 2017-08-31
WO2001008018A1 (fr) 2001-02-01
EP1850239B1 (fr) 2011-01-12
US7675871B2 (en) 2010-03-09
CN1205562C (zh) 2005-06-08
US9600436B2 (en) 2017-03-21
US9892081B2 (en) 2018-02-13
EP1203301A1 (fr) 2002-05-08
US20150015725A1 (en) 2015-01-15
EP1203301B1 (fr) 2007-08-08
DE60035882T2 (de) 2008-04-17
DE60045530D1 (de) 2011-02-24
CN1376281A (zh) 2002-10-23
US7886087B2 (en) 2011-02-08
EP1850239A1 (fr) 2007-10-31
US20170255587A1 (en) 2017-09-07

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PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20160425