HK1043416A1 - 線跡基底指示高速緩衝記憶體 - Google Patents

線跡基底指示高速緩衝記憶體

Info

Publication number
HK1043416A1
HK1043416A1 HK02105187.0A HK02105187A HK1043416A1 HK 1043416 A1 HK1043416 A1 HK 1043416A1 HK 02105187 A HK02105187 A HK 02105187A HK 1043416 A1 HK1043416 A1 HK 1043416A1
Authority
HK
Hong Kong
Prior art keywords
based instruction
trace based
instruction caching
caching
trace
Prior art date
Application number
HK02105187.0A
Other languages
English (en)
Chinese (zh)
Inventor
F Krick Robert
J Hinton Glenn
D Upton Michael
J Sager David
W Lee Chan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from PCT/US1999/000959 external-priority patent/WO2000042502A1/en
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1043416A1 publication Critical patent/HK1043416A1/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3808Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
HK02105187.0A 1999-01-15 2002-07-12 線跡基底指示高速緩衝記憶體 HK1043416A1 (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1999/000959 WO2000042502A1 (en) 1997-10-23 1999-01-15 Trace based instruction caching

Publications (1)

Publication Number Publication Date
HK1043416A1 true HK1043416A1 (zh) 2002-09-13

Family

ID=69375129

Family Applications (1)

Application Number Title Priority Date Filing Date
HK02105187.0A HK1043416A1 (zh) 1999-01-15 2002-07-12 線跡基底指示高速緩衝記憶體

Country Status (2)

Country Link
KR (1) KR20010108104A (ko)
HK (1) HK1043416A1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117270000B (zh) * 2023-11-20 2024-01-30 北京凯芯微科技有限公司 一种gnss导航接收机及其跟踪通道交叉复用的方法

Also Published As

Publication number Publication date
KR20010108104A (ko) 2001-12-07

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