GB995818A - Improvements in and relating to pulse receivers - Google Patents

Abstract

995,818. Telegraphy; transistor pulse circuits. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. Jan. 8, 1964 [Jan. 11, 1963], No. 890/64. Headings H3T and H4P. In a receiver for binary data modulated on a carrier, the received signals are demodulated and passed both to a bi-stable unit which generates mark and space pulses and to a threshold unit which, if the threshold is not exceeded, reverses the state of the bi-stable unit. It is stated that such an arrangement results in fewer bit errors in the interpretation of the received signals because a bit having a value below the threshold is more likely to be opposite to the previous bit than the same as it. As described, phase shift signals are received and are demodulated by mixing at 3 with a signal of carrier frequency derived from the received signal. The resultant signals are integrated at 8, 9, unit 11 discharging capacitor 9 at the end of each bit. The integrator output is amplified at 10 and fed on mark and space leads to bistable unit 16 to give mark and space output signals, and also via gate 21 to monostable unit 22 which has a threshold equal to the operating threshold of unit 16. When a bit does not exceed the threshold, gate 23 is enabled to allow a clock pulse to reverse the state of unit 16. The clock pulses, which also control unit 11, are derived from the received bits by way of filter 12, half-wave rectifier 13 and tuned filter 14.