GB9922090D0 - Automatic transmission between ACPI C3 and C2 states - Google Patents
Automatic transmission between ACPI C3 and C2 statesInfo
- Publication number
- GB9922090D0 GB9922090D0 GBGB9922090.7A GB9922090A GB9922090D0 GB 9922090 D0 GB9922090 D0 GB 9922090D0 GB 9922090 A GB9922090 A GB 9922090A GB 9922090 D0 GB9922090 D0 GB 9922090D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- acpi
- states
- automatic transmission
- automatic
- transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
- G06F1/3225—Monitoring of peripheral devices of memory devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US83147297A | 1997-03-31 | 1997-03-31 | |
PCT/US1998/001907 WO1998044405A1 (en) | 1997-03-31 | 1998-02-02 | Automatic transitioning between acpi c3 and c2 states |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9922090D0 true GB9922090D0 (en) | 1999-11-17 |
GB2338806A GB2338806A (en) | 1999-12-29 |
Family
ID=25259141
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9922090A Withdrawn GB2338806A (en) | 1997-03-31 | 1998-02-02 | Automatic transitioning between ACPI C3 and C2 states |
Country Status (4)
Country | Link |
---|---|
AU (1) | AU6140098A (en) |
DE (1) | DE19882269T1 (en) |
GB (1) | GB2338806A (en) |
WO (1) | WO1998044405A1 (en) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SG65097A1 (en) * | 1998-12-28 | 2001-08-21 | Compaq Computer Corp | Break event generation during transitions between modes of operation in a computer system |
US6633987B2 (en) | 2000-03-24 | 2003-10-14 | Intel Corporation | Method and apparatus to implement the ACPI(advanced configuration and power interface) C3 state in a RDRAM based system |
US6725384B1 (en) * | 2000-06-30 | 2004-04-20 | Intel Corporation | Method and apparatus for enabling a wake-up event by modifying a second register to enable a second wake-up event responsive to detecting entry of data in a first register |
US20030163745A1 (en) * | 2002-02-27 | 2003-08-28 | Kardach James P. | Method to reduce power in a computer system with bus master devices |
WO2004063915A2 (en) * | 2003-01-13 | 2004-07-29 | Arm Limited | Data processing performance control |
KR100563691B1 (en) | 2003-06-09 | 2006-03-28 | 엘지전자 주식회사 | Apparatus and method for managing power in computer system |
GB2403561A (en) * | 2003-07-02 | 2005-01-05 | Advanced Risc Mach Ltd | Power control within a coherent multi-processor system |
US7363523B2 (en) | 2004-08-31 | 2008-04-22 | Intel Corporation | Method and apparatus for controlling power management state transitions |
US7664970B2 (en) | 2005-12-30 | 2010-02-16 | Intel Corporation | Method and apparatus for a zero voltage processor sleep state |
US7412570B2 (en) | 2005-11-15 | 2008-08-12 | Sun Microsystems, Inc. | Small and power-efficient cache that can provide data for background DNA devices while the processor is in a low-power state |
US7516274B2 (en) | 2005-11-15 | 2009-04-07 | Sun Microsystems, Inc. | Power conservation via DRAM access reduction |
US7873788B1 (en) | 2005-11-15 | 2011-01-18 | Oracle America, Inc. | Re-fetching cache memory having coherent re-fetching |
US7934054B1 (en) | 2005-11-15 | 2011-04-26 | Oracle America, Inc. | Re-fetching cache memory enabling alternative operational modes |
US7958312B2 (en) | 2005-11-15 | 2011-06-07 | Oracle America, Inc. | Small and power-efficient cache that can provide data for background DMA devices while the processor is in a low-power state |
CN100377041C (en) * | 2005-12-02 | 2008-03-26 | 威盛电子股份有限公司 | Power source management device and method for multi-processor system |
CN100397301C (en) * | 2006-01-09 | 2008-06-25 | 威盛电子股份有限公司 | Power-saving method of central processor |
TW200727127A (en) | 2006-01-12 | 2007-07-16 | Via Tech Inc | Central processing unit power saving method and system |
CN100397302C (en) * | 2006-01-17 | 2008-06-25 | 威盛电子股份有限公司 | Power saving method and system for CPU |
CN100380282C (en) * | 2006-03-02 | 2008-04-09 | 威盛电子股份有限公司 | Power-supply saving method and system for central processing unit |
TWI326817B (en) * | 2006-07-07 | 2010-07-01 | Via Tech Inc | A power saving method and a system thereof applied to a cpu |
US9207747B2 (en) * | 2012-10-24 | 2015-12-08 | Insyde Software Corp. | Method and device for advanced configuration and power interface (ACPI) sleep-state support using CPU-only reset |
US9710041B2 (en) * | 2015-07-29 | 2017-07-18 | Intel Corporation | Masking a power state of a core of a processor |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0675425B1 (en) * | 1989-06-30 | 1997-12-10 | Fujitsu Personal Systems, Inc. | A method for reducing power consumed by a computer |
GB2260631B (en) * | 1991-10-17 | 1995-06-28 | Intel Corp | Microprocessor 2X core design |
US5615376A (en) * | 1994-08-03 | 1997-03-25 | Neomagic Corp. | Clock management for power reduction in a video display sub-system |
US5669003A (en) * | 1994-12-23 | 1997-09-16 | Intel Corporation | Method of monitoring system bus traffic by a CPU operating with reduced power |
US5713029A (en) * | 1995-09-29 | 1998-01-27 | International Business Machines Corporation | Information handling system including doze mode control |
US5740454A (en) * | 1995-12-20 | 1998-04-14 | Compaq Computer Corporation | Circuit for setting computer system bus signals to predetermined states in low power mode |
US5721935A (en) * | 1995-12-20 | 1998-02-24 | Compaq Computer Corporation | Apparatus and method for entering low power mode in a computer system |
-
1998
- 1998-02-02 WO PCT/US1998/001907 patent/WO1998044405A1/en active Application Filing
- 1998-02-02 GB GB9922090A patent/GB2338806A/en not_active Withdrawn
- 1998-02-02 DE DE19882269T patent/DE19882269T1/en not_active Withdrawn
- 1998-02-02 AU AU61400/98A patent/AU6140098A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO1998044405A1 (en) | 1998-10-08 |
DE19882269T1 (en) | 2000-05-11 |
GB2338806A (en) | 1999-12-29 |
AU6140098A (en) | 1998-10-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: WD Ref document number: 1024549 Country of ref document: HK |