GB973089A - Improvements in or relating to electric equipment for pulse signalling systems - Google Patents

Abstract

973, 089. Electric selective signalling systems. GENERAL ELECTRIC CO. Ltd. Nov. 6, 1962 [Nov. 7, 1961 ], No. 39841/61. Heading G4H. [Also in Division H4] In a pulse code modulation system sample voltages of the input signal are fed to two comparator circuits for producing pulse signals representing the sampled magnitude in digital form, and so arranged that only one comparator provides an output when the voltage is positive while the other is operative for negative sampled voltages. In a 25 channel time division system of the type described in Specification 973, 087 the input stages 43 (Fig. 4) supply each sampled signal value s over line 44 to circuits 45, 47 operating to add and subtract respectively a voltage x to the signal. The composite signals are then fed via gates 46 and 48 (operating in conjunction with channel gates) to comparator circuits 40 and 41. Reference voltages Vr, V<SP>1</SP>r corresponding to voltages +x and -x, respectively, are supplied to comparators 40 and 41, respectively, the operation of which forms the subject-matter of Specification 973,088. Comparator circuit 40 only provides output digital pulse signals when s + x is less than x i.e, for negative s while circuit 41 operates when s - x is less than -x i.e. for positive s. The output pulses of these circuits which correspond in number to the sampled amplitude are fed via gate 52 to counter 53 and the first six stages of a register 54. Depending on whether circuit 40 or 41 supplies the signal a pulse or not, as the case may be, is sent to the 7th stage of 54 by circuits 55 and 56 while the 8th stage is used for synchronization.