GB9701851D0 - Circuit and method of latching a bit line in a non-volatile memory - Google Patents
Circuit and method of latching a bit line in a non-volatile memoryInfo
- Publication number
- GB9701851D0 GB9701851D0 GBGB9701851.9A GB9701851A GB9701851D0 GB 9701851 D0 GB9701851 D0 GB 9701851D0 GB 9701851 A GB9701851 A GB 9701851A GB 9701851 D0 GB9701851 D0 GB 9701851D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- latching
- circuit
- bit line
- volatile memory
- volatile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9701851A GB2321734A (en) | 1997-01-30 | 1997-01-30 | Circuit and method of latching a bit line in a non-volatile memory |
EP98100798A EP0856851B1 (en) | 1997-01-30 | 1998-01-19 | Circuit and method of latching a bit line in a non-volatile memory |
DE69822536T DE69822536T2 (en) | 1997-01-30 | 1998-01-19 | Circuit and method for locking a bit line in a non-volatile memory |
US09/009,290 US5978262A (en) | 1997-01-30 | 1998-01-20 | Circuit and method of latching a bit line in a non-volatile memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9701851A GB2321734A (en) | 1997-01-30 | 1997-01-30 | Circuit and method of latching a bit line in a non-volatile memory |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9701851D0 true GB9701851D0 (en) | 1997-03-19 |
GB2321734A GB2321734A (en) | 1998-08-05 |
Family
ID=10806777
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9701851A Withdrawn GB2321734A (en) | 1997-01-30 | 1997-01-30 | Circuit and method of latching a bit line in a non-volatile memory |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2321734A (en) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01171195A (en) * | 1987-12-25 | 1989-07-06 | Sony Corp | Memory device |
DE68905240T2 (en) * | 1988-06-01 | 1993-07-15 | Nec Corp | SEMICONDUCTOR STORAGE DEVICE WITH HIGH-SPEED READING DEVICE. |
FR2703501B1 (en) * | 1993-04-01 | 1995-05-19 | Gemplus Card Int | Integrated circuit for memory card and method for counting units in a memory card. |
-
1997
- 1997-01-30 GB GB9701851A patent/GB2321734A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
GB2321734A (en) | 1998-08-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |