GB931772A - Improvements relating to electronic computer equipment - Google Patents

Improvements relating to electronic computer equipment

Info

Publication number
GB931772A
GB931772A GB3818858A GB3818858A GB931772A GB 931772 A GB931772 A GB 931772A GB 3818858 A GB3818858 A GB 3818858A GB 3818858 A GB3818858 A GB 3818858A GB 931772 A GB931772 A GB 931772A
Authority
GB
United Kingdom
Prior art keywords
computer
transfer
peripheral
gates
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3818858A
Inventor
Jack Connett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Associated Electrical Industries Ltd
Original Assignee
Associated Electrical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Associated Electrical Industries Ltd filed Critical Associated Electrical Industries Ltd
Priority to GB3818858A priority Critical patent/GB931772A/en
Priority to FR811547A priority patent/FR1241627A/en
Publication of GB931772A publication Critical patent/GB931772A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

931,772. Input/output arrangements for datastorage apparatus. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. Nov. 25, 1959 [Nov. 26, 1958], No. 38188/58. Class 106 (1). Data transfer between a central computer and peripheral equipment such as magnetic drum stores and tape readers takes place via a single data highway; for transfer into the computer main store (see Fig. 2) a gate T is opened in the computer and threshold three gates A6, A7 in the selected peripheral item receive an input D, while for transfer out of the computer main store gate A1 is enabled and 3-gates A3, A4 receive an input ST1. As shown, the peripheral unit has two buffer stores B1, B2 which are connected in turn by a switching signal J and its inverse J, each buffer accommodating one word; when data transfer is called for the normal sequence of computer operation is interrupted as described in Specification 931,773. When the transfer of an address into the block address store of a peripheral unit is to be effected, gates A2 and A5 are opened instead of A1 and A3 or A4. Fig. 3 (not shown) illustrates schematically the connections required between a computer and peripheral units to provide the necessary timing and enabling signals, and for selecting required addresses in the peripheral units and modifying computer addresses after each word transfer from the peripheral unit buffer stores.
GB3818858A 1958-11-26 1958-11-26 Improvements relating to electronic computer equipment Expired GB931772A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB3818858A GB931772A (en) 1958-11-26 1958-11-26 Improvements relating to electronic computer equipment
FR811547A FR1241627A (en) 1958-11-26 1959-11-26 Improvements to calculators

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3818858A GB931772A (en) 1958-11-26 1958-11-26 Improvements relating to electronic computer equipment

Publications (1)

Publication Number Publication Date
GB931772A true GB931772A (en) 1963-07-17

Family

ID=10401815

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3818858A Expired GB931772A (en) 1958-11-26 1958-11-26 Improvements relating to electronic computer equipment

Country Status (2)

Country Link
FR (1) FR1241627A (en)
GB (1) GB931772A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2117944A (en) * 1982-03-17 1983-10-19 Inst Francais Du Petrole Device controlling data transfers between a data acquisition system and a recording and reading apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2117944A (en) * 1982-03-17 1983-10-19 Inst Francais Du Petrole Device controlling data transfers between a data acquisition system and a recording and reading apparatus

Also Published As

Publication number Publication date
FR1241627A (en) 1960-09-16

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