GB931050A - Binary counter arrangement - Google Patents
Binary counter arrangementInfo
- Publication number
- GB931050A GB931050A GB244762A GB244762A GB931050A GB 931050 A GB931050 A GB 931050A GB 244762 A GB244762 A GB 244762A GB 244762 A GB244762 A GB 244762A GB 931050 A GB931050 A GB 931050A
- Authority
- GB
- United Kingdom
- Prior art keywords
- pulses
- pulse
- positive
- true
- negative
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
Landscapes
- Radar Systems Or Details Thereof (AREA)
Abstract
931,050. Counters. HUGHES AIRCRAFT CO. Jan. 23, 1962 [Feb. 17, 1961], No. 2447/62. Class 106 (1). A binary forward-counting device is combined with a buffer store which compensates for pulses representing a reverse count. A pulse source 52 which may be operated by the motion of a mechanical element issues pulses Pp in respect of " positive " pulses and pulses Np in respect of " negative " pulses which may occur due to unevenness in the motion of the mechanical element. Flip-flops 14, 16 are normally true so that AND gate 18 passes " positive " pulses Pp to the counter 10. A " negative " pulse sets both flip-flops 14, 16 to false. The next " positive " pulse is therefore not counted but by passing through OR gates 20, 22 restores 14, 16 to true. In the case of two " negative " pulses the second sets 16 true. The next " positive " pulse reverses both 14 and 16 through OR gates 20, 22 so that only 14 is true while a second " positive " pulse restores 16. Fig. 2 (not shown) includes the additional feature of overshoot capability and count direction choice. If the mechanical element advances too far an unwanted extra pulse may be generated. To compensate for this the code for zero is 00 . . . 01 and resetting in such a case sets flip-flop 16 to false. Therefore at the beginning of the next count the first Pp pulse is not counted but sets 14 and 16 to true. A further embodiment provides for up to six " negative " pulses.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US8994961A | 1961-02-17 | 1961-02-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB931050A true GB931050A (en) | 1963-07-10 |
Family
ID=22220345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB244762A Expired GB931050A (en) | 1961-02-17 | 1962-01-23 | Binary counter arrangement |
Country Status (3)
| Country | Link |
|---|---|
| BE (1) | BE614001A (en) |
| FR (1) | FR1317445A (en) |
| GB (1) | GB931050A (en) |
-
1962
- 1962-01-23 GB GB244762A patent/GB931050A/en not_active Expired
- 1962-02-12 FR FR887737A patent/FR1317445A/en not_active Expired
- 1962-02-16 BE BE614001A patent/BE614001A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| FR1317445A (en) | 1963-02-08 |
| BE614001A (en) | 1962-06-18 |
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