GB894746A - Electronic switching unit for the construction of information storage devices, counters and the like - Google Patents
Electronic switching unit for the construction of information storage devices, counters and the likeInfo
- Publication number
- GB894746A GB894746A GB3615058A GB3615058A GB894746A GB 894746 A GB894746 A GB 894746A GB 3615058 A GB3615058 A GB 3615058A GB 3615058 A GB3615058 A GB 3615058A GB 894746 A GB894746 A GB 894746A
- Authority
- GB
- United Kingdom
- Prior art keywords
- capacitor
- pulse
- input
- pulses
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
- G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/601—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors using transformer coupling
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/12—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using diode rectifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/002—Pulse counters comprising counting chains; Frequency dividers comprising counting chains using semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/53—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
- H03K3/57—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Software Systems (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
Abstract
894,746. Transistor pulse circuits. STANDARD TELEPHONES & CABLES Ltd. (Standard Elektrik A.G.) Nov. 11, 1958, No. 36150/58. Class 40(6). A switching unit for use for example, in an information storage device, counter, shiftregister or pulse distributer, comprises a capacitor connected in parallel to at least one non-linear switching element which is set via a control lead to a blocked or unblocked condition, the capacitor being connected in series with a load resistor to one or more input leads so as to pass pulses applied to the leads in dependence upon the state of charge of the capacitor. Fig. 2 shows a gating circuit comprising a capacitor C connected in parallel with a PNP junction transistor T so that C is discharged when transistor T conducts during the incidence of a negative control pulse USt applied to its base. When an input pulse Ue is applied via decoupling diode D after the incidence of a control pulse capacitor C is charged to generate an output pulse Ua at the load resistors R, R<SP>1</SP>, R". Thus the gate is conditioned by each control pulse USt to pass the next occurring input pulse Ue. Fig. 3 shows a ring counter comprising switching units E1, E2, E3 of the type described with reference to Fig. 2 and time delay units V1, V2, V3. If initially the capacitors in units E2, E3 are charged and that in unit El is discharged the first input pulse at terminal e causes the capacitor in units El to charge which delivers an output signal via delay element Vt to the control lead of units E2. The switching element in E2 is unblocked and the capacitor in E2 discharged so that upon the arrival of the next input pulse the capacitor in E2 recharges and that in E3 discharges, the process repeating itself so that the circuit functions as a scale of three counter. If in a multi-stage counter of similar type the capacitors are discharged in several switching units then the counter may function as a shift register the control lead of the first stage being connected with the lead in the conductor for information pulses and the busbar S with the lead-in conductor for transfer pulses. In a ring counter stage, Fig. 4, two staggered trains of input pulses are applied respectively to the odd and even numbered stages of the ring. Fig. 5 shows a distributer comprising ring connected switching stages El, E2..E12 having four inputs e1. .e4 and two lead-in conductors to each counting stage. Fig. 6 shows an AND gate in which transistors T1, T2 are normally blocked by bias voltages UV1, UV2. When negative control pulses are applied on both leads ST1, ST2 capacitor C is discharged and the next input pulse at e recharges the capacitor to produce an output pulse at a. The discharge of capacitor C when negative pulses are on both inputs ST1, ST2 may also be used to produce an output pulse. Fig. 7 shows an OR gate. When the capacitor C is charged an output pulse at a will only be produced if prior thereto, via one or the other or both control leads T1, ST2, at least one of the transistors T1, T2 has been unblocked to discharge the capacitor. Fig. 8 shows an OR gate in which normally capacitor C is discharged, an output at a in dependence upon an input at e will be produced only when capacitor C is charged which occurs only when pulses are present on one or both of the control leads ST1, ST2. Fig. 9 shows an AND gate in which transistor T2 acts as decoupling, only during the coincidence of input pulses on control leads ST1, ST2 will an output pulse from input e be produced at output a. The output may be coupled back to the input via a time delay element so that the arrangement having indicated the coincidence will automatically be ready to operate again.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB3615058A GB894746A (en) | 1957-10-01 | 1958-11-11 | Electronic switching unit for the construction of information storage devices, counters and the like |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1957ST013004 DE1065465B (en) | 1957-10-01 | 1957-10-01 | Electronic switching unit for the construction of information memories, counters and the like |
GB3615058A GB894746A (en) | 1957-10-01 | 1958-11-11 | Electronic switching unit for the construction of information storage devices, counters and the like |
US776097A US3056045A (en) | 1957-10-01 | 1958-11-24 | Electronic switching unit for the construction of information storage devices, counters and the like |
Publications (1)
Publication Number | Publication Date |
---|---|
GB894746A true GB894746A (en) | 1962-04-26 |
Family
ID=27212397
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB3615058A Expired GB894746A (en) | 1957-10-01 | 1958-11-11 | Electronic switching unit for the construction of information storage devices, counters and the like |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB894746A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1441442A1 (en) * | 2003-01-21 | 2004-07-28 | Hewlett-Packard Development Company, L.P. | A low power logic gate |
-
1958
- 1958-11-11 GB GB3615058A patent/GB894746A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1441442A1 (en) * | 2003-01-21 | 2004-07-28 | Hewlett-Packard Development Company, L.P. | A low power logic gate |
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