GB890071A - Improvements in or relating to pulse generating circuits - Google Patents

Abstract

890,071. Transistor pulse amplifying circuits. AUTOMATIC TELEPHONE & ELECTRIC CO. Ltd. Feb. 15, 1961 [March 23, 1960], No. 10278/60. Class 40(6). In a transistor circuit arrangement for producing steep-sided pulses, in which a square wave input is applied to a first transistor. which is driven from cut-off to saturation by the leading edges of the pulses, the square wave input is also applied over a differentiating circuit to a second transistor which is driven from cut-off to saturation by the trailing edges of the pulses. The two transistors have a common load circuit through which current flows in opposite directions according to which transistor is conducting and at the instant of conduction of the second transistor a current surge rows through it which is shared by the common load and the first transistor, so as to cause an instantaneous reversal of current in the common load. In an embodiment, transistors TX1, 2, Fig. 1, constitute a flip-flop pair; in the quiescent state TX1 is conductive, its base being biased negative from the clamping diode D6 over resistors R3, 4 while TX2 is non-conductive, its base being biased positive over resistors R5, 6 and diode D5. Positive-going rectangular pulses which may be derived from the synchronizing track of a magnetic recording drum or the like are applied from line IL to the base of TX1 over a shaping circuit comprising condenser Cl, resistor R1 and diodes D1, 2. In this Dl prevents the negative-going portions of the square waves being applied to the base of transistor TX1 and D2 prevents positivegoing pulses generated at the collector of transistor TX2 being dissipated in the elements Cl. R1 The pulses applied to the base of transistor TX1 drive it non-conductive and cause negative-going pulses to be passed over condenser C2 to the base of TX2, rendering it conductive for a period determined by the time-constant circuit C2, RX, R5, 6, after which the circuit quickly reverts to its original condition. This is aided by condenser C3 which provides a drainage path for holes stored in the base of transistor TX2. Diodes D3, 4 prevent transistors TX1, 2 bottoming. The pulse width may be varied by means of a transistor TX8 the emitter-collector path of which forms with resistor R18 a variable shunt across resistor RX, the impedance of which is varied by toggle pulses applied to line CL and which are amplified by transistor TX9 before application to the base of transistor TX8. In the quiescent state TX9 is backed off by the positive bias applied to its base over resistor R21 and TX8 is prevented from conducting by a bias derived over resistors R17, 19. A negative-going toggle pulse on line CL causes transistor TX9 to prime TX8 to conduct when transistor TX1 is in its non-triggered state, thus connecting resistor R18 effectively in parallel with RX. The positive-going pulses, Fig. 3(a), developed at the collector of transistor TX2 are fed via a current-controlling circuit comprising resistor R8 and condenser C4 to the base of NPN transistor TX4, which is biased to cut-off by a negative bias over resistor R9 and drive it to saturation for the duration of the pulses. The trailing edges of the resultant negative-going pulses, Fig. 3(b), at the collector would be delayed due to electron storage in the base. To prevent this, the positive going pulses from the collector of TX2 are differentiated, Fig. 3(c), by circuit C5, R10 and are applied via an emitterfollower TX3 to the base of PNP transistor TX5. This is normally biased to cut-off by means of a positive bias over resistor R11 and the positive pulses produced from the leading edges of the differentiated pulses do not affect it. The negative-going pulses produced from the trailing edges, however, render transistor TX5 conductive so that a low-impedance path is provided from the source +24v to the collector of transistor TX4 via load resistor R13 and shunt C7. Thus large positive-going surges are produced at this collector corresponding to the trailing edges of the rectangular pulses. The resultant output, comprising negative-going rectangular pulses of the same width as those generated by the flip-flop; followed by positive-going pulses, Fig. 3(d) is applied to a push-pull emitter-follower stage. This comprises paralleled NPN and PNP transistors TX6, 7, capacitor C8 being provided in the circuit in shunt with collector resistor R15 to maintain the fast rise time of the positivegoing part of the waveform. The output of this stage is split between a number of output stages, each comprising a similar pushpull emitter-follower pair TX10, 11, Fig. 2, followed by one or more grounded emitter stages TX12 with their inputs in parallel. Each of the latter is normally biased to cutoff by a positive bias over its base resistor R27 and is driven to saturation by the negative-going rectangular leading portions of the pulses 3(d); the positive-going portions which follow rapidly drive the transistors TX12 back to cut-off, while the low impedance presented by transistor TX10 to the base of the transistors TX12 enables the accumulated holes to drain rapidly away.