GB8824331D0 - Local display bus architecture & communications method for raster display - Google Patents

Local display bus architecture & communications method for raster display

Info

Publication number
GB8824331D0
GB8824331D0 GB888824331A GB8824331A GB8824331D0 GB 8824331 D0 GB8824331 D0 GB 8824331D0 GB 888824331 A GB888824331 A GB 888824331A GB 8824331 A GB8824331 A GB 8824331A GB 8824331 D0 GB8824331 D0 GB 8824331D0
Authority
GB
United Kingdom
Prior art keywords
display
bus architecture
communications method
raster
local
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB888824331A
Other versions
GB2211706B (en
GB2211706A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of GB8824331D0 publication Critical patent/GB8824331D0/en
Publication of GB2211706A publication Critical patent/GB2211706A/en
Application granted granted Critical
Publication of GB2211706B publication Critical patent/GB2211706B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/20—Function-generator circuits, e.g. circle generators line or curve smoothing circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/12—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/122—Tiling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/024—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour registers, e.g. to control background, foreground, surface filling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Generation (AREA)
  • Digital Computer Display Output (AREA)
GB8824331A 1987-10-26 1988-10-18 Local display bus architecture and communications method for raster display Expired - Fee Related GB2211706B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11392787A 1987-10-26 1987-10-26

Publications (3)

Publication Number Publication Date
GB8824331D0 true GB8824331D0 (en) 1988-11-23
GB2211706A GB2211706A (en) 1989-07-05
GB2211706B GB2211706B (en) 1992-04-08

Family

ID=22352341

Family Applications (3)

Application Number Title Priority Date Filing Date
GB8824331A Expired - Fee Related GB2211706B (en) 1987-10-26 1988-10-18 Local display bus architecture and communications method for raster display
GB9114231A Expired - Fee Related GB2245129B (en) 1987-10-26 1991-07-01 Local display bus architecture and communications method for raster display
GB9114232A Expired - Fee Related GB2245130B (en) 1987-10-26 1991-07-01 Local display bus architecture and communications method for raster display

Family Applications After (2)

Application Number Title Priority Date Filing Date
GB9114231A Expired - Fee Related GB2245129B (en) 1987-10-26 1991-07-01 Local display bus architecture and communications method for raster display
GB9114232A Expired - Fee Related GB2245130B (en) 1987-10-26 1991-07-01 Local display bus architecture and communications method for raster display

Country Status (2)

Country Link
JP (1) JPH0727571B2 (en)
GB (3) GB2211706B (en)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0617401A3 (en) * 1989-07-28 1995-04-26 Hewlett Packard Co Methods and apparatus for accelerating windows in graphics systems.
CA2050658C (en) * 1990-09-14 1997-01-28 John M. Peaslee Dual hardware channels and hardware context switching in a graphics rendering processor
US5450599A (en) * 1992-06-04 1995-09-12 International Business Machines Corporation Sequential pipelined processing for the compression and decompression of image data
US5289577A (en) * 1992-06-04 1994-02-22 International Business Machines Incorporated Process-pipeline architecture for image/video processing
US6002411A (en) * 1994-11-16 1999-12-14 Interactive Silicon, Inc. Integrated video and memory controller with data processing and graphical processing capabilities
US6067098A (en) * 1994-11-16 2000-05-23 Interactive Silicon, Inc. Video/graphics controller which performs pointer-based display list video refresh operation
US5838334A (en) * 1994-11-16 1998-11-17 Dye; Thomas A. Memory and graphics controller which performs pointer-based display list video refresh operations
US5611041A (en) * 1994-12-19 1997-03-11 Cirrus Logic, Inc. Memory bandwidth optimization
JPH0999031A (en) * 1995-10-05 1997-04-15 Rieko Moto Blood circulation promoting instrument
TW498273B (en) 1997-07-25 2002-08-11 Koninkl Philips Electronics Nv Digital monitor
US6694379B1 (en) * 1999-04-09 2004-02-17 Sun Microsystems, Inc. Method and apparatus for providing distributed clip-list management
US6567091B2 (en) 2000-02-01 2003-05-20 Interactive Silicon, Inc. Video controller system with object display lists
US6760772B2 (en) 2000-12-15 2004-07-06 Qualcomm, Inc. Generating and implementing a communication protocol and interface for high data rate signal transfer
US8812706B1 (en) 2001-09-06 2014-08-19 Qualcomm Incorporated Method and apparatus for compensating for mismatched delays in signals of a mobile display interface (MDDI) system
DE602004030236D1 (en) 2003-06-02 2011-01-05 Qualcomm Inc GENERATE AND IMPLEMENT A SIGNAL PROTOCOL AND INTERFACE FOR HIGHER DATA RATES
EP2363992A1 (en) * 2003-08-13 2011-09-07 Qualcomm Incorporated A signal interface for higher data rates
KR100973103B1 (en) 2003-09-10 2010-08-02 콸콤 인코포레이티드 High data rate interface
EP1680904A1 (en) 2003-10-15 2006-07-19 QUALCOMM Incorporated High data rate interface
WO2005043862A1 (en) 2003-10-29 2005-05-12 Qualcomm Incorporated High data rate interface
KR20060096161A (en) 2003-11-25 2006-09-07 콸콤 인코포레이티드 High data rate interface with improved link synchronization
JP4902355B2 (en) 2003-12-08 2012-03-21 クゥアルコム・インコーポレイテッド High data rate interface with improved link synchronization
WO2005088939A1 (en) 2004-03-10 2005-09-22 Qualcomm Incorporated High data rate interface apparatus and method
JP4519903B2 (en) 2004-03-17 2010-08-04 クゥアルコム・インコーポレイテッド High speed data rate interface apparatus and method
BRPI0511783A (en) 2004-06-04 2008-01-15 Qualcomm Inc High data speed interface method and equipment
US8650304B2 (en) 2004-06-04 2014-02-11 Qualcomm Incorporated Determining a pre skew and post skew calibration data rate in a mobile display digital interface (MDDI) communication system
US8667363B2 (en) 2004-11-24 2014-03-04 Qualcomm Incorporated Systems and methods for implementing cyclic redundancy checks
US8692838B2 (en) 2004-11-24 2014-04-08 Qualcomm Incorporated Methods and systems for updating a buffer
US8873584B2 (en) 2004-11-24 2014-10-28 Qualcomm Incorporated Digital data interface device
US8730069B2 (en) 2005-11-23 2014-05-20 Qualcomm Incorporated Double data rate serial encoder
US8692839B2 (en) 2005-11-23 2014-04-08 Qualcomm Incorporated Methods and systems for updating a buffer
CN102576296A (en) * 2009-07-02 2012-07-11 自由科学有限公司 Vector-based magnified pointer

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2426296A1 (en) * 1978-05-18 1979-12-14 Thomson Csf VECTOR GENERATOR FOR GRAPHIC CONSOLE
JPS62106562A (en) * 1985-11-01 1987-05-18 Mitsubishi Electric Corp Processing unit for digital signal
JPS62144283A (en) * 1985-12-18 1987-06-27 Fujitsu Ltd Pipe line control system

Also Published As

Publication number Publication date
GB2245129B (en) 1992-04-08
GB2245129A (en) 1991-12-18
GB2245130A (en) 1991-12-18
GB9114232D0 (en) 1991-08-21
JPH0727571B2 (en) 1995-03-29
GB2245130B (en) 1992-04-08
GB2211706B (en) 1992-04-08
JPH01129371A (en) 1989-05-22
GB9114231D0 (en) 1991-08-21
GB2211706A (en) 1989-07-05

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19971018