GB8817338D0 - Improvements in & relating to method of testing integrated circuits - Google Patents
Improvements in & relating to method of testing integrated circuitsInfo
- Publication number
- GB8817338D0 GB8817338D0 GB8817338A GB8817338A GB8817338D0 GB 8817338 D0 GB8817338 D0 GB 8817338D0 GB 8817338 A GB8817338 A GB 8817338A GB 8817338 A GB8817338 A GB 8817338A GB 8817338 D0 GB8817338 D0 GB 8817338D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- test
- registers
- delays
- test patterns
- different
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318577—AC testing, e.g. current testing, burn-in
- G01R31/31858—Delay testing
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
To test an integrated circuit such as in Fig 1 wherein there are different paths with different delays between input test registers R1, R2 and output test registers R3, the different delays preventing exhaustive test patterns from being applied to internal embedded combinational blocks Ca, Cb, the serial path of shift registers has additional registers Ds(Fig 2) to resynchronise the test patterns for the logic blocks. Alternatively, the serial path is considered to have imaginary delays present and non-contiguous inputs to the logic blocks are stimulated by exhaustive test patterns provided by a special algorithm viz a polynomial functionally dependent on the difference in the delays along the signal paths. The technique may be used with interleaved test registers. <IMAGE>
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8817338A GB2221044B (en) | 1988-07-21 | 1988-07-21 | Improvements in and relating to methods of testing integrated circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8817338A GB2221044B (en) | 1988-07-21 | 1988-07-21 | Improvements in and relating to methods of testing integrated circuits |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8817338D0 true GB8817338D0 (en) | 1988-08-24 |
GB2221044A GB2221044A (en) | 1990-01-24 |
GB2221044B GB2221044B (en) | 1992-09-30 |
Family
ID=10640833
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8817338A Expired - Fee Related GB2221044B (en) | 1988-07-21 | 1988-07-21 | Improvements in and relating to methods of testing integrated circuits |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2221044B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5596585A (en) * | 1995-06-07 | 1997-01-21 | Advanced Micro Devices, Inc. | Performance driven BIST technique |
US8155907B1 (en) * | 2009-06-08 | 2012-04-10 | Xilinx, Inc. | Methods of enabling functions of a design to be implemented in an integrated circuit device and a computer program product |
-
1988
- 1988-07-21 GB GB8817338A patent/GB2221044B/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
GB2221044B (en) | 1992-09-30 |
GB2221044A (en) | 1990-01-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19950721 |