GB750259A - Electronic pulse distributing circuits - Google Patents

Abstract

750,259. Digital electric calculating-apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 13, 1953 [Nov. 18, 1952], No. 31507/53. Class 106 (1). An electronic circuit for distributing pulses from a signal source according to a prearranged temporal pattern, e.g. for switching or gating purposes in a computer, comprising a ring of cascade-connected bi-stable trigger elements, is operable in major cycles each comprising minor cycles each defined by transfer of a change of state from trigger to trigger around the ring in response to the pulses, and the time duration pattern of the minor cycles may be changed by counters arranged to control switch means serving to make or break connections between non-adjacent triggers in the ring whereby the number of triggers operative in the ring is varied. The circuit arrangement shown in block diagrammatic form in Figs. 25-27 generates signals such as 412-421, Figs. 29 and 32, for defining the indicated " G," " R," and " W " periods in a cycle of operation of an electronic data storage device. During G periods the stored information may be regenerated, and during R and W periods information may respectively be read from or written into the device. The arrangement comprises peaker circuits (P) which in response to negativegoing input pulse produce a sharp positive output pulse, Eccles-Jordan double triode trigger circuits (T), cathode followers (CF), coincidence gates or switches (S), and pulse inverters (I); circuit diagrams for these components are given in the Specification. A crystal-controlled oscillator 30, Fig. 25 (F, Fig. 24, not shown), supplies pulses at 1 mc/s., through units 31-34 and line 435 to a chain of triggers 61-65 and 67-74 (forming the ring circuit). Each pulse resets any trigger in the " on " or operative condition which in turn switches " on " the succeeding trigger. The beginning of each period is marked by the switching " on " of trigger 71 which supplies a positive pulse on line 37A to pairs of switches 80, 82; 83, 85; 86, 88; 89, 90; 91, 92; and 93, 95. One of these pairs is rendered operative by its associated trigger 120, 121, 122, 123, 124 or 125, Fig. 26, whereby a selected one (61, 63, 65 or 67) of the triggers in the chain is switched " on," through a connection including condenser 81, 84, 87 or 94, to determine the number (9, 7, 5 or 4) of pulse intervals (1 Ás. each) in the period. Thus, e.g., at the beginning of the period G1-G2, Fig. 29, trigger 120 conditions switches 80, 82, through inverters 101, 102, whereby the pulse on 37A will pass through 82 and switch on trigger 61, so that 9 pulses will be required before 71 is again switched on, and the period will consist of 9 pulse intervals as indicated. The pulse on 37A will also pass through switch 80 and cathode follower 96 to line 96A to step on a counting chain comprising 4 triggers 162, 156, 150, 142, Fig. 27, of which 162 was previously switched on by a pulse on line 120B from trigger 120. This counting chain allows the 9-pulse periods to be repeated 4 times (G1-R0, Fig. 29) before an output pulse on line 142A, Figs. 27 and 26, resets trigger 120 and switches on trigger 123 for the 5-pulse period R0-R1. Two further counting chains, Fig. 27, comprising triggers 144, 152, 158, 164, 168, 172, 176 and 147, 154, 160, 166, 170, 174, 178 respectively are used for the 7-pulse and 4-pulse periods W1-G0 and R1-W0, Figs. 32 and 29. The period-defining signals are obtained through cathode followers from the triggers 120-125, Fig. 26, and counting chain triggers, Fig. 27; e.g., signal 412, Fig. 29, defining period R5-R6, is obtained from trigger 154, Fig. 27, through cathode follower 155. Outputs from the main chain of triggers 61-65, 67-74, Fig. 25, supplied through cathode followers to lines 422-434 (see the bottom two lines of Fig. 29), may be passed through gates controlled by the period-defining signals to produce control signals as desired at different times in the cycle.