GB2626678A - Circuitry for compensating for gain and/or phase mismatch between voltage and current monitoring paths - Google Patents

Circuitry for compensating for gain and/or phase mismatch between voltage and current monitoring paths Download PDF

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Publication number
GB2626678A
GB2626678A GB2402495.2A GB202402495A GB2626678A GB 2626678 A GB2626678 A GB 2626678A GB 202402495 A GB202402495 A GB 202402495A GB 2626678 A GB2626678 A GB 2626678A
Authority
GB
United Kingdom
Prior art keywords
circuitry
monitoring path
reference element
compensation
impedance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
GB2402495.2A
Other versions
GB202402495D0 (en
Inventor
A Hellman Ryan
Parikh Viral
Maru Siddharth
Das Tejasvi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cirrus Logic International Semiconductor Ltd
Original Assignee
Cirrus Logic International Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US17/690,327 external-priority patent/US11644521B1/en
Application filed by Cirrus Logic International Semiconductor Ltd filed Critical Cirrus Logic International Semiconductor Ltd
Publication of GB202402495D0 publication Critical patent/GB202402495D0/en
Publication of GB2626678A publication Critical patent/GB2626678A/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/08Measuring resistance by measuring both voltage and current
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/14Measuring resistance by measuring current or voltage obtained from a reference source
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/005Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R29/00Monitoring arrangements; Testing arrangements
    • H04R29/001Monitoring arrangements; Testing arrangements for loudspeakers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00Circuits for transducers, loudspeakers or microphones
    • H04R3/007Protection circuits for transducers

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Amplifiers (AREA)

Abstract

Circuitry comprising: a voltage monitoring path; a current monitoring path; a reference element of a predefined impedance; and processing circuitry, wherein in operation of the circuitry in a calibration mode of operation: the voltage monitoring path is operative to output a signal indicative of a voltage across the reference element in response to a reference signal applied to the reference element; the current monitoring path is operative to output a signal indicative of a current through the reference element in response to the reference signal; and the processing circuitry is operative to: receive the signal indicative of the voltage across the reference element and the signal indicative of the current through the reference element; generate an estimate of an impedance of the reference element; and determine a compensation parameter for an element of the circuitry for compensating for a difference between the estimate of the impedance and the predefined impedance of the reference element.

Claims (21)

1. Circuitry comprising: a voltage monitoring path; a current monitoring path; a reference element of a predefined impedance; and processing circuitry, wherein in operation of the circuitry in a calibration mode of operation: the voltage monitoring path is operative to output a signal indicative of a voltage across the reference element in response to a reference signal applied to the reference element; the current monitoring path is operative to output a signal indicative of a current through the reference element in response to the reference signal; and the processing circuitry is operative to: receive the signal indicative of the voltage across the reference element and the signal indicative of the current through the reference element; generate an estimate of an impedance of the reference element; and determine a compensation parameter for an element of the circuitry for compensating for a difference between the estimate of the impedance and the predefined impedance of the reference element.
2. Circuitry according to claim 1 , wherein the circuitry is configured to apply the compensation parameter in operation of the circuitry in a load driving mode of operation.
3. Circuitry according to claim 1 or claim 2, wherein the compensation parameter is a frequency domain compensation parameter.
4. Circuitry according to claim 3, wherein the processing circuitry comprises: a first conversion block for converting the signal indicative of the voltage across the reference element into a first frequency domain complex vector; and 25 a second conversion block for converting the signal indicative of the current through the reference element into a second frequency domain complex vector, wherein the processing circuitry comprises a calculation block configured to generate the estimate of the impedance of the reference element based on the first and second frequency domain complex vectors and to compare the generated estimate to the predefined impedance of the reference element.
5. Circuitry according to claim 4, wherein the circuitry further comprises a compensation block configured to apply the compensation parameter to the first frequency domain complex vector or the second frequency domain complex vector.
6. Circuitry according to claim 4 or claim 5, wherein the calculation block is configured to calculate a gain mismatch p by dividing a ratio of the magnitude of the first complex vector to the magnitude of the second complex vector by the magnitude of the predefined impedance, and to calculate a phase mismatch by subtracting the phase of a ratio of the first complex vector to the second complex vector from the phase of the predefined impedance.
7. Circuitry according to claim 6, wherein the calculation block is configured to calculate a first compensation coefficient BR and a second compensation coefficient Bi, where: and wherein the compensation parameter comprises a compensation vector comprising the first and second compensation coefficients.
8. Circuitry according to any of claims 5 - 7, wherein the compensation parameter comprises a compensation vector comprising first and second temperature-dependent compensation coefficients, wherein the calculation block is configured to select the first and second temperature-dependent compensation coefficients based on a detected temperature.
9. Circuitry according to claim 8, wherein the temperature-dependent compensation coefficients comprise predefined polynomials.
10. Circuitry according to any of the preceding claims, wherein the compensation parameter is a time domain compensation parameter.
11 . Circuitry according to claim 10, wherein the compensation parameter comprises a parameter of an analog element of the voltage monitoring path or the current monitoring path.
12. Circuitry according to claim 11 , wherein the voltage monitoring path and the current monitoring path each comprise analog front end (AFE) circuitry and analog to digital converter (ADC) circuitry, and wherein the compensation parameter comprises a parameter of the AFE circuitry or the ADC circuitry.
13. Circuitry according to claim 12, wherein the compensation parameter comprises one or more of: a resistance of a resistor of filter circuitry of the AFE circuitry of the voltage monitoring path or the current monitoring path; a capacitance of a capacitor of filter circuitry of the AFE circuitry of the voltage monitoring path or the current monitoring path; and a transconductance of amplifier circuitry of the AFE circuitry of the voltage monitoring path or the current monitoring path.
14. Circuitry according to claim 12 or claim 13, wherein the compensation parameter comprises one or more of: a resistance of a resistor of a feedback network of amplifier circuitry of the AFE circuitry of the voltage monitoring path or the current monitoring path; and a reference voltage for the ADC circuitry of the voltage monitoring path or the current monitoring path.
15. Circuitry according to any of the preceding claims, wherein the circuitry is configured to apply the compensation parameter in operation of the circuitry in the compensation mode of operation, wherein the processing circuitry is operative to: with the compensation parameter applied, generate an estimate of an impedance of the reference element; and compare the estimate of the impedance and the predefined impedance of the reference element.
16. Circuitry according to any of the preceding claims, wherein the reference element comprises a tantalum nitride resistor.
17. Circuitry according to any of the preceding claims, further comprising load selector circuitry for selectively coupling the voltage and current monitoring paths to the reference element or to a load according to the mode of operation of the circuitry.
18. Circuitry according to claim 17, wherein the load selector circuitry comprises a controllable switch network.
19. Circuitry according to claim 17 or claim 18, wherein the current monitoring path comprises a plurality of selectable current sense resistors, wherein: in the calibration mode, the processing circuitry is operative to determine a first compensation parameter with a first one of the plurality selectable current sense resistors selected; and in a load driving mode of operation of the circuitry, the processing circuitry is operable to: generate a first estimate of an impedance of a load coupled to the circuitry with the first one of the plurality selectable current sense resistors selected; and determine a second compensation parameter if a second estimate of the impedance of the load generated by the processing circuitry with a second one of the of the plurality of selectable current sense resistors selected differs from the first estimate of the impedance of the load.
20. An integrated circuit comprising circuitry according to any of the preceding claims.
21. A host device comprising circuitry according to any of claims 1 - 19 , wherein the host device comprises a laptop, notebook, netbook or tablet computer, a gaming device, a games console, a controller for a games console, a virtual reality (VR) or augmented 28 reality (AR) device, a mobile telephone, a portable audio player, a portable device, an accessory device for use with a laptop, notebook, netbook or tablet computer, a gaming device, a games console a VR or AR device, a mobile telephone, a portable audio player or other portable device. 29
GB2402495.2A 2021-11-09 2022-09-22 Circuitry for compensating for gain and/or phase mismatch between voltage and current monitoring paths Pending GB2626678A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US202163277339P 2021-11-09 2021-11-09
US17/690,327 US11644521B1 (en) 2021-11-09 2022-03-09 Circuitry for compensating for gain and/or phase mismatch between voltage and current monitoring paths
PCT/GB2022/052395 WO2023084180A1 (en) 2021-11-09 2022-09-22 Circuitry for compensating for gain and/or phase mismatch between voltage and current monitoring paths

Publications (2)

Publication Number Publication Date
GB202402495D0 GB202402495D0 (en) 2024-04-10
GB2626678A true GB2626678A (en) 2024-07-31

Family

ID=83594155

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2402495.2A Pending GB2626678A (en) 2021-11-09 2022-09-22 Circuitry for compensating for gain and/or phase mismatch between voltage and current monitoring paths

Country Status (2)

Country Link
GB (1) GB2626678A (en)
WO (1) WO2023084180A1 (en)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2246639A (en) * 1990-08-02 1992-02-05 Farnell Instr Testing and calibrating LCR meters
US5886529A (en) * 1996-04-18 1999-03-23 Hewlett-Packard Company Impedance measuring device
US20020149424A1 (en) * 2001-03-21 2002-10-17 Jun Honda Power amplifying device
EP2270521A1 (en) * 2004-02-27 2011-01-05 Ultra Electronics Limited Signal measurement and processing method and apparatus
US20150168529A1 (en) * 2013-12-13 2015-06-18 National Instruments Corporation Self-Calibration of Source-Measure Unit via Capacitor
US20170254871A1 (en) * 2016-03-01 2017-09-07 Texas Instruments Incorporated Calibration of Inverting Amplifier Based Impedance Analyzers
US20170350923A1 (en) * 2016-06-02 2017-12-07 Nxp B.V. Load detector
US20180252748A1 (en) * 2011-09-12 2018-09-06 Analog Devices Global Current measurement
US20210083637A1 (en) * 2019-08-28 2021-03-18 Stmicroelectronics S.R.L. Method of monitoring electrical loads, corresponding circuit, amplifier and audio system
US20210344310A1 (en) * 2020-05-01 2021-11-04 Cirrus Logic International Semiconductor Ltd. Common-mode insensitive current-sensing topology in full-bridge driver

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2246639A (en) * 1990-08-02 1992-02-05 Farnell Instr Testing and calibrating LCR meters
US5886529A (en) * 1996-04-18 1999-03-23 Hewlett-Packard Company Impedance measuring device
US20020149424A1 (en) * 2001-03-21 2002-10-17 Jun Honda Power amplifying device
EP2270521A1 (en) * 2004-02-27 2011-01-05 Ultra Electronics Limited Signal measurement and processing method and apparatus
US20180252748A1 (en) * 2011-09-12 2018-09-06 Analog Devices Global Current measurement
US20150168529A1 (en) * 2013-12-13 2015-06-18 National Instruments Corporation Self-Calibration of Source-Measure Unit via Capacitor
US20170254871A1 (en) * 2016-03-01 2017-09-07 Texas Instruments Incorporated Calibration of Inverting Amplifier Based Impedance Analyzers
US20170350923A1 (en) * 2016-06-02 2017-12-07 Nxp B.V. Load detector
US20210083637A1 (en) * 2019-08-28 2021-03-18 Stmicroelectronics S.R.L. Method of monitoring electrical loads, corresponding circuit, amplifier and audio system
US20210344310A1 (en) * 2020-05-01 2021-11-04 Cirrus Logic International Semiconductor Ltd. Common-mode insensitive current-sensing topology in full-bridge driver

Also Published As

Publication number Publication date
WO2023084180A1 (en) 2023-05-19
GB202402495D0 (en) 2024-04-10

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