GB2618079A - System and apparatus suitable for Utilization of neural network based approach in association with integer programming,and a processing method in association - Google Patents

System and apparatus suitable for Utilization of neural network based approach in association with integer programming,and a processing method in association Download PDF

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GB2618079A
GB2618079A GB2205976.0A GB202205976A GB2618079A GB 2618079 A GB2618079 A GB 2618079A GB 202205976 A GB202205976 A GB 202205976A GB 2618079 A GB2618079 A GB 2618079A
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Colin Hoy Michael
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Continental Automotive Technologies GmbH
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Abstract

There is provided an apparatus (102) suitable for use with a neural network (NN) in association with large scale 0-1 integer programming related problems. The apparatus (102) can include a first module (202) and a second module (204). The first module (202) can be configured to receive at least one input signal and/or at least one modified input signal. The second module (204) can be configured to process the received input signal(s) to generate at least one output signal by manner of linear programming (LP) and/or process the received modified input signal(s) to generate at least one iterated output signal. The second module (204) can be further configured to generate at least one convexity violation loss (CVL) parameter by manner of analysis-based processing in association with the iterated output signal(s). The output signal(s) can be communicated to the NN for processing to derive the at least one modified input signal.

Description

SYSTEM AND APPARATUS SUITABLE FOR UTILIZATION OF NEURAL NETWORK BASED APPROACH IN ASSOCIATION WITH INTEGER PROGRAMMING, AND A PROCESSING METHOD IN ASSOCIATION THERETO
Field Of Invention
The present disclosure generally relates to one or both of a system and at least one apparatus suitable for utilizing one or more neural network-based approaches in association with, for example, integer programming. More specifically, the present disclosure relates to a system and/or at least one apparatus in association with, for example, solving large scale 0-1 integer programming problem(s) using neural-based approach(es). The present disclosure further relates a processing method which can be associated with the system and/or the apparatus(es).
Background
Conventional techniques that apply learning to the integer programming problem would be generally oriented around solutions associated with branching method(s) and improved heuristics.
Moreover, conventional techniques would generally focus on using learning-based 20 approaches to obtain near-optimal solutions for medium scale problems. However, a certain amount of computational overhead would then be required The present disclosure contemplates that conventional techniques do not address the integer programming problem in an efficient and/or an optimal manner, and there is a need to address (or at least mitigate) such an issue/ such issues.
Summary of the Invention
In accordance with an aspect of the disclosure, there is provided an apparatus which can be coupled to at least one device (i.e., referable to as "neural network"), in 30 accordance with an embodiment of the disclosure.
Specifically, in one embodiment, the present disclosure contemplates an apparatus which can be suitable for use with, for example a neural network (NN). In one example application, the apparatus can be suitable for use with a NN in association with large scale 0-1 integer programming related problems, in accordance with an embodiment of the disclosure.
The apparatus can, for example, include a first module and a second module, in accordance with an embodiment of the disclosure The second module can be coupled to the first module.
The first module can, for example, be configured to receive one or both of at least one input signal and at least one modified input signal (i.e., at least one of one or more input signals and one or more modified input signals), in accordance with an embodiment of the disclosure.
The second module can, for example, be configured to one or both of process the received input signal(s) to generate at least one output signal by manner of linear programming (LP) and process (e.g., by manner of LP) the received modified input signal(s) to generate at least one iterated output signal (i.e., at least one of process the received input signal(s) to generate at least one output signal and process the received modified input signal(s) to generate at least one iterated output signal), in accordance with an embodiment of the disclosure. The second module can, for example be further configured to generate at least one convexity violation loss (CVL) parameter by manner of analysis-based processing in association with the iterated output signal(s), in accordance with an embodiment of the disclosure.
The output signal(s) can, for example, be communicated to the NN for processing to derive the at least one modified input signal, in accordance with an embodiment of the disclosure.
For example, the input signal(s) can include at least one cost vector and the NN can be configured to process the output signal(s) to generate at least one weighting vector. Moreover, the NN can be configured to further process the weighting vector(s) by manner of addition-based processing in a manner so as to add the weighting vector(s) to the cost vector(s) so as to derive the modified input signal(s).
In one embodiment, the NN can be configured to perform at least one learning-based processing task in a manner so as to learn at least one weighting associated with an overall loss function associated with the NN. The overall loss function can, for example, include at least one objective loss component and at least one CVL component. The objective loss component(s) can, for example, be based on any one of the input signal(s), the modified input signal(s), the output signal(s) and the iterated output signal(s), or any combination thereof (i.e., at least one of the input signal(s), the modified input signal(s), the output signal(s) and the iterated output signal(s)). The CVL component can, for example, be based on the CVL parameter(s).
Moreover, in one embodiment, losses derived based on the objective loss component and the CVL component can be capable of being backpropagated to train the NN.
Appreciably, the present disclosure generally contemplates learning to apply learnt "reweighting(s)" to the LP relaxation approach, which can possibly nudge the LP solver towards one or more solutions satisfying the 0-1 integer constraint, while not requiring (or at least reducing reliance on) explicit branching or other systematic search techniques. In this manner, computation can possibly be facilitated in a more efficient manner and/or faster manner (e.g., computational overhead(s) can possibly be reduced), in accordance with an embodiment of the disclosure.
Moreover, as mentioned earlier, the need to manually engineer heuristics to solve integer constraints may possibly be avoided or at least mitigated, in accordance with an embodiment of the disclosure. Appreciably, in this manner, any heuristics outside standard ones used in LP solvers may possibly not be required, in accordance with an embodiment of the disclosure.
Furthermore, it is appreciable that solving of, for example, very large-scale problem(s) can possibly be facilitated, in accordance with an embodiment of the disclosure.
The above-described advantageous aspect(s) of the apparatus of the present disclosure can also apply analogously (all) the aspect(s) of a below described processing method of the present disclosure. Likewise, all below described advantageous aspect(s) of the processing method of the disclosure can also apply analogously (all) the aspect(s) of above described apparatus of the disclosure.
In accordance with an aspect of the disclosure, there is provided a processing method which can be suitable for use in association with a neural network (NN). In one example application, the processing method can be suitable for use in association with a NN in connection with large scale 0-1 integer programming related problems, in accordance with an embodiment of the disclosure.
The processing method can, for example, include a programming step and an analysis step, in accordance with an embodiment of the disclosure.
With regard to the programming step, linear programming (LP) can be performed based on one or both of at least one input signal and at least one modified input signal (i.e., at least one of one or more input signals and one or more modified input signals) in a manner so as to generate, respectively, one or both of at least one output signal and at least one iterated output signal (i.e., at least one of one or more output signals and one or more iterated output signals). For example, the input signal(s) can be processed by manner of LP to generate the output signal(s) and the modified input signal(s) can be processed by manner of LP to generate the iterated output signal(s).
With regard to the analysis step, at least one processing task associated with analysis-based processing in association with the iterated output signal(s) can be performed in a manner so as to derive at least one convexity violation loss (CVL) parameter.
Moreover, the output signal(s) can be communicated to the NN for processing to derive the at least one modified input signal.
S
In one embodiment, the processing method can further include an initial step wherein at least one processing task can be performed on the input signal(s) in a manner so as to generate the output signal(s).
In one embodiment, the processing method can further include an iteration step wherein at least one processing iteration can be performed to generate a plurality of iterated output signals based on a plurality of modified input signals.
In one embodiment, the processing method can further include a learning step 10 wherein at least one learning-based processing task can be performed so as to learn at least one weighting associated with an overall loss function associated with the NN.
Appreciably, the present disclosure generally contemplates learning to apply learnt "reweighting(s)" to the LP relaxation approach, which can possibly nudge the LP solver towards one or more solutions satisfying the 0-1 integer constraint, while not requiring (or at least reducing reliance on) explicit branching or other systematic search techniques. In this manner, computation can possibly be facilitated in a more efficient manner and/or faster manner (e.g., computational overhead(s) can possibly be reduced), in accordance with an embodiment of the disclosure.
Moreover, as mentioned earlier, the need to manually engineer heuristics to solve integer constraints may possibly be avoided or at least mitigated, in accordance with an embodiment of the disclosure. Appreciably, in this manner, any heuristics outside standard ones used in LP solvers may possibly not be required, in accordance with
an embodiment of the disclosure.
Furthermore, it is appreciable that solving of, for example, very large-scale problem(s) can possibly be facilitated, in accordance with an embodiment of the disclosure.
The present disclosure further contemplates a computer program which can include instructions which, when the program is executed by a computer, cause the computer to carry out any one of the programming step, the analysis step, the initial step, the iteration step and the learning step, or any combination thereof (i.e., the programming step, the analysis step, the initial step, the iteration step and/or the learning step).
The present disclosure yet further contemplates a computer readable storage medium having data stored therein representing software executable by a computer, the software including instructions, when executed by the computer, to carry out any one of the programming step, the analysis step, the initial step, the iteration step and the learning step, or any combination thereof (i.e., the programming step, the analysis step, the initial step, the iteration step and/or the learning step).
Brief Description of the Drawings
Embodiments of the disclosure are described hereinafter with reference to the following drawings, in which: Fig. la shows a system which can include at least one apparatus, according to an embodiment of the disclosure; Fig. lb to Fig. id show an example scenario in association with the system of Fig. la, 20 according to an embodiment of the disclosure; Fig, 2 shows the apparatus of Fig, la in further detail, according to an embodiment of the disclosure; and Fig. 3 shows a processing method in association with the system of Fig. la,
according to an embodiment of the disclosure.
Detailed Description
The present disclosure contemplates, generally, neural reweighting of linear programming relaxations for improved approximate solutions of large scale 0-1 integer programming problems.
The present disclosure contemplates the possibility of utilizing a lightweight neural network to improve upon a first solution based on linear programming (LP) relaxation (LP relaxation). This can be distinguished from known effort(s) to apply learning to the integer programming problem, which would be generally oriented around solutions associated with branching method(s) and improved heuristics. By utilizing a lightweight neural network to improve upon the first solution, the present disclosure contemplates the possibility of operation on extremely large solution spaces where only LP relaxations are currently feasible (for use) and the possibility of operation in one or more vehicle-based applications with hard real time constraint(s).
The present disclosure contemplates the possibility of utilizing convex optimization layer(s) to facilitate stacking of LP optimizer(s) with neural network layer(s), in accordance with an embodiment of the disclosure. It is further contemplated that PointNet can possibly facilitate structuring neural network(s) that can scale linearly based on input size, which can possibly facilitate the possibility of a neural network architecture that can scale well to large problem(s), in accordance with an embodiment of the disclosure.
It is contemplated that conventional techniques focus on using learning-based 20 approaches to obtain near-optimal solutions for medium scale problems. However, a certain amount of computational overhead would then be required. Moreover, such computational overhead may not scale to very large problem(s).
The present disclosure contemplates a system, at least one apparatus and/or a 25 processing method which can possibly avoid (or at least mitigate) such computational overhead and facilitate the possibility of scaling to (very) large problem(s), in accordance with an embodiment of the disclosure.
Generally, the contemplated system, apparatus(es) and/or processing method (any one of the system, the apparatus(es) and the processing method, or any combination thereof) can be associated with learning of the entire process end-toend, using a LP solver as a "non-neural network" component. In one embodiment, the LP solver can, for example, be the only "non-neural network" component. It is contemplated that the need to manually engineer heuristics to solve integer constraints may possibly be avoided or at least mitigated, in accordance with an embodiment of the disclosure. Appreciably, in this manner, any heuristics outside standard ones used in LP solvers may possibly not be required, in accordance with
an embodiment of the disclosure.
The contemplated system, apparatus(es) and/or processing method can, for example, be associated with a network architecture (which can, for example, include one or more neural network structures) which can possibly scale linearly in the number of variables and constraints (and thus can possibly be much more suited to solving, for example, very large-scale problem(s)), in accordance with an embodiment of the disclosure.
For example, the present disclosure contemplates, in one embodiment, one or more neural network structures for processing large vectors and sparse matrices. Such network structure(s) can utilize PointNet in a manner so as to process large sparse matrices (which can be beyond what is possible with conventional techniques such as the graph neural network approach).
zo The foregoing will be discussed in further detail with reference to Fig. 1 to Fig. 3 hereinafter.
Referring to Fig. la, a system 100 is shown, according to an embodiment of the disclosure. The system 100 can, in one example, be suitable for use in association with at least one vehicle and/or at least one vehicle related application, in accordance with an embodiment of the disclosure. The system 100 can, in another example, be suitable for use in association with an automated vehicle computer for implementing functions such as path planning and/or object tracking, in accordance with an embodiment of the disclosure. In yet another example, the system 100 can be suitable for use in association with a server for implementing functions such as mapping, task allocation, cooperative routing and/or neural network pruning, in accordance with an embodiment of the disclosure. Other examples such as supply chain optimization, production/factory optimization and/or logistics optimization can possibly be useful, in accordance with embodiment(s) of the disclosure.
As shown, the system 100 can include one or more apparatuses 102, at least one device 104 and, optionally, a communication network 106, in accordance with an
embodiment of the disclosure.
The apparatus(es) 102 can be coupled to the device(s) 104. Specifically, the apparatus(es) 102 can, for example, be coupled to the device(s) 104 via the 10 communication network 106.
In one embodiment, the apparatus(es) 102 can be coupled to the communication network 106 and the device(s) 104 can be coupled to the communication network 106. Coupling can be by manner of one or both of wired coupling and wireless coupling. The apparatus(es) 102 can, in general, be configured to communicate with the device(s) 104 via the communication network 106, according to an embodiment of the disclosure.
The system 100 can, for example, be suitable for facilitating for utilizing one or more neural network-based approaches in association with, for example, integer programming, in accordance with an embodiment of the disclosure. In a specific example, the system 100 can be suitable for/be associated with solving large scale 0-1 integer programming problem(s) using one or more neural-based approaches, in accordance with an embodiment of the disclosure.
The apparatus(es) 102 can, for example, correspond to one or more computers (e.g., laptops, desktop computers and/or electronic mobile devices having computing capabilities such as Smartphones and electronic tablets).
In general, the apparatus(es) 102 can be configured to perform one or more processing tasks which can include, for example, one or both of processing in association with linear programming and analysis-based processing, in accordance with an embodiment of the disclosure. For example, in one embodiment, the apparatus(es) 102 can be configured to perform linear programming related processing and/or perform analysis-based processing. In a more specific example, the apparatus(es) 102 can be configured to receive one or more input signals and process the input signal(s) based on linear programming related processing and/or analysis-based processing to generate one or more output signals. The output signal(s) can, for example, be communicated from the apparatus(es) 102, in accordance with an embodiment of the disclosure. The apparatus(es) 102 will be discussed in further detail with reference to Fig. 2, according to an embodiment of the disclosure.
The device(s) 104 can, for example, carry a deep learning type algorithm/network or can, for example correspond to a deep learning type algorithm/network. It is contemplated that the device(s) 104 can, for example, generally be associated with at least one Neural Network (NN), in accordance with an embodiment of the disclosure. In one example, the device(s) 104 can correspond to one or more host devices (e.g., one or more computers, or a network of computers) which carry a NN. In another example, a device 104 can correspond to a database associated with a NN (e.g., an artificial NN). In one embodiment, a device 104 can, for example, correspond to a node in a NN and a number of devices 104 (i.e., corresponding to a plurality of nodes) can be coupled (e.g., interlinked/interconnected) to form a NN. In another embodiment, a device 104 can correspond to a host device carrying a plurality of nodes forming a NN. In yet another embodiment, a device 104 can, for example, correspond to a first host device carrying at least one node (e.g., a plurality of nodes) and another device 104 can, for example, correspond to a second host device carrying another at least one node (e.g., another plurality of nodes), and the first and second host devices can be coupled.
Generally, the device(s) 104 can be configured to receive the output signal(s) from the apparatus(es) for further processing to generate one or more modified input signals. The modified input signal(s) can, for example, be communicated from the device(s) 104, in accordance with an embodiment of the disclosure. In a specific example, the modified input signal(s) can be communicated from the device(s) 104 to the apparatus(es) 102 for further processing.
The communication network 106 can, for example, correspond to an Internet communication network, in accordance with an embodiment of the disclosure. In another example, the communication network 106 can correspond to a telecommunication network. Communication (i.e., between the apparatus(es) 102 and the database(s) 104) via the communication network 106 can be by manner of one or both of wired communication and wireless communication.
The system 100 will now be discussed in further detail in accordance with an example scenario 150 with reference to Fig. lb to Fig. ld, in accordance with an
embodiment of the disclosure, hereinafter.
As shown in Fig. lb, in the example scenario 150, the system 100 can include at least one apparatus 102 coupled to at least one device 104, in accordance with an embodiment of the disclosure. Processing performed in association with the system can be based on a plurality of processing stages. For example, in the example scenario 150, the system 100 can be associated with an initial processing stage 152, a processing iteration stage 154 and an overall stage 156, in accordance with an embodiment of the disclosure. The processing iteration stage 154 can, for example, include at least one processing iteration, in accordance with an embodiment of the disclosure. In one embodiment, the processing iteration(s) can, for example, include one or both of a first processing iteration 154a and a second processing iteration 154b.
During the initial processing stage 152, an apparatus 102 can be configured to receive at least one input signal for processing to, for example, generate/derive at least one output signal. The input signal(s) can include one or more parameters. The parameter(s) can include any one of at least one cost vector, at least one constraint matrix and at least one constraint vector, or any combination thereof. In one embodiment, the parameter(s) can include the cost vector(s), the constraint matrix(es) and the constraint vector(s). The parameter(s) can be processed to generate/derive an optimized solution to a linear programming problem. In this regard, the output signal(s) generated by the apparatus 102 can correspond to/be associated with/include an optimized solution to a linear programming problem. The output signal(s) generated/derived in association with the initial processing stage 152 can be referred to as "initial output signal(s)".
The initial output signal(s) can be communicated for further processing via at least one processing iteration during the processing iteration stage 154. In one example, the processing iteration(s) can include a first processing iteration 154a and a second processing iteration 154b, in accordance with an embodiment of the disclosure.
During the first processing iteration 154a, the initial output signal(s) can be communicated to the device(s) 104 for processing to generate, for example, at least one weighting vector which can, for example, be added to the cost vector(s) to, in turn, generate/derive at least one modified input signal (e.g., at least the cost vector(s) can be modified based on the weighting vector(s)). The modified input signal(s) can be communicated to an apparatus 102 for further processing. The modified input signal(s) generated/derived in association with the first processing iteration 154a can be referred to as "first modified input signal(s)". In connection with the first processing iteration 154a, an apparatus 102 can be configured to receive the first modified input signal(s) (which can include, for example, modified cost vector(s) and one or both of the constraint matrix(es) and the constraint vector(s), in accordance with an embodiment of the disclosure) and process the first modified input signal(s) to generate/derive at least one iterated output signal. In one example, an apparatus 102 can be configured to process the first modified input signal(s) by manner of linear programming (LP) 102a to generate/derive the iterated output signal(s), in accordance with an embodiment of the disclosure. The iterated output signal(s) can correspond to/be associated with/include a current optimized solution (i.e., "current" with respect/reference to the first processing iteration 154a). The iterated output signal(s) generated/derived in association with the first processing iteration 154a can be referred to as "first iterated output signal(s)". Moreover, in connection with the first processing iteration 154a, a processing task of deriving/computing convexity violation loss (CVL) can be performed by, for example, an apparatus 102 to analyze whether the current optimized solution to a "perturbed linear program" can be considered to resemble a solution to an exact solution of the original integer programming problem. For example, the Shannon information entropy of each element of the solution vector can be analyzed/computed, and low Shannon entropy can, for example, be considered to correspond to a lower slackness being introduced by the relaxation, in accordance with an embodiment of the disclosure. CVL computed/derived can be referable to as a CVL parameter. Moreover, a CVL parameter computed/derived during the first processing iteration 154a can be referred to as a "first CVL parameter". It is contemplated that apparatus 102 can be configured to derive/compute CVL by manner of, for example, analysis-based processing 102b, in accordance with an embodiment of the disclosure. CVL can, for example, relate to entropy-based loss/entropic loss.
During the second processing iteration 154b, the iterated output signal(s) (e.g., the first iterated output signal(s)) from the preceding/previous processing iteration(s) (e.g., the first processing iteration 154b) can be processed to generate at least one modified input signal. The modified input signal(s) generated/derived in association with the second processing iteration 154b can be referred to as "second modified input signal(s)". In connection with the second processing iteration 154b, an apparatus 102 can be configured to receive the second modified input signal(s) and process the second modified input signal(s) to generate/derive at least one iterated output signal. The iterated output signal(s) can correspond to/be associated with/include a current optimized solution (i.e., "current" with respect/reference to the second processing iteration 154b). The iterated output signal(s) generated/derived in association with the second processing iteration 154b can be referred to as "second iterated output signal(s)". The second modified input signal(s) and the second iterated output signal(s) can, for example, be generated/derived in a manner analogous to, respectively, the first modified input signal(s) and the first iterated output signal(s), in accordance with an embodiment of the disclosure. In this regard, the earlier discussion in association with the first processing iteration 154a can analogously apply to the second processing iteration 154b, in accordance with an embodiment of the disclosure. Similarly, as with the first processing iteration 154a, in connection with the second processing iteration 154b, a processing task of deriving/computing convexity violation loss (CVL) can be performed by, for example, an apparatus 102 to analyze whether the current optimized solution to a "perturbed linear program" can be considered to resemble a solution to an exact solution of the original integer programming problem. For example, the Shannon information entropy of each element of the solution vector can be analyzed/computed, and low Shannon entropy can, for example, be considered to correspond to a lower slackness being introduced by the relaxation, in accordance with an embodiment of the disclosure. CVL computed/derived can be referable to as a CVL parameter. Moreover, a CVL parameter computed/derived during the second processing iteration 154b can be referred to as a "second CVL parameter".
It is appreciable that during the processing iteration stage 154, one or more CVL parameters (e.g., a first CVL parameter and/or a second CVL parameter) can be computed/derived (e.g., by an apparatus 102). Generally, the CVL parameter(s) can, for example, be indicative of a measure of uncertainty, in accordance with an embodiment of the disclosure. Where the CVL parameter(s) can be indicative of an acceptable level/measure of certainty, CVL criteria can be considered to have been achieved. With CVL criteria being determined to have been achieved, the processing iteration stage 154 can be concluded, in accordance with an embodiment of the disclosure. Otherwise, one or more further processing iterations (analogous to the first processing iteration 154a and/or the second processing iteration 154b) can be performed (e.g., a third processing iteration), in accordance with an embodiment of the disclosure. It is contemplated that at least one CVL signal which can, for example, include/correspond to/be associated with the CVL parameter(s) can be communicated, in accordance with an embodiment of the disclosure.
During the overall stage 156, one or more learning-based processing tasks can be performed to learn at least one optimal parameter that can possibly lead to one or more solutions which can be considered to be more optimal solution(s). In this regard, learning signals can be communicated for further processing by manner of learning-based processing to generate/derive at least one derivation signal which can correspond to/be indicative of/be associated with the aforementioned more optional solution(s), in accordance with an embodiment of the disclosure. For example, the device(s) 104 can be configured to perform the learning-based processing task(s), in accordance with an embodiment of the disclosure. It is contemplated that, in one embodiment, the overall stage 156 can generally be considered to correspond to/include, for example, a training phase during which, for example, the device(s) 104 can learn (e.g., by manner of learning-based processing) one or more weightings that can, for example, lead to more optimal solution(s), given that the CVL criteria is achieved.
As mentioned earlier, one or more learning signals can be communicated for further processing by learning based processing to derive/generate the derivation signal(s). The learning signal(s) can, for example, be communicated by one or both of at least one apparatus 102 and at least one device 104, in accordance with an embodiment of the disclosure. The learning signal(s) can, for example, include any one of the input signal(s), the modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)), the output signal(s), the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)) and the CVL parameter(s) (e.g., the first CVL parameter and/or the second CVL parameter), or any combination thereof. The derivation signal(s) can, for example, be indicative of/correspond to/include the aforementioned weighting(s).
The weighting(s) can, for example, lead to more optimal solution(s). It is contemplated that the weighting(s) can be associated with an overall loss function associated with the NN, in accordance with an embodiment of the disclosure. The overall loss function can include one or both an "objective loss" component and a CVL component, in accordance with an embodiment of the disclosure. In one embodiment, the overall loss function can include the "objective loss" component and the CVL component (e.g., a combination of the "objective loss" component and the CVL component). The "objective loss" component can, for example, be based on any one of the input signal(s), the modified input signal(s), the output signal(s) and the iterated output signal(s), or any combination thereof. The CVL component can, for example, be based on the CVL parameter(s), in accordance with an embodiment of the disclosure. It is contemplated that, in one embodiment, the relative weighting associated with the loss functions (i.e., the "objective loss" component and the CVL component) can possibly be tuned appropriately to optimize the learning-based processing (e.g., for the NN to learn based on an intended manner). In this manner, the present disclosure contemplates the possibility that losses can be considered to be backpropagated 158 to, for example, train the NN, in accordance with an embodiment of the disclosure.
Earlier mentioned, the device(s) 104 can, for example, generally be associated with 5 at least one Neural Network (NN), in accordance with an embodiment of the disclosure. For example, a device 104 can correspond to an NN, in accordance with an embodiment of the disclosure.
In the example scenario 150, the NN can, for example, correspond to/include a neural "hypernetwork" where one or more parameters of a main NN can be calculated dynamically using an auxiliary NN. In one embodiment, the main NN can correspond to/be associated with a first device 104 and the auxiliary NN can correspond to/be associated with a second device 104. In another embodiment, one portion of a device 104 (e.g., a first device) can correspond to/be associated with the main NN and another potion of the (same) device 104 (e.g., the first device) can correspond to/be associated with the auxiliary NN.
One or more input parameters such as the original "0-1 integer programming" problem specification (i.e., the cost vector, constraint matrix and constraint vector) can be input to the auxiliary NN for processing to generate/derive one or more output parameters. The output parameter(s) can, for example, be associated with the parameter(s) of the main NN. The present disclosure contemplates that one or more other architecture associated with the NN(s) (i.e., neural architecture) can possibly be utilized. Examples of such neural architecture can include convolutional NN (CNN), Long short-term memory (LSTM) based network(s), Graph NN.
The present disclosure contemplates that the NN generally as discussed above should be capable of accepting, for example, potentially large vector(s) and/or sparse matrices etc. as input parameter(s), in accordance with an embodiment of the 30 disclosure.
Earlier discussed, it is contemplated that PointNet can possibly facilitate structuring neural network(s) that can scale linearly based on input size, which can possibly facilitate the possibility of a neural network architecture that can scale well to large problem(s), in accordance with an embodiment of the disclosure.
In the example scenario 150, a NN associated with a PointNet-based neural architecture is contemplated, in accordance with an embodiment of the disclosure.
This will be discussed in further detail with reference to Fig. lc and Fig. 1 d, in accordance with an embodiment of the disclosure, hereinafter.
Referring to Fig. lc, in accordance with an embodiment of the disclosure, in connection with vector(s) and "skinny matrices" (which can, for example, be considered as input(s) 162) a coordinate embedding can, for example, be defined in association with each row, in accordance with an embodiment of the disclosure. The (coordinate) embedding can, for example, be concatenated/combined with the (input) rows to derive/generate one or more augmented rows 164. The augmented row(s) can, for example, be further processed as an unordered set with PointNet 166 in a manner so as to generate/derive one or both of at least one vector and at least one "skinny matrix" (e.g., a vector and/or a "skinny matrix") as output(s) 168.
Referring to Fig. 1 d, in accordance with an embodiment of the disclosure, in connection with sparse matrices (which can, for example, be considered as input(s) 172), one or more coordinate embeddings can, for example, be defined for each row and each column, in accordance with an embodiment of the disclosure. Each row can, for example, be processed independently as a vector 174. A VectorNet parameter 176 (e.g., a first VectorNet parameter which can be referred to as "VectorNet A") can, for example, be applied to the vector(s) (e.g., a vector associated with each row) to obtain a "skinny matrix" 178. Moreover, the column(s) can, for example, be aggregated 180 into a single vector 182, the vector from each row can be concentrated into a "skinny matrix" 184 and a VectorNet parameter 186 (e.g., a second VectorNet parameter which can be referred to as "VectorNet B") can be applied to the "skinny matrix". A vector and/or a "skinny matrix" can be output 188 subsequently.
Moreover, based on the foregoing discussion in connection with the example scenario 150, it is appreciable that an apparatus 102 can be capable of being configured to perform one or both processing tasks in association with any one of: * receiving the input signal(s) for processing to generate the output signal(s) (e.g., initial output signal(s)), * receiving the modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)) for processing to generate the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)), and * deriving/computing CVL ((e.g., to derive/generate the first CVL parameter and/or the second CVL parameter), or any combination thereof.
Appreciably, the present disclosure generally contemplates learning to apply learnt "reweighting(s)" to the LP relaxation approach, which can possibly nudge the LP solver (e.g., associated with/correspond to at least one apparatus 102, in accordance with an embodiment of the disclosure) towards one or more solutions satisfying the 0-1 integer constraint, while not requiring (or at least reducing reliance on) explicit branching or other systematic search techniques. In this manner, computation can possibly be facilitated in a more efficient manner and/or faster manner (e.g., computational overhead(s) can possibly be reduced), in accordance with an embodiment of the disclosure.
Moreover, as mentioned earlier, the need to manually engineer heuristics to solve integer constraints may possibly be avoided or at least mitigated, in accordance with an embodiment of the disclosure. Appreciably, in this manner, any heuristics outside standard ones used in LP solvers may possibly not be required, in accordance with an embodiment of the disclosure.
Furthermore, it is appreciable that solving of, for example, very large-scale problem(s) can possibly be facilitated, in accordance with an embodiment of the disclosure.
The aforementioned apparatus(es) 102 will be discussed in further detail with reference to Fig. 2 hereinafter.
Referring to Fig. 2, an apparatus 102 is shown in further detail in the context of an example implementation 200, according to an embodiment of the disclosure.
In the example implementation 200, the apparatus 102 can correspond to an electronic module 200a which can be capable of being configured to perform any one of receiving the input signal(s) for processing to generate the output signal(s) (e.g., initial output signal(s)), receiving the modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)) for processing to generate the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)), and deriving/computing CVL ((e.g., to derive/generate the first CVL parameter and/or the second CVL parameter), or any combination thereof.
In one embodiment, the electronic module 200a can be capable of performing processing task(s) in association with receiving the input signal(s) for processing to generate the output signal(s) (e.g., initial output signal(s)). In another embodiment, the electronic module 200a can be capable of performing processing task(s) in association with receiving the modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)) for processing to generate the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)). In yet another embodiment, the electronic module 200a can be capable of performing processing task(s) in association with deriving/computing CVL ((e.g., to derive/generate the first CVL parameter and/or the second CVL parameter). In yet a further embodiment, the electronic module 200a can be capable of performing processing task(s) in association with receiving the input signal(s) for processing to generate the output signal(s) (e.g., initial output signal(s)) and receiving the modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)) for processing to generate the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)). In yet another further embodiment, the electronic module 200a can be capable of performing processing task(s) in association with receiving the input signal(s) for processing to generate the output signal(s) (e.g., initial output signal(s)), receiving the modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)) for processing to generate the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)) and deriving/computing CVL (e.g., to derive/generate the first CVL parameter and/or the second CVL parameter). In yet a further additional embodiment, the electronic module 200a can be capable of performing processing task(s) in association with at least one of receiving the input signal(s) for processing to generate the output signal(s) (e.g., initial output signal(s)), receiving the modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)) for processing to generate the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)) and deriving/computing CVL (e.g., to derive/generate the first CVL parameter and/or the second CVL parameter) (i.e., any combination of receiving the input signal(s) for processing to generate the output signal(s), receiving the modified input signal(s) for processing to generate the iterated output signal(s), and deriving/computing CVL).
The electronic module 200a can, for example, correspond to a mobile device (e.g., a 20 computing device) which can, for example, be carried by a user, in accordance with an embodiment of the disclosure.
The electronic module 200a can, for example, include a casing 200b. Moreover, the electronic module 200a can, for example, carry any one of a first module 202, a second module 204, a third module 206, or any combination thereof.
In one embodiment, the electronic module 200a can carry a first module 202, a second module 204 and/or a third module 206. In a specific example; the electronic module 200a can carry a first module 202, a second module 204 and a third module 30 206, in accordance with an embodiment of the disclosure.
In this regard, it is appreciable that, in one embodiment, the casing 200b can be shaped and dimensioned to carry any one of the first module 202, the second module 204 and the third module 206, or any combination thereof.
The first module 202 can be coupled to one or both of the second module 204 and the third module 206. The second module 204 can be coupled to one or both of the first module 202 and the third module 206. The third module 206 can be coupled to one or both of the first module 202 and the second module 204. In one example, the first module 202 can be coupled to the second module 204 and the second module 204 can be coupled to the third module 206, in accordance with an embodiment of the disclosure. Coupling between the first module 202, the second module 204 and/or the third module 206 can, for example, be by manner of one or both of wired coupling and wireless coupling.
Each of the first module 202, the second module 204 and the third module 206 can correspond to one or both of a hardware-based module and a software-based module, according to an embodiment of the disclosure.
In one example, the first module 202 can correspond to a hardware-based receiver 20 which can be configured to receive one or both of the input signal(s) and the modified input signal(s) (i.e., the input signal(s) and/or the modified input signal(s)).
The second module 204 can, for example, correspond to a hardware-based processor which can be configured to perform one or more processing tasks in association with any one of, or any combination of, the following: * processing the received input signal(s) to generate the output signal(s) (e.g., initial output signal(s)), * processing the received modified input signal(s) (e.g., the first modified input signal(s) and/or the second modified input signal(s)) to generate the iterated output signal(s) (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)), and * deriving/computing CVL ((e.g., to derive/generate the first CVL parameter and/or the second CVL parameter).
In one embodiment, the second module 204 can, for example. be configured to perform one or more processing tasks in association with linear programming (LP). For example, as discussed earlier in the context of an example scenario 150, the modified input signal(s) can be processed by manner of linear programming (LP) 102a to generate/derive the iterated output signal(s), in accordance with an embodiment of the disclosure.
In another embodiment, the second module 204 can, for example, be configured to perform one or more processing task(s) in association with analysis-based processing (e.g., in association with the aforementioned CVL). For example, as discussed earlier in the context of an example scenario 150, one or more CVL parameters can be derived/computed by manner of, for example, analysis-based processing 102b, in accordance with an embodiment of the disclosure.
In yet another embodiment, the second module 204 can, for example, be configured to perform one or more processing tasks in association with LP 102a and analysis-based processing 102b.
The third module 206 can correspond to a hardware-based transmitter which can be configured to communicate any one of the output signal(s), the iterated output signal(s) and the CVL signal(s), or any combination thereof (i.e., the output signal(s), the iterated output signal(s) and/or the CVL signal(s)), from the electronic module 200a. The output signal(s), the iterated output signal(s) and/or the CVL signal(s) can, for example, be communicated from the electronic module 200a to the device(s) 104, in accordance with an embodiment of the disclosure.
The present disclosure contemplates the possibility that the first and second modules 202/204 can be an integrated software-hardware based module (e.g., an electronic part which can carry a software program/algorithm in association with receiving and processing functions/an electronic module programmed to perform the functions of receiving and processing). The present disclosure further contemplates the possibility that the first and third modules 202/206 can be an integrated software-hardware based module (e.g., an electronic part which can carry a software program/algorithm in association with receiving and transmitting functions/an electronic module programmed to perform the functions of receiving and transmitting). The present disclosure yet further contemplates the possibility that the first and third modules 202/206 can be an integrated hardware module (e.g., a hardware-based transceiver) capable of performing the functions of receiving and transmitting.
In view of the foregoing, it is appreciable that the present disclosure generally contemplates an apparatus 102 (e.g., which can correspond to an electronic module 200a, in accordance with an embodiment of the disclosure) which can be coupled to at least one device 104 (i.e., referable to as "neural network"), in accordance with an embodiment of the disclosure.
Specifically, in one embodiment, the present disclosure contemplates an apparatus 102 which can be suitable for use with, for example a neural network (NN). In one example application, the apparatus 102 can be suitable for use with a NN in association with large scale 0-1 integer programming related problems, in accordance with an embodiment of the disclosure.
The apparatus 102 can, for example, include a first module 202 and a second module 204, in accordance with an embodiment of the disclosure The second module 204 can be coupled to the first module 202.
The first module 202 can, for example, be configured to receive one or both of at least one input signal and at least one modified input signal (i.e., at least one input signal and/or at least one modified input signal; at least one of at least one input signal and at least one modified input signal), in accordance with an embodiment of the disclosure.
The second module 204 can, for example, be configured to one or both of process the received input signal(s) to generate at least one output signal (e.g., the earlier discussed "initial output signal(s)" in accordance with an embodiment of the disclosure) by manner of linear programming (LP) and process (e.g., by manner of LP) the received modified input signal(s) (e.g., the earlier discussed "first modified input signal(s)" and/or "second modified input signal(s)" in accordance with an embodiment of the disclosure) to generate at least one iterated output signal (i.e., process the received input signal(s) to generate at least one output signal and/or process the received modified input signal(s) to generate at least one iterated output signal; at least one of process the received input signal(s) to generate at least one output signal and process the received modified input signal(s) to generate at least one iterated output signal), in accordance with an embodiment of the disclosure.
The iterated output signal(s) can, for example, refer to the earlier discussed "first iterated output signal(s)" and/or "second iterated output signal(s)" in accordance with an embodiment of the disclosure.
The second module 204 can, for example be further configured to generate at least one convexity violation loss (CVL) parameter (e.g., the earlier discussed "first CVL parameter" and/or "second CVL parameter" in accordance with an embodiment of the disclosure) by manner of analysis-based processing in association with the iterated output signal(s), in accordance with an embodiment of the disclosure.
The output signal(s) can, for example, be communicated to the NN for processing to derive the at least one modified input signal, in accordance with an embodiment of the disclosure.
For example, the input signal(s) can include at least one cost vector and the NN can be configured to process the output signal(s) to generate at least one weighting vector. Moreover, the NN can be configured to further process the weighting vector(s) by manner of addition-based processing in a manner so as to add the weighting vector(s) to the cost vector(s) so as to derive the modified input signal(s).
In one embodiment, the NN can be configured to perform at least one learning-based processing task in a manner so as to learn at least one weighting associated with an overall loss function associated with the NN. The overall loss function can, for example, include at least one objective loss component and at least one CVL component. The objective loss component(s) can, for example, be based on any one of the input signal(s), the modified input signal(s), the output signal(s) and the iterated output signal(s), or any combination thereof (i.e., the input signal(s), the modified input signal(s), the output signal(s) and/or the iterated output signal(s); at least one of the input signal(s), the modified input signal(s), the output signal(s) and the iterated output signal(s)). The CVL component can, for example, be based on the CVL parameter(s).
Moreover, in one embodiment, losses derived based on the objective loss 10 component and the CVL component can be capable of being backpropagated to train the NN.
Appreciably, the present disclosure generally contemplates learning to apply learnt "reweighting(s)" to the LP relaxation approach, which can possibly nudge the LP solver towards one or more solutions satisfying the 0-1 integer constraint, while not requiring (or at least reducing reliance on) explicit branching or other systematic search techniques. In this manner, computation can possibly be facilitated in a more efficient manner and/or faster manner (e.g., computational overhead(s) can possibly be reduced), in accordance with an embodiment of the disclosure.
Moreover, as mentioned earlier, the need to manually engineer heuristics to solve integer constraints may possibly be avoided or at least mitigated, in accordance with an embodiment of the disclosure. Appreciably, in this manner, any heuristics outside standard ones used in LP solvers may possibly not be required, in accordance with
an embodiment of the disclosure.
Furthermore, it is appreciable that solving of, for example, very large-scale problem(s) can possibly be facilitated, in accordance with an embodiment of the disclosure.
The above-described advantageous aspect(s) of the apparatus(es) 102 of the present disclosure can also apply analogously (all) the aspect(s) of a below described processing method of the present disclosure. Likewise, all below described advantageous aspect(s) of the processing method of the disclosure can also apply analogously (all) the aspect(s) of above described apparatus(es) 102 of the disclosure. It is to be appreciated that these remarks apply analogously to the earlier discussed system 100 of the present disclosure.
Referring to Fig. 3, a processing method in association with the system 100 is shown, according to an embodiment of the disclosure. The processing method 300 can, for example, be suitable for use in association with a neural network (NN) (e.g., a device 104 as discussed earlier with reference to Fig. 1). In one example application, the processing method 300 can be suitable for use in association with a NN in connection with large scale 0-1 integer programming related problems, in accordance with an embodiment of the disclosure.
The processing method 300 can, for example, include any one of a programming step 300a, an analysis step 300b, an initial step 302, an iteration step 304 and a learning step 306, or any combination thereof, in accordance with an embodiment of
the disclosure.
In one embodiment, the processing method 300 can, for example, include one or both of the programming step 300a and the analysis step 300b. For example, the 20 processing method 300 can include the programming step 300a and the analysis step 300b.
In another embodiment, the processing method 300 can, for example, include any one of an initial step 302, an iteration step 304 and a learning step 306, or any combination thereof. For example, the processing method 300 can include the initial step 302, the iteration step 304 and the learning step 306.
In yet another embodiment, the processing method 300 can, for example, include the programming step 300a, the analysis step 300b and any one of, or any combination of, the initial step 302, the iteration step 304 and the learning step 306. For example, the processing method 300 can include the programming step 300a and the analysis step 300b, and the iteration step 304 and/or the learning step 306.
In yet a further embodiment, the processing method 300 can, for example, include the programming step 300a, the analysis step 300b, the initial step 302, the iteration step 304 and the learning step 306.
With regard to the programming step 300a, one or more processing tasks in association with, for example, linear programming (LP) can be performed, in accordance with an embodiment of the disclosure. In one embodiment, the processing task(s) associated with LP can, for example, be performed by one or more apparatus(es) 102. For example, the apparatus(es) 102 can be configured to perform the processing task(s) in association with LP 102a as discussed earlier in the context of the example scenario 150, in accordance with an embodiment of the disclosure.
With regard to the analysis step 300b, one or more processing tasks in association with, for example, analysis-based processing can be performed, in accordance with an embodiment of the disclosure. In one embodiment, the processing task(s) associated with analysis-based processing can, for example, be performed by one or more apparatus(es) 102. For example, the apparatus(es) 102 can be configured to perform the processing task(s) in association with analysis-based processing 102b in a manner so as to derive/compute convexity violation loss (CVL), as discussed earlier in the context of the example scenario 150, in accordance with an embodiment of the disclosure.
With regard to the initial step 302, one or more processing tasks can be performed in connection with the input signal(s) (e.g., by an apparatus 102), in accordance with an embodiment of the disclosure. For example, as discussed in the context of the example scenario 150, during the initial processing stage 152, an apparatus 102 can be configured to receive at least one input signal for processing to generate/derive the output signal(s) (e.g., "initial output signal(s)"). The initial output signal(s) can, for example, be communicated for further processing via at least one processing iteration during the processing iteration stage 154, in accordance with an embodiment of the disclosure.
With regard to the iteration step 304, one or more processing tasks in association with at least one processing iteration (e.g., by one or both of at least one apparatus 102 and at least one device 104). For example, as discussed in the context of the example scenario 150, during the processing iteration stage 154, at least one device 104 can be configured to receive the output signal(s) (e.g., "initial output signal(s)") for processing to generate/derive one or more modified input signals (e.g., the first modified input signal(s) and/or the second modified input signal(s)), and at least one apparatus 102 can be configured to receive the modified input signal(s) (which can include, for example, modified cost vector(s) and one or both of the constraint matrix(es) and the constraint vector(s), in accordance with an embodiment of the disclosure) and process the modified input signal(s) to generate/derive at least one iterated output signal (e.g., the first iterated output signal(s) and/or the second iterated output signal(s)), in accordance with an embodiment of the disclosure.
With regard to the learning step 306, one or more learning-based processing tasks can be performed (e.g., by the device(s) 104), in accordance with an embodiment of the disclosure. For example, as discussed in the context of the example scenario 150, during the overall stage 156, one or more learning-based processing tasks can be performed to learn at least one optimal parameter that can possibly lead to one or more solutions which can be considered to be more optimal solution(s).
The present disclosure further contemplates a computer program (not shown) which can include instructions which, when the program is executed by a computer (not shown), cause the computer to carry out any one of the programming step 300a, the analysis step 300b, the initial step 302, the iteration step 304 and the learning step 306, or any combination thereof (i.e., the programming step 300a, the analysis step 300b, the initial step 302, the iteration step 304 and/or the learning step 306) as discussed with reference to the processing method 300.
The present disclosure yet further contemplates a computer readable storage medium (not shown) having data stored therein representing software executable by a computer (not shown), the software including instructions, when executed by the computer, to carry out any one of the programming step 300a, the analysis step 300b, the initial step 302, the iteration step 304 and the learning step 306, or any combination thereof (i.e., the programming step 300a, the analysis step 300b, the initial step 302, the iteration step 304 and/or the learning step 306) as discussed with reference to the processing method 300.
In view of the foregoing, it is appreciable that the present disclosure generally contemplates a processing method 300 which can be suitable for use in association with a neural network (NN) (e.g., a device 104 as discussed earlier with reference to Fig. 1). In one example application, the processing method 300 can be suitable for use in association with a NN in connection with large scale 0-1 integer programming related problems, in accordance with an embodiment of the disclosure.
The processing method 300 can, for example, include a programming step 300a and an analysis step 300b, in accordance with an embodiment of the disclosure.
With regard to the programming step 300a, linear programming (LP) can be performed (e.g., by an apparatus 102) based on one or both of at least one input signal and at least one modified input signal (i.e., at least one input signal and/or at least one modified input signal; at least one of at least one input signal and at least one modified input signal) in a manner so as to generate, respectively, one or both of at least one output signal and at least one iterated output signal (i.e., at least one output signal and/or at least one iterated output signal; at least one of at least one output signal and at least one iterated output signal). For example, the input signal(s) can be processed by manner of LP to generate the output signal(s) (e.g., the "initial output signal(s)" as discussed earlier, in accordance with an embodiment of the disclosure) and the modified input signal(s) (e.g., the "first modified input signal(s)" and/or the "second modified input signal(s)" as discussed earlier, in accordance with an embodiment of the disclosure) can be processed by manner of LP to generate the iterated output signal(s) (e.g., the "first iterated output signal(s)" and/or the "second iterated output signal(s)" as discussed, in accordance with an embodiment of the
disclosure).
With regard to the analysis step 300b, at least one processing task associated with analysis-based processing in association with the iterated output signal(s) can be performed (e.g., by an apparatus 102) in a manner so as to derive at least one convexity violation loss (CVL) parameter (e.g., the "first CVL parameter" and/or the "second CVL parameter" as discussed earlier in accordance with an embodiment of the disclosure).
Moreover, the output signal(s) can be communicated to the NN for processing to derive the at least one modified input signal.
In one embodiment, the processing method 300 can further include an initial step 302 wherein at least one processing task can be performed on the input signal(s) in a manner so as to generate the output signal(s).
In one embodiment, the processing method 300 can further include an iteration step 304 wherein at least one processing iteration can be performed to generate a plurality of iterated output signals based on a plurality of modified input signals.
In one embodiment, the processing method 300 can further include a learning step 20 306 wherein at least one learning-based processing task can be performed so as to learn at least one weighting associated with an overall loss function associated with the NN.
Appreciably, the present disclosure generally contemplates learning to apply learnt "reweighting(s)" to the LP relaxation approach, which can possibly nudge the LP solver towards one or more solutions satisfying the 0-1 integer constraint, while not requiring (or at least reducing reliance on) explicit branching or other systematic search techniques. In this manner, computation can possibly be facilitated in a more efficient manner and/or faster manner (e.g., computational overhead(s) can possibly be reduced), in accordance with an embodiment of the disclosure.
Moreover, as mentioned earlier, the need to manually engineer heuristics to solve integer constraints may possibly be avoided or at least mitigated, in accordance with an embodiment of the disclosure. Appreciably, in this manner, any heuristics outside standard ones used in LP solvers may possibly not be required, in accordance with an embodiment of the disclosure.
Furthermore, it is appreciable that solving of, for example, very large-scale problem(s) can possibly be facilitated, in accordance with an embodiment of the disclosure.
It should be appreciated that the embodiments described above can be combined in any manner as appropriate (e.g., one or more embodiments as discussed in the 10 "Detailed Description" section can be combined with one or more embodiments as described in the "Summary of the Invention" section).
It should be further appreciated by the person skilled in the art that variations and combinations of embodiments described above, not being alternatives or substitutes, 15 may be combined to form yet further embodiments.
In one example, the communication network 106 can be omitted. Communication (i.e., between the apparatus(es) 102 and the device(s) 104) can be by manner of direct coupling. Such direct coupling can be by manner of one or both of wired coupling and wireless coupling.
In another example, one apparatus 102 (e.g., a first apparatus) can be configured to perform a portion of the processing task(s) associated with receiving the input signal(s) for processing to generate the output signal(s), receiving the modified input signal(s) for processing to generate the iterated output signal(s), and deriving/computing CVL. Another apparatus 102 (e.g., a second apparatus) can be configured to perform another portion of the processing task(s) associated with receiving the input signal(s) for processing to generate the output signal(s), receiving the modified input signal(s) for processing to generate the iterated output signal(s), and deriving/computing CVL. For example, a first apparatus can be configured to perform the task(s) of processing the input signal(s) to generate the output signal(s) and a second apparatus can be configured to perform the processing task(s) of receiving the modified input signal(s) for processing to generate the iterated output signal(s) and deriving/computing CVL. For example, a first apparatus can be configured to perform the task(s) of processing the input signal(s) to generate the output signal(s), a second apparatus can be configured to perform the task(s) of receiving the modified input signal(s) for processing to generate the iterated output signal(s) and a third apparatus can be configured to perform the processing task(s) of deriving/computing CVL.
In yet another example, only one apparatus 102 can be configured to perform the processing task(s) associated with receiving the input signal(s) for processing to generate the output signal(s), receiving the modified input signal(s) for processing to generate the iterated output signal(s), and deriving/computing CVL.
In yet another further example, the present disclosure contemplates the possibility that the aforementioned input signal(s) can, for example, be communicated from/generated by any one of at least one apparatus 102, at least one device 104 and at least one user (e.g., using an apparatus 102), or any combination thereof, in accordance with an embodiment of the disclosure.
In yet another further additional example, the present disclosure contemplates the possibility that introduction of noise (e.g., additive Gaussian noise) to the system 100 may be helpful in facilitating improvement in, for example, processing. For example, noise can possibly be introduced in association with any one of the initial processing stage 152, the processing iteration stage 154 and the overall stage 156, or any combination thereof, in accordance with an embodiment of the disclosure.
In the foregoing manner, various embodiments of the disclosure are described for addressing at least one of the foregoing disadvantages. Such embodiments are intended to be encompassed by the following claims, and are not to be limited to specific forms or arrangements of parts so described and it will be apparent to one skilled in the art in view of this disclosure that numerous changes and/or modification can be made, which are also intended to be encompassed by the following claims.

Claims (14)

  1. Claim(s) 1. An apparatus (102) suitable for use with a neural network (NN) in association with large scale 0-1 integer programming related problems, the apparatus (102) comprising: a first module (202) configurable to receive at least one of: at least one input signal, and at least one modified input signal, a second module (204) coupled to the first module (202), wherein the second module (204) configurable to at least one of: process the received at least one input signal to generate at least one output signal by manner of linear programming (LP), and process the received at least one modified input signal to generate at least one iterated output signal by manner of LP, wherein the second module (204) is further configurable to generate at least one convexity violation loss (CVL) parameter by manner of analysis-based processing in association with the at least one iterated output signal, and wherein the at least one output signal is communicable to the NN for processing to derive the at least one modified input signal.
  2. 2. The apparatus (102) according to claim 1, wherein the NN is configurable to process the at least one output signal to generate at least one weighting vector.
  3. 3. The apparatus (102) according to any of the preceding claims, wherein the at least one input signal includes at least one cost vector, and wherein the NN is configurable to add the at least one weighting vector to the cost vector(s) in a manner so as to derive the at least one modified input signal.
  4. 4. The apparatus (102) according to any of the preceding claims, wherein the NN is configurable to perform at least one learning-based processing task in a manner so as to learn at least one weighting associated with an overall loss function associated with the NN.
  5. 5. The apparatus (102) according to any of the preceding claims, wherein the overall loss function includes an objective loss component and a CVL component.
  6. 6. The apparatus (102) according to any of the preceding claims, wherein the objective loss component is based on at least one of the at least one input signal, the at least one modified input signal, the at least one output signal and the at least one iterated output signal.
  7. 7. The apparatus (102) according to any of the preceding claims, wherein the CVL component is based on the at least one CVL parameter.
  8. 8. The apparatus (102) according to any of the preceding claims, wherein losses derived based on the objective loss component and the CVL component are capable of being backpropagated to train the NN.
  9. 9. A processing method (300) suitable for use in association with a neural network (NN) in connection with large scale 0-1 integer programming related problems, the processing method (300) comprising: a programming step (300a) wherein linear programming (LP) is performed by an apparatus (102) of any of the preceding claims based on at least one of at least one input signal and at least one modified input signal in a manner so as to generate at least one output signal and at least one iterated output signal respectively; an analysis step (300b) wherein at least one processing task associated with analysis-based processing in association with the at least one iterated output signal is performed by an apparatus (102) of any of the preceding claims in a manner so as to derive at least one convexity violation loss (CVL) parameter, wherein the at least one output signal is communicable to the NN for processing to derive the at least one modified input signal.
  10. 10. The processing method (300) of claim 9, further comprising an initial step (302) wherein at least one processing task is performed on the at least one input signal in a manner so as to generate the at least one output signal.
  11. 11. The processing method (300) of claim 9 or claim 10, further comprising an iteration step (304) wherein at least one processing iteration is performed to generate a plurality of iterated output signals based on a plurality of modified input signals.
  12. 12. The processing method (300) of any of claim 9 to claim 11, further comprising a learning step (306) wherein at least one learning-based processing task is performed so as to learn at least one weighting associated with an overall loss function associated with the NN.
  13. 13 A computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out at least one of the programming step (300a), the analysis step (300b), the initial step (302), the iteration step (304) and the learning step (306) according to the processing method (300) of any of claims 9 to 12.
  14. 14. A computer readable storage medium having data stored therein representing software executable by a computer, the software including instructions, when executed by the computer, to carry out at least one of the programming step (300a), the analysis step (300b), the initial step (302), the iteration step (304) and the learning step (306) according to the processing method (300) of any of claims 9 to 12.
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