GB2607684A

GB2607684A - Method for generating fluxgate excitation signal and fluxgate excitation circuit based on single chip microcomputer

Info

Publication number: GB2607684A
Application number: GB2204780.7A
Authority: GB
Inventors: Hu Xingxing; Teng Yuntian; Li Caihua; Tang Yixiang; Fan Xiaoyong; Hu Gang; He Zhaobo; Shen Xiaoyu
Original assignee: Inst Geophysics China Earthquake Administration
Current assignee: Inst Geophysics China Earthquake Administration
Priority date: 2021-06-07
Filing date: 2022-04-01
Publication date: 2022-12-14
Anticipated expiration: 2042-04-01
Also published as: CN113359202A; GB202204780D0; CN113359202B; GB2607684B

Abstract

A method for generating a fluxgate excitation signal and a fluxgate excitation circuit based on a single chip microcomputer or microcontroller. The microcomputer includes a timer/counter T0 which generates a reference signal for a phase sensitive detector and a timer/counter T1 which generates the fluxgate excitation signal for the drive circuit of the excitation coil of the fluxgate probe. The timer/counter T0 operates in an auto-load operation mode 0 and the timer/counter T1 operates in a non-autoload operation mode 1. The excitation signal and the input reference signal of the phase sensitive detector are generated by using two timer/counters of the same microcontroller, implementing high-precision phase adjustment on the excitation signal and the reference signal, thereby improving detection precision of the fluxgate signal. Moreover, temperature drift does not occur because there is no analogue circuit, which helps improve operation stability of the fluxgate magnetometer.

Description

METHOD FOR GENERATING FLUXGATE EXCITATION SIGNAL AND FLUXGATE

EXCITATION CIRCUIT BASED ON SINGLE CHIP MICROCOMPUTER

TECHNICAL FIELD

[0001] The present invention pertains to the field of geomagnetic observation technologies, relates to a fluxgate magnetometer for geomagnetic observation, and in particular, to a method for generating a fluxgate excitation signal and a fluxgate excitation circuit based on a single chip microcomputer.

BACKGROUND ART

[0002] Geomagnetic observation is an important geophysical observation means in earthquake research. Continuous and high-precision monitoring needs to be performed on a geomagnetic field at a certain space density at different locations. A fluxgate magnetometer is used as a main instrument for three-component vector observation of geomagnetism.

[0003] The fluxgate magnetometer is a vector sensitive sensor for measuring a direct current or low frequency magnetic field, and is also a most widely used instrument for measuring a quasi-static and slowly changing vector magnetic field. A basic principle of the fluxgate magnetometer is based on a nonlinear magnetization characteristic of an iron core material. A sensitive element of the fluxgate magnetometer is an iron core made of a material with high magnetic permeability and easy saturation. There are two winding coils on the iron core: One is an excitation coil, and the other is an induction coil. Under magnetization of an alternating excitation signal EXC CLK with a frequency offi of the excitation coil, the magnetic permeability of the iron core undergoes cyclic saturation and non-saturation changes so that the induction coil induces a signal reflecting an external magnetic field. The signal includes a fundamental wavefi of the excitation signal and other harmonic components. Even harmonics contain information about the external magnetic field. In a fluxgate signal detection circuit, an output signal of the induction coil passes through a frequency selective amplification and phase sensitive detector (PSD); a second harmonic signal 2fi whose amplitude is proportional to a measured magnetic field is selected from harmonics and rectified; and a voltage signal proportional to the measured magnetic field is output. For circuits of the phase sensitive detector (PSD) with a frequency selection characteristic, a reference voltage signal PSD CLK with a same frequency and phase as the second harmonic signal 2/0 is required. 100041 In practice, the fluxgate excitation signal EXC CLIC and the reference signal PSD CLK of the PSD are generated by different frequency divisions from a same signal generation circuit. However, after the excitation signal and the second harmonic signal of the induction coil are processed by a front signal processing circuit, an additional phase shift is generated, resulting in a phase difference between the second harmonic signal 2/5 and the reference signal PSD CLK of the PSD, thereby reducing detection efficiency and even causing operation instability of a fluxgate signal detection circuit system. Therefore, it is necessary to perform the phase shift for the reference signal PSD CLK or the excitation signal EXC_CLK, so that the second harmonic signal and the reference signal have a same phase. A current phase shift method mainly includes an analog circuit phase shift and a digital circuit phase shift.

[0005] FIG. 1 shows a fluxgate excitation signal generation circuit based on an analog phase shift. A high frequency signal output from the signal generation circuit is split into two branches. One of the two branches passes through a first frequency divider to obtain an output frequency of 2ft as an input reference signal PSD CLK of the PSD, and the other passes through a second frequency divider to obtain a signal with a frequency of to. Then, a waveform is transformed into a sine wave, a triangular wave, or the like. The phase shift is performed by an analog phase shift circuit. Power amplification is performed by a drive output circuit. A signal obtained after the above operations is used as the fluxgate excitation signal EXC CLK. However, a structure of the excitation signal generation circuit based on the analog phase shift is relatively complex, and a quantity of components required is relatively large, which is not conducive to reducing power consumption and a system volume. More importantly, a parameter of an analog circuit component is susceptible to temperature change, resulting in a relatively large temperature drift of a fluxgate output signal [0006] FIG. 2 shows a fluxgate excitation signal generation circuit based on digital circuit phase shift. A high frequency signal output from the signal generation circuit is split into two branches. One of the two branches passes through a first frequency divider to obtain a signal with an output frequency of 2fo as an input reference signal PSD CLK of the PSD. The other passes through a second frequency divider to obtain a signal with a frequency of to. Then, the phase shift is performed by a digital phase shift circuit. Power amplification is performed by a drive output circuit. A signal obtained after the above operations is used as the fluxgate excitation signal EXC CLK. However, a structure of the excitation signal generation circuit based on the digital circuit phase shift is relatively complex, and a quantity of components required is relatively large, which is not conducive to reducing a system volume. In addition, when the digital circuit phase shift is performed, a multi-position switch sets a magnitude of phase shift. Thereby, phase shift precision is limited by a position quantity of the switch and circuit complexity.

[0007] In conclusion, the conventional analog phase shift circuit tends to cause temperature drift because the component parameter is susceptible to temperature. In addition, precision of the digital phase shift circuit is not high, and the circuit is relatively complex. Some digital phase shift circuits still need to be added with a resistor capacitor (RC) analog circuit delay unit, which brings the temperature drift to the fluxgate magnetometer system. Therefore, in order to improve geomagnetic observation precision of the fluxgate magnetometer and develop geomagnetic observation research, it is of great significance to realize how to precisely adjust the phase of the reference signal PSD CLK or the excitation signal EXC CLK while avoiding introduction of temperature drift and simplifying the circuit structure.

SUMMARY

[0008] A conventional fluxgate excitation signal generation circuit has disadvantages, including complex circuit, low phase shift precision, easy to be affected by temperature, a relatively large quantity of components used, a relatively large circuit volume, high power consumption, high costs, and the like. The present invention aims to provide a method for generating a fluxgate excitation signal based on a single chip microcomputer. While generating an excitation signal EXC CLK and an input reference signal PSD_CLK of a phase sensitive detector, the single chip microcomputer may perform precise phase adjustment on the reference signal PSD CLK, thereby improving phase sensitive detection efficiency, and detection precision of the fluxgate signal. In addition, the invention has characteristics, such as simple circuit, stable operation, high phase adjustment precision, small temperature drift, small volume, and low costs.

[0009] The present invention also aims to provide a fluxgate excitation circuit based on a single chip microcomputer, configured to generate a fluxgate excitation signal [0010] In the present invention, generation of the fluxgate excitation signal is an important part of a fluxgate magnetometer, and relates to various technical indicators of a fluxgate magnetometer system, such as operation stability, resolution, temperature drift, power consumption, volume, and costs. Two signals are required to output by the fluxgate excitation circuit. One signal is an excitation signal EXC CLK with a frequency of.f.9 output to a fluxgate excitation coil. The other signal is an input reference signal PSD_CLK of a phase sensitive detector with a frequency of 2lo. When there is a measured external magnetic field signal, a fluxgate induction coil outputs a second harmonic signal that contains external magnetic field information and has a frequency same as that of the excitation signal After signal processing, a phase difference Ay is often generated between the second harmonic signal and the input reference signal PSD CLK of the fluxgate PSD, reducing phase sensitive detection efficiency, increasing noises, and even causing operation instability in a worse case In the present invention, the single chip microcomputer is introduced into a signal processing circuit, to perform phase shift processing on the excitation signal or the input reference signal of the phase sensitive detector.

[0011] The present invention provides a method for generating a fluxgate excitation signal based on a single chip microcomputer. The single chip microcomputer including a timer/counter TO and a timer/counter Ti is configurated to generate the fluxgate excitation signal. The single chip microcomputer is separately connected to a phase sensitive detector and an excitation signal power drive circuit of a fluxgate magnetometer. When the timer/counter TO operates in an auto-load operation mode 0, an output in a counting cycle of the timer/counter TO is used as an input reference signal of the phase sensitive detector. When the timer/counter T1 operates in a non-autoload operation mode 1, an output in a counting cycle of the timer/counter T1 is used as the fluxgate excitation signal.

[0012] The method for generating a fluxgate excitation signal is operated by the single chip microcomputer according to the following steps: 100131 Si: initializing the single chip microcomputer, and setting interrupt functions of the timer/counter TO and the timer/counter Ti; [0014] S2: setting initial count value registers THO and TLO of the timer/counter TO; [0015] S3: starting the timer/counter TO; [0016] S4: enabling an interrupt response program of the timer/counter TO when the timer/counter TO overflows; [0017] S5: in an interrupt response of the timer/counter TO, setting a level inversion of an input/output (10) pin of the single chip microcomputer outputting a reference signal, and outputting the reference signal to the phase sensitive detector connected to the pin; [0018] 56: determining whether the reference signal is in a specified level state, if the reference signal is in the specified level state, going to step S7, or if the reference signal is not in the specified level state, exiting the current interrupt response of the timer/counter TO, returning to step S4, and waiting for a next interrupt response of the timer/counter TO; [0019] S7: setting initial count value registers THI and TLI of the timer/counter TI; [0020] S8: starting the timer/counter Ti, and exiting the current interrupt response of the timer/counter TO; [0021] S9: enabling an interrupt response program of the timer/counter Ti when the timer/counter Ti overflows; and [0022] S1 0: in an interrupt response of the timer/counter Ti, setting a level inversion of the 10 pin of the single chip microcomputer outputting an excitation signal, outputting the excitation signal to the excitation signal power drive circuit connected to the pin, then exiting the current interrupt response of the timer/counter Ti, returning to step S4, and waiting for a next interrupt response of the timer/counter TO.

100231 In step Sl, the initializing the single chip microcomputer includes the following steps: [0024] Sll: setting mode registers of the timer/counter TO and the timer/counter TI; [0025] S12: setting both the timer/counter TO and the timer/counter Ti to a timing mode; [0026] S13: setting start modes of the timer/counter TO and the timer/counter TI; 100271 S14: setting input count pulse frequencies of the timer/counter TO and the timer/counter Ti; and [0028] S15: enabling a system interrupt function of the single chip microcomputer and overflow interrupt functions of the timer/counter TO and timer/counter Tl.

[0029] The initial count value registers of the timer/counter TO are set in step 52 according to the following formulas: TH 0 = (213 SYS CLK /32 (1) 2xPSD_CLK) TLO = (2SYS_CLK) " %32 (2) 2xPSD_CLK [0030] In the formulas, SYS CLK is a system frequency of the single chip microcomputer, and PSD CLK is an input reference signal with a frequency of 2foof a fluxgate phase sensitive detector, the frequency being set to 2/0 here.

100311 In step 56, when the reference signal and the excitation signal are output simultaneously, a phase difference Ay between the reference signal and a second harmonic signal that is output from an induction coil of a fluxgate probe and that is received by the phase sensitive detector, is used to determine a reference level state of the timer/counter T1 at a start time, that is, the specified level state.

[0032] (I) When the phase difference Ay is less than 1800, the specified level state indicates a high level, that is, the timer/counter T1 is started when the reference signal is at a high level. [0033] (2) When the phase difference Ay is not less than 180°, the specified level state indicates a low level, that is, the timer/counter Ti is started when the reference signal is at a low level [0034] The initial count value registers of the timer/counter Ti are set in step S8 according to the following formulas: /256 (3) 2rtxPSD CLK TL 1 = (216 ApxSYS CLK %256 (4)) 2rrxPSD_CLK [0035] In the formulas, SYS CLK is a system frequency of the single chip microcomputer, PSD CLK is a reference signal with a frequency of 2foof a fluxgate PSD, and (1/0 represents taking remainder.

[0036] The present invention provides a fluxgate excitation circuit based on a single chip microcomputer, including a single chip microcomputer, a fluxgate probe, an excitation signal power drive circuit, and a signal detection circuit.

[0037] An excitation signal output terminal and a reference signal output terminal are disposed on the single chip microcomputer. The fluxgate probe includes an iron core, and an excitation coil TH1 = (216 awxSYS_CLK and an induction coil wound on the iron core. An input terminal of the power drive circuit is connected to the excitation signal output terminal of the single chip microcomputer. An output terminal of the power drive circuit is connected to both ends of the excitation coil. The signal detection circuit includes an input circuit, a frequency selective amplification circuit, a phase sensitive detector (PSD), an integration circuit, and an output buffer circuit that are connected in sequence. The integration circuit is further connected to an input terminal of a feedback circuit. An output terminal of the feedback circuit is connected to one end of the induction coil, and is separated from a direct current in the input circuit by using an input capacitor of the signal detection circuit. An input terminal of the input circuit is connected to both ends of the induction coil.

[0038] The single chip microcomputer includes a timer/counter TO and a timer/counter Tl. An output in a counting cycle of the timer/counter TO is used as an input reference signal PSD_CLK of a phase sensitive detector. An output in a counting cycle of the timer/counter Ti is used as a fluxgate excitation signal EXC CLK.

[0039] According to the fluxgate excitation circuit based on the single chip microcomputer, setting the timer/counter TO includes: [0040] (1) setting operation mode registers (TIMODs)(TMOD.0 to TMOD.3) of the timer/counter TO as follows: TMOD.0=0 and TMOD.1=0, that is, the timer/counter TO operates in an auto-load operation mode 0; TMOD.2=0, that is, a counting/timing control bit of the timer/counter TO is set as C/t = 0, namely, the timer/counter TO is selected as a timing mode; and TMOD.3=0, that is, a gate bit of the timer/counter TO is set as GATE=0, in other words, the timer/counter TO is started by using a TRO position 1 (TRO=1) of a control register (TCON); [0041] (2) setting a TO/12 bit of an auxiliary register (AUXR) of the single chip microcomputer to 1 (TO x 12=1), so that a system clock frequency SYS_CLK of the single chip microcomputer is used as an input count pulse frequency of the timer/counter TO; and [0042] (3) setting initial count value registers T1-10 and TLO of the timer/counter TO according to the following formulas: THO = (213 SYS CLK /32 (1) 2xPSD_CLK) TLO = (21 SYS CLK) %32 2xPSD_CLK (2) [0043] In the formulas, SYS CLK is a system frequency of the single chip microcomputer, PSD CLK is an input reference signal with a frequency of 2fo of a fluxgate phase sensitive detector (PSD), the frequency being set to 2fo here, and % represents a mathematical modulo operation and means taking remainder.

[0044] According to the fluxgate excitation circuit based on the single chip microcomputer, setting the timer/counter Ti includes: 100451 (1) setting TMODs (TMOD.4 to TMOD.7) of the single chip microcomputer as follows: TMOD.4=I and TMOD.5=0, that is, the timer/counter Ti operates in 16-bit non-auto-load operation mode 1; TMOD.6=0, that is, a counting/timing control bit of the timer/counter T1 is set as C/T = 0, namely, the timer/counter T1 is selected as a timing mode; and TMOD.7=0, that is, a gate bit of the timer/counter Ti is set as GATE=0, in other words, the timer/counter Ti is started by using a TR1 position 1 (TRI=1) of a TCON; [0046] (2) setting a T1 x12 bit of an AUXR of the single chip microcomputer is set to 1 (TI x] 2=), so that a system clock frequency of the single chip microcomputer is used as an input count pulse frequency of the timer/counter Ti; and [0047] (3) setting initial count value registers TH1 and TL1 of the timer/counter Ti according to the following formulas: = (216 ApxSYS_CLK) /2s6 (3) TH1 2rrxPSD CLK)/ = (216 ApxSYS_CLK) TL1 %256 (4) DrxPSD CLK [0048] In the formulas, SYS_CLK is a system frequency of a single chip microcomputer; PSD CLK is a reference signal with a frequency of 2/0 of a fluxgate PSD; and AT is, when a reference signal and an excitation signal are output simultaneously, a phase difference between the reference signal and a second harmonic signal that is output from an induction coil of a fluxgate probe and that is received by a phase sensitive detector.

100491 The method for generating the fluxgate excitation signal based on the single chip microcomputer and the fluxgate excitation circuit based on the single chip microcomputer provided in the present invention have the following beneficial effects: [0050] (1) According to the present invention, the single chip microcomputer connected to the excitation coil and the phase sensitive detector is disposed in the fluxgate excitation circuit. The excitation signal and the input reference signal of the PSD are generated by using two timer/counters of the single chip microcomputer, such that high-precision phase adjustment can be performed on the excitation signal and the reference signal Moreover, temperature drift does not occur because of no analog circuit, which helps improving operation stability of the fluxgate magnetometer.

100511 (2) According to the present invention, the timer/counter TO of the single chip microcomputer with an automatic loading function is used as a timer of the input reference signal of the PSD with an output frequency of 2/0, the timer/counter Ti is used as a timer of the excitation signal EXC_CLK with an output frequency offo, a start time of the timer/counter T1 is determined based on the phase difference Acp between the second harmonic signal of the induction coil of the fluxgate probe and the reference signal, and an initial count value of the timer/counter Ti is determined based on a value of the phase difference. Therefore, high-precision phase adjustment can be implemented on the excitation signal and the reference signal

BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The accompanying drawings in the following description are merely for some examples of this application. Those skilled in the art may still derive other drawings from the accompanying drawings without creative efforts.

100531 FIG. 1 is a fluxgate excitation signal generation circuit based on analog phase shift; [0054] FIG. 2 is a fluxgate excitation signal generation circuit based on digital circuit phase shift; [0055] FIG. 3 is a principle block diagram of a fluxgate excitation circuit based on a single chip microcomputer; 100561 FIG 4 is settings and a functional block diagram of a timer/counter TO; 100571 FIG 5 is settings and a functional block diagram of a timer/counter Ti; and [0058] FIG 6 is a schematic principle diagram of a method for generating a fluxgate excitation signal based on a single chip microcomputer.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0059] The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are merely a part rather than all of the embodiments of the present invention. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts should fall within the present invention.

[0060] Embodiment 1 [0061] As shown in FIG. 3, a fluxgate excitation circuit based on a single chip microcomputer provided in this embodiment includes a single chip microcomputer, a fluxgate probe, a excitation signal power drive circuit, and a signal detection circuit.

[0062] An excitation signal output terminal and a reference signal output terminal are disposed on the single chip microcomputer. The fluxgate probe includes an iron core, and an excitation coil and an induction coil wound on the iron core. An input terminal of the excitation signal power drive circuit is connected to the excitation signal output terminal of the single chip microcomputer An output terminal of the excitation signal power drive circuit is connected to both ends of the excitation coil. The signal detection circuit includes an input circuit, a frequency selective amplification circuit, a phase sensitive detector (PSD), an integration circuit, and an output buffer circuit that are connected in sequence. The integration circuit is further connected to an input terminal of a feedback circuit. An output terminal of the feedback circuit is connected to one end of the induction coil, and is separated from a direct current in the input circuit by using an input capacitor of the signal detection circuit. An input terminal of the input circuit is connected to both ends of the induction coil.

100631 In this embodiment, signals generated by the single chip microcomputer includes: an excitation signal EXC_SLK with a frequency of Jo output to the excitation coil, and a reference signal PSD_CLK with a frequency of 2/0 output to the phase sensitive detector (PSD).

100641 The model of single chip microcomputer used in this embodiment is an enhanced 8051 single chip microcomputer STC LIFO4E from STCmicro Technology Co, ,Ltd, and includes a timer/counter TO and a timer/counter Ti. In addition to the single chip microcomputer of this model, any single chip microcomputer or control processor having two or more timers/counters may be used as a circuit component generating the excitation signal of the present invention.

100651 Herein, the output excitation signal EXC CLK and the input reference signal PSD CLK of the phase sensitive detector (PSD) are also not limited to using a specific timer/counter of the single chip microcomputer. Any timer/counter with an automatic loading function, that is, a timer/counter in operation mode 0, may be used as a timer of the reference signal PSD CLK with the output frequency of 21b input to the PSD. Another timer/counter in a timer/counter operation mode 1 may be used as a timer of the excitation signal EXC_CLK with the output frequency off°. In this embodiment, an output in a counting cycle of the timer/counter TO is used as the reference input signal PSD CLK of the PSD, and an output in a counting cycle of the timer/counter T1 is used as the fluxgate excitation signal EXC CLK.

[0066] Settings of the timer/counter TO are shown in FIG. 4. Operation mode registers (TMOD5)(TMOD.0 to TMOD.3) of the timer/counter TO are set as follows: Set TN40D.0=0 and TIVIOD.1=0, that is, the timer/counter TO operates in an auto-load operation mode 0. Set TMOD.2=0, that is, a counting/timing control bit of the timer/counter TO is set as C/t = 0, namely, the timer/counter TO is selected as a timing mode. Set TMOD.3=0, that is, a gate bit of the timer/counter TO is set as GATE=0, and in other words, the timer/counter TO is started by using a TRO position 1 (TRO=1) of a control register (TCON). ATO x 12 bit of an auxiliary register (AUXR) of the single chip microcomputer is set to 1 (T0x12=1), so that a system clock frequency SYS CLK of the single chip microcomputer is used as an input count pulse frequency of the timer/counter TO. Initial count value registers THO and TLO of the timer/counter TO are set according to the following formulas: THO = (213 SYS_CLK /32 2XPSD CLK) (I) TLO = (213 SYS CLK) %32 2xPSD_CLK (2) [0067] In the formulas, SYS_CLK is a system frequency of a single chip microcomputer, PSD CLK is an input reference signal with a frequency of 2fo of a fluxgate phase sensitive detector (PSD), and % represents a mathematical modulo operation and means taking remainder.

[0068] Settings of the timer/counter Ti are shown in FIG. 5. TMODs (TMOD.4 to TMOD.7) of the single chip microcomputer are set as follows: TMOD.4=1 and TMOD.5=0, that is, the timer/counter Ti operates in 16-bit non-auto-load operation mode 1. Set TMOD.6=0, that is, a counting/timing control bit of the timer/counter T1 is set as C/T = 0, namely, the timer/counter Ti is selected as a timing mode. Set TMOD.7=0, that is, a gate bit of the timer/counter Ti is set as GATE=0, and in other words, the timer/counter Ti is started by using a TR1 position 1 (TR1=1) of a TCON. A Tlx12 bit of an AUXR of the single chip microcomputer is set to 1 (T1/12=1), so that a system clock frequency of the single chip microcomputer is used as an input count pulse frequency of the timer/counter TI. Initial count value registers TH1 and TM of the timer/counter Ti are set according to the following formulas: TH1 = (216 apxSYS CLIC) 2nPSD_CLK) /256 (3) TL1 = (216 ApxSYS_CLK) %256 (4) 2rrxPSD CLK 100691 In the formulas, SYS CLK is a system frequency of a single chip microcomputer; PSD CLK is a reference signal with a frequency of 2foof a fluxgate phase sensitive detector (PSD); Acp is, when a reference signal and an excitation signal are output simultaneously, a phase difference between the reference signal and a second harmonic signal that is of an induction coil of a fluxgate probe and that is received by the phase sensitive detector; and % represents a mathematical modulo operation and means taking remainder.

[0070] In a fluxgate circuit system in this embodiment, except the excitation circuit of the single chip microcomputer, other parts use disclosed circuits in fluxgate magnetometer products.

100711 Embodiment 2 [0072] As shown in FIG. 6, this embodiment provides a method for generating a fluxgate excitation signal. The single chip microcomputer provided in Embodiment 1 operates according to steps S1-SIO: [0073] 51: The single chip microcomputer is initiated and an interrupt function of the timer/counter T1 is set, which includes steps S11-S15: 100741 S11: Mode registers (TMODs) (TNIOD.0 to TMOD.7) of the timer/counter TO and the timer/counter Ti are set.

[0075] In this step, the mode registers of the timer/counter TO and the timer/counter Ti are separately set based on requirements of the mode registers (TNIODs) of the timer/counter TO and the timer/counter Ti in Embodiment 1, so that the timer/counter TO operates in the auto-load operation mode 0, and the timer/counter Ti operates in the 16-bit non-auto-load operation mode 1.

[0076] S12: Both the timer/counter TO and the timer/counter TI are set to a timing mode.

100771 In this step, counting/timing control bits of the timer/counter TO and the timer/counter Ti are set as C/T = 0 based on requirements of the mode registers (TMODs) of the timer/counter TO and the timer/counter T1 in Embodiment 1, that is, the two timer/counters are selected as the timing mode.

[0078] S13: Start modes of the timer/counter TO and the timer/counter Ti are set.

[0079] In this step, gate bits of the timer/counter TO and the timer/counter Ti are set as GAIE=0 based on requirements of the mode registers (TMODs) of the timer/counter TO and the timer/counter Ti in Embodiment 1, that is, the timers/counters are started by setting a TRx position 1 (I1R0=1 or TR1=1) of the TCON of the single chip microcomputer.

[0080] S14: Input count pulse frequencies of the timer/counter TO and the timer/counter Ti are set.

[0081] In this step, the AUXRs of the timer/counter TO and the timer/counter T1 are set as TO >i2=1 and T1/12=1, so that the input count pulse frequencies of the timer/counter TO and the timer/counter T1 are system frequencies without frequency division, which improves phase adjustment accuracy.

100821 S15: A system interrupt function of the single chip microcomputer and overflow interrupt functions of the timer/counter TO and timer/counter T1 are enabled.

[0083] In this step, the system interrupt function of the single chip microcomputer and the overflow interrupt functions of the timer/counter TO and timer/counter TI are enabled based on a conventional operation.

[0084] S2: Initial count value registers T1-10 and TLO of the timer/counter TO are set.

[0085] In this step, the initial count value registers THO and TLO of the timer/counter TO are set according to the above formulas (1) and (2).

[0086] S3: The timer/counter TO is started to start timing.

[0087] S4: An interrupt response of the timer/counter TO is entered when the timer/counter TO overflows.

100881 Herein, the TCON of the timer/counter TO is set as TRO=1, and the timer/counter TO is started to enter a counting operation mode. The timer/counter TO starts counting from the initial count value until the counter overflows and cyclically generates the interrupt response.

[0089] Herein, the input reference signal PSD_CLK of the phase sensitive detector is not limited to use a specific pin of the single chip microcomputer. Any input/output (J0) port having an output function of the single chip microcomputer may be used as an output pin of the input reference signal PSD CLK of the phase sensitive detector.

[0090] S5: In the interrupt response of the timer/counter TO, a level inversion of the 10 pin of the single chip microcomputer outputting the reference signal is set, such that the reference signal is output to the phase sensitive detector connected to the pin.

[0091] In an interrupt response program of the timer/counter TO, according to step S5, the level inversion of a certain output pin of the single chip microcomputer is set, such that the reference signal of the fluxgate phase sensitive detector (PSD) is output. The reference signal PSD CLK with a frequency of 2fo is output to the fluxgate phase sensitive detector (PSD). According to step 86 to step SS, a start time of the timer/counter T1 is determined, initial count value registers TH1 and TL1 of the timer/counter T1 are set, and the timer/counter T1 is started.

100921 So: Whether the reference signal is in a specified level state is determined. If the reference signal is in the specified level state, go to step 57; or if the reference signal is not in the specified level state, exit the current interrupt response of the timer/counter TO, return to step 84, and wait for a next interrupt response of the timer/counter TO.

[0093] In this embodiment, a phase difference Ap between the reference signal and a second harmonic signal that is output from an induction coil of a fluxgate probe and that is received by the phase sensitive detector when the reference signal and the excitation signal are output simultaneously, is used to determine a reference level state of the timer/counter T1 at the start time, that is, the specified level state.

[0094] (1) When the phase difference Aip is less than 1800, the specified level state indicates a high level, that is, the timer/counter T1 is started when the reference signal is at a high level. [0095] (2) When the phase difference Ac is not less than 180°, the specified level state indicates a low level, that is, the timer/counter Ti is started when the reference signal is at a low level. [0096] The phase difference Acp may be determined in a debugging phase of a fluxgate excitation circuit. A specific determining method is as follows: [0097] First, in order to enable the timer/counter Ti and the timer/counter TO to output a same level signal almost simultaneously (for example, simultaneously output a low level signal), a very small count number (for example, 1) may be assigned to the timer/counter T1, and the initial count value of the timer/counter Ti is set based on the count number. In this way, when the timer/counter TO overflows and outputs a low level signal, the timer/counter Ti simultaneously starts and outputs a low level signal. The reference signal output by the timer/counter TO of the single chip microcomputer is input to the phase sensitive detector (P SD).

[0098] Second, the excitation signal output by the timer/counter T1 of the single chip microcomputer drives the excitation coil of the fluxgate probe after passing through the power amplification circuit. An induction signal output from the induction coil of the fluxgate probe, passes through the input circuit and the frequency selective amplification circuit such that a second harmonic signal with a frequency of 2f, (that is, the second harmonic signal output by the induction coil of the fluxgate probe) is selected, and is delivered to the phase sensitive detector (PSD). 100991 Then, the reference signal and the second harmonic signal that is output from the induction coil of the fluxgate probe and that is received by the phase sensitive detector (PSD) are comparatively observed, so that the phase difference AT is obtained between the reference signal and the second harmonic signal output from the induction coil of the fluxgate probe.

[0100] Based on the phase difference Ay, it can be determined whether the timer/counter T1 starts in a positive half cycle (that is, the high level) of the reference signal PSD CLK or in a negative half cycle (that is, the low level) of the reference signal PSD_CLK. The initial count value of the timer/counter Ti is determined according to the formulas (3) and (4). In a debugging phase, the foregoing operations may be repeated, so as to eliminate the phase difference between the reference signal and the second harmonic signal output from the induction coil of the fluxgate probe which implements high-precision phase shift adjustment, thereby improving measurement precision and operation stability of a fluxgate magnetometer.

[0101] S7: Initial count value registers TH1 and TL I of the timer/counter Ti are set.

[0102] In this step, the initial count value registers TM] and TM of the timer/counter TI are set according to the above formulas (3) and (4).

101031 58: The timer/counter Ti is started, and the current interrupt response of the timer/counter TO is exited.

[0104] S9: An interrupt response of the timer/counter Ti is entered when the timer/counter Ti overflows.

[0105] Herein, the TCON of the timer/counter Ti is set as TR1=1, and the timer/counter Ti is started to enter a counting operation mode. The timer/counter Ti starts counting with an initial count value until the counter overflows and generates an interrupt response.

101061 In an interrupt response program of the timer/counter Ti, by step SIO, a certain output pin of the single chip microcomputer is set as an output terminal of the fluxgate excitation signal and an excitation signal EXC_CLK with a frequency offb is output to the excitation coil of the fluxgate probe.

101071 S10: In the interrupt response of the timer/counter T1, set a level inversion of the 10 pin of the single chip microcomputer outputting the excitation signal, output the level signal as an excitation signal to the excitation signal power drive circuit connected to the pin, exit the current interrupt response of the timer/counter Ti, return to step S4, and wait for a next interrupt response of the timer/counter TO.

101081 Herein, the output excitation signal EXC CLK is not limited to using a certain specific pin of the single chip microcomputer. Any JO port having an output function of the single chip microcomputer may be used as an output pin of the excitation signal EXC_CLK.

[0109] Embodiment 3 101101 With reference to FIG. 3, this embodiment provides a method for controlling the fluxgate excitation circuit provided in Embodiment 1, including the following steps: [0111] L 1: The single chip microcomputer generates a reference signal PSD_CLK (with a frequency of 2fi) of the phase sensitive detector output from an JO pin P1.0 and a fluxgate excitation signal EXC CLK (with a frequency offi) output from an JO pin PI 1 according to step Si to S1O in Embodiment 2.

[0112] L2: The excitation signal generated by the single chip microcomputer drives the excitation coil of the fluxgate probe after passing through the power amplification circuit.

101131 L3: An induction signal is output from the induction coil of the fluxgate probe, and passes through the input circuit and the frequency selective amplification circuit used for signal demodulation, such that a second harmonic signal with a frequency of 2/0 that includes information about a measured external magnetic field is selected. A magnetic field signal is obtained by demodulating the second harmonic signal by the phase sensitive detector (PSD), is output after smoothing filtering by the integration circuit, and is fed back to the induction coil simultaneously by the feedback circuit. This maintains stability of signal detection, improves linearity and another property, and implements that the iron core of the fluxgate probe is in a near-zero magnetic field state.

[0114] In seismic research, high-precision observation of a geomagnetic field needs to be performed continuously for a long time. The fluxgate magnetometer is one of the most widely used weak magnetic field vector observation instruments in geomagnetic observation. Improving observation precision of the fluxgate magnetometer and reducing temperature drift are important technical problems in developing a high-precision fluxgate magnetometer. A fluxgate magnetometer system includes several technical modules. A fluxgate excitation circuit is an important part of a fluxgate magnetometer signal detection system, and relates to multiple technical indexes such as operation stability, a resolution, temperature drift, power consumption, a volume, costs, and the like of the fluxgate magnetometer system. Two signals need to be output by the fluxgate excitation circuit. One signal is the excitation signal EXC CLK with a frequency fo output to the fluxgate excitation coil. The other signal is the input reference signal PSD CLK with a frequency of 2/b of the PSD. Further, phase shift control is performed on the excitation signal EXC_CLK or the input reference signal PSD_CLK of the PSD. According to the technical solution of the present invention, a few components such as a single chip microcomputer may be used to provide the fluxgate magnetometer with the excitation signal EXC CLK and the input reference signal PSD CLK of the PSD that operate stably and can implement high-precision phase shift adjustment and no temperature drift. This provides a technical basis for implementing a high-precision fluxgate magnetometer. In addition, this technical method has advantages such as a small quantity of components used, a simple circuit, a small size, and a low cost.

[0115] Those of ordinary skill in the art will understand that the embodiments described herein are intended to help readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such special statements and embodiments. Those of ordinary skill in the art may make other various specific modifications and combinations according to the technical teachings disclosed in the present invention without departing from the essence of the present invention, and such modifications and combinations still fall within the protection scope of the present invention.

Claims

WHAT IS CLAIMED IS: I. A method for generating a fluxgate excitation signal based on a single chip microcomputer, comprising: a single chip microcomputer having a timer/counter TO and a timer/counter T1 configured to generate a fluxgate excitation signal, wherein the single chip microcomputer is separately connected to a phase sensitive detector and an excitation signal power drive circuit of a fluxgate magnetometer; the timer/counter TO operates in an auto-load operation mode 0, an output in a counting cycle of the timer/counter TO is used as an input reference signal of the phase sensitive detector; and the timer/counter Ti operates in a non-auto-load operation mode 1, and an output in a counting cycle of the timer/counter Ti is used as the fluxgate excitation signal, wherein the method for generating the fluxgate excitation signal is performed by the single chip microcomputer according to the following steps: Si: initializing the single chip microcomputer, and setting interrupt functions of the timer/counter TO and the timer/counter Ti; 52: setting initial count value registers THO and TLO of the timer/counter TO; 53: starting the timer/counter TO; S4: entering an interrupt response program of the timer/counter TO when the timer/counter TO overflows; 55: in an interrupt response of the timer/counter TO, setting a level inversion of an input/output (10) pin of the single chip microcomputer outputting the reference signal, and outputting the reference signal to the phase sensitive detector connected to the pin; 56: determining whether the reference signal is in a specified level state, when the reference signal is in the specified level state, going to step S7; and when the reference signal is not in the specified level state, exiting the current interrupt response of the timer/counter TO, returning to step 54, and waiting for a next interrupt response of the timer/counter TO; S7: setting initial count value registers Till and TL1 of the timer/counter Ti; S8: starting the timer/counter TI, and exiting the current interrupt response of the timer/counter TO; S9: entering an interrupt response program of the timer/counter Ti when the timer/counter Ti overflows; and Si 0: in an interrupt response of the timer/counter Ti, setting a level inversion of an TO pin of the single chip microcomputer outputting the excitation signal, outputting the excitation signal to the excitation signal power drive circuit connected to the pin, then exiting the current interrupt response of the timer/counter TI, returning to step S4, and waiting for the next interrupt response of the timer/counter TO.
2. The method for generating the fluxgate excitation signal based on the single chip microcomputer according to claim 1, wherein the initializing the single chip microcomputer in step S1 comprises the following steps: S11: setting mode registers of the timer/counter TO and the timer/counter TI; 512: setting both the timer/counter TO and the timer/counter T1 to a timing mode; 513: setting start modes of the timer/counter TO and the timer/counter Ti; S14: setting input count pulse frequencies of the timer/counter TO and the timer/counter T1; and 515: enabling a system interrupt function of the single chip microcomputer and overflow interrupt functions of the timer/counter TO and timer/counter Ti.
3 The method for generating the fluxgate excitation signal based on the single chip microcomputer according to claim 1 or 2, wherein an initial count value of the timer/counter TO is set in step S2 according to the following formulas THO = (2' SYS CLK) (1) /32 2xPSD_CLK SYS CLK) (2) TLO = (2" %32 2xPSD_CLK wherein, SYS CLK is a system frequency of the single chip microcomputer, and PSD CLK is an input reference signal with a frequency of 2/b of a fluxgate phase sensitive detector.
4. The method for generating the fluxgate excitation signal based on the single chip microcomputer according to claim 1, wherein in step SG, a phase difference Ac between the reference signal and a second harmonic signal that is output from an induction coil of a fluxgate probe and that is received by the phase sensitive detector when the reference signal and the excitation signal are output simultaneously, is used to determine a reference level state of the timer/counter Ti at a start time, referred as a specified level state: (1) when the phase difference Ac is less than 180°, the specified level state indicates a high level, and the timer/counter T1 is started when the reference signal is at a high level; or (2) when the phase difference Ac is not less than 1800, the specified level state indicates a low level, and the timer/counter Ti is started when the reference signal is at a low level.
5. The method for generating the fluxgate excitation signal based on the single chip microcomputer according to claim 4, wherein an initial count value of the timer/counter T1 is set in step 57 according to the following formulas: TH1 = (216,/ K apxSYS CL) /256 (3) 2TrxPSD_CLK TL 1 = (216 avxSYS CLK %256 (4) 27rxPSD_CLIC wherein, SYS_CLK is a system frequency of the single chip microcomputer, PSD_CLK is a reference signal with a frequency of 2/0 of a fluxgate phase sensitive detector (P SD), and % represents taking remainder,
6. A fluxgate excitation circuit based on a single chip microcomputer, comprising a single chip microcomputer, a fluxgate probe, an excitation signal power drive circuit, and a signal detection circuit, wherein an excitation signal output terminal and a reference signal output terminal are disposed on the single chip microcomputer; the fluxgate probe comprises an iron core, and an excitation coil and an induction coil wound on the iron core; an input terminal of the excitation signal power drive circuit is connected to the excitation signal output terminal of the single chip microcomputer; an output terminal of the excitation signal power drive circuit is connected to both ends of the excitation coil; the signal detection circuit comprises an input circuit, a frequency selective amplification circuit, a phase sensitive detector (PSD), an integration circuit, and an output buffer circuit that are connected in sequence; the integration circuit is further connected to an input terminal of a feedback circuit; an output terminal of the feedback circuit is connected to one end of the induction coil, and is separated from a direct current in the input circuit by using an input capacitor of the signal detection circuit; and an input terminal of the input circuit is connected to both ends of the induction coil; and the single chip microcomputer comprises a timer/counter TO and a timer/counter T1, an output in a counting cycle of the timer/counter TO is used as an input reference signal of a phase sensitive detector, and an output in a counting cycle of the timer/counter TI is used as a fluxgate excitation signal.
7. The fluxgate excitation circuit based on the single chip microcomputer according to claim6, wherein setting the timer/counter TO comprises: (1) setting operation mode registers (TNIOD5)(TMOD.0 to TMOD.3) of the timer/counter TO as follows: TMOD.0=0 and TMOD.1=0, which indicates that the timer/counter TO operates in an auto-load operation mode 0; TMOD.2=0, which indicates that a counting/timing control bit of the timer/counter TO is set as C/T = 0 and the timer/counter TO is selected as a timing mode; and TMOD.3=0, which indicates that a gate bit of the timer/counter TO is set as GATE=0, and the timer/counter TO is started by using a TRO position 1 (TRO=1) of a control register (TCON); (2) setting a TO 12 bit of an auxiliary register (AUXR) of the single chip microcomputer to 1, so that a system clock frequency SYS_CLK of the single chip microcomputer is used as an input count pulse frequency of the timer/counter TO; and (3) setting initial count value registers THO and TLO of the timer/counter TO according to the following formulas: THO = (213 SYS CLK /32 (I) 2xPSD CLK)/ TLO = (213 SYS CLK) (2) %32 2xPSD_CLK wherein, SYS CLK is a system frequency of the single chip microcomputer, PSD CLK is an input reference signal with a frequency of 210 of a fluxgate phase sensitive detector, and % represents taking remainder.
8. The fluxgate excitation circuit based on the single chip microcomputer according to claim 6, wherein setting the timer/counter Ti comprises: (1) setting TIYIODs (TMOD.4 to TMOD.7) of the single chip microcomputer as follows: TMOD.4=1 and TMOD.5=0, which indicates that the timer/counter Ti operates in 16-bit nonauto-load operation mode 1; TMOD.6=0, which indicates that a counting/timing control bit of the timer/counter T1 is set as yr = 0, and the timer/counter T1 is selected as a timing mode; and TMOD.7=0, which indicates that a gate bit of the timer/counter T1 is set as GATE=0 and the timer/counter Ti is started by using a TR1 position 1 (TR1=1) of a TCON; (2) setting a Ti >< 12 bit of the AUXR of the single chip microcomputer is set to 1, so that a system clock frequency of the single chip microcomputer is used as an input count pulse frequency of the timer/counter Ti; and (3) setting initial count value registers TH1 and TL1 of the timer/counter T1 according to the following formulas: = (216 apxSYS_CLK) TH1 /256 27rxPSD_CLIC avxSYS_CLIC TL1 = (216 2ff ><PSD_CLIC) %256 (4) wherein, SYS CLK is a system frequency of the single chip microcomputer, PSD CLK is a reference signal with a frequency of 2/0 of a fluxgate phase sensitive detector (PSD); and Acp is, (3) when a reference signal and an excitation signal are output simultaneously, a phase difference between the reference signal and a second harmonic signal that is output from an induction coil of a tluxgate probe and that is received by the phase sensitive detector.