GB2597275B - Multi-clock control - Google Patents

Multi-clock control Download PDF

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Publication number
GB2597275B
GB2597275B GB2011085.4A GB202011085A GB2597275B GB 2597275 B GB2597275 B GB 2597275B GB 202011085 A GB202011085 A GB 202011085A GB 2597275 B GB2597275 B GB 2597275B
Authority
GB
United Kingdom
Prior art keywords
clock control
clock
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB2011085.4A
Other versions
GB2597275A (en
GB202011085D0 (en
Inventor
Douglas Chambers Simon
Felix Stephen
Malcolm King Ian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Graphcore Ltd
Original Assignee
Graphcore Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Graphcore Ltd filed Critical Graphcore Ltd
Priority to GB2011085.4A priority Critical patent/GB2597275B/en
Publication of GB202011085D0 publication Critical patent/GB202011085D0/en
Priority to KR1020237005606A priority patent/KR20230039721A/en
Priority to JP2023502894A priority patent/JP2023534277A/en
Priority to EP20838071.7A priority patent/EP4172715A1/en
Priority to CN202080104694.7A priority patent/CN116113905A/en
Priority to PCT/EP2020/087564 priority patent/WO2022012771A1/en
Priority to US17/349,488 priority patent/US11625061B2/en
Publication of GB2597275A publication Critical patent/GB2597275A/en
Application granted granted Critical
Publication of GB2597275B publication Critical patent/GB2597275B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06—Clock generators producing several clock signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)
  • Electric Clocks (AREA)
GB2011085.4A 2020-07-17 2020-07-17 Multi-clock control Active GB2597275B (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
GB2011085.4A GB2597275B (en) 2020-07-17 2020-07-17 Multi-clock control
KR1020237005606A KR20230039721A (en) 2020-07-17 2020-12-22 Multi-clock control
JP2023502894A JP2023534277A (en) 2020-07-17 2020-12-22 Multi-clock control
EP20838071.7A EP4172715A1 (en) 2020-07-17 2020-12-22 Multi-clock control
CN202080104694.7A CN116113905A (en) 2020-07-17 2020-12-22 Multi-clock control
PCT/EP2020/087564 WO2022012771A1 (en) 2020-07-17 2020-12-22 Multi-clock control
US17/349,488 US11625061B2 (en) 2020-07-17 2021-06-16 Multi-clock control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2011085.4A GB2597275B (en) 2020-07-17 2020-07-17 Multi-clock control

Publications (3)

Publication Number Publication Date
GB202011085D0 GB202011085D0 (en) 2020-09-02
GB2597275A GB2597275A (en) 2022-01-26
GB2597275B true GB2597275B (en) 2022-09-07

Family

ID=72339022

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2011085.4A Active GB2597275B (en) 2020-07-17 2020-07-17 Multi-clock control

Country Status (7)

Country Link
US (1) US11625061B2 (en)
EP (1) EP4172715A1 (en)
JP (1) JP2023534277A (en)
KR (1) KR20230039721A (en)
CN (1) CN116113905A (en)
GB (1) GB2597275B (en)
WO (1) WO2022012771A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20230350451A1 (en) * 2022-04-28 2023-11-02 Parade Technologies, Ltd. Methods and Systems for Controlling Frequency Variation for a PLL Reference Clock

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010057686A1 (en) * 2008-11-24 2010-05-27 Icera Inc Active power management
US20130145190A1 (en) * 2010-08-26 2013-06-06 Renesas Electronics Corporation Data processing device and data processing system

Family Cites Families (18)

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Publication number Priority date Publication date Assignee Title
US6194940B1 (en) * 1999-09-27 2001-02-27 Lucent Technologies Inc. Automatic clock switching
JP3995142B2 (en) * 2001-11-12 2007-10-24 沖電気工業株式会社 Semiconductor integrated circuit
US6784699B2 (en) * 2002-03-28 2004-08-31 Texas Instruments Incorporated Glitch free clock multiplexing circuit with asynchronous switch control and minimum switch over time
KR100431805B1 (en) 2002-05-16 2004-05-17 뮤텔테크놀러지 주식회사 Clock signal generating circuit and method of system on a chip
JP4006634B2 (en) * 2002-10-10 2007-11-14 ソニー株式会社 Information processing apparatus and method, and program
US7249274B1 (en) * 2003-12-30 2007-07-24 Intel Corporation System and method for scalable clock gearing mechanism
US7343504B2 (en) * 2004-06-30 2008-03-11 Silicon Labs Cp, Inc. Micro controller unit (MCU) with RTC
US7106110B2 (en) * 2004-07-28 2006-09-12 International Business Machines Corporation Clock dithering system and method during frequency scaling
JP5613605B2 (en) * 2011-03-28 2014-10-29 ルネサスエレクトロニクス株式会社 Clock generation circuit, processor system using the same, and clock frequency control method
KR20130125036A (en) 2012-05-08 2013-11-18 삼성전자주식회사 System on chip (soc), method of operating the soc, and system having the soc
JP5928590B2 (en) 2012-07-25 2016-06-01 日本電気株式会社 Clock signal generating apparatus, clock signal generating method, and computer-readable recording medium
US9252743B2 (en) * 2012-09-28 2016-02-02 Intel Corporation Distributed polyphase filter
US9065454B2 (en) * 2012-11-29 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Phase locked loop with self-calibration
US9678556B2 (en) * 2014-02-10 2017-06-13 Qualcomm Incorporated Dynamic clock and voltage scaling with low-latency switching
KR102191167B1 (en) 2014-08-06 2020-12-15 삼성전자주식회사 Clock switch device and system-on-chip having the same
US9413361B1 (en) * 2015-01-28 2016-08-09 Apple Inc. Closed loop clock signal generator with multiple reference clocks
US10298382B2 (en) * 2016-06-23 2019-05-21 Omnivision Technologies, Inc. 1-16 and 1.5-7.5 frequency divider for clock synthesizer in digital systems
JP7260289B2 (en) * 2018-11-29 2023-04-18 エイブリック株式会社 Relaxation Oscillator and Electronic Device with Relaxation Oscillator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010057686A1 (en) * 2008-11-24 2010-05-27 Icera Inc Active power management
US20130145190A1 (en) * 2010-08-26 2013-06-06 Renesas Electronics Corporation Data processing device and data processing system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
'An innovative local adaptive voltage scaling architecture for on-chip variability compensation', E. Beigne & P. Vivet, published in New Circuits and Systems Conference (NEWCAS), 2011 IEEE. *

Also Published As

Publication number Publication date
US11625061B2 (en) 2023-04-11
CN116113905A (en) 2023-05-12
GB2597275A (en) 2022-01-26
WO2022012771A1 (en) 2022-01-20
GB202011085D0 (en) 2020-09-02
US20220019257A1 (en) 2022-01-20
EP4172715A1 (en) 2023-05-03
KR20230039721A (en) 2023-03-21
JP2023534277A (en) 2023-08-08

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