GB2590350A - High reliability MESA photodiode - Google Patents

High reliability MESA photodiode Download PDF

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GB2590350A
GB2590350A GB1916162.9A GB201916162A GB2590350A GB 2590350 A GB2590350 A GB 2590350A GB 201916162 A GB201916162 A GB 201916162A GB 2590350 A GB2590350 A GB 2590350A
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type
region
mesa
photodiode
barrier
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Missous MOHAMED
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Integrated Compound Semiconductors Ltd
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Integrated Compound Semiconductors Ltd
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    • HELECTRICITY
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/105Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
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    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022416Electrodes for devices characterised by at least one potential jump barrier or surface barrier comprising ring electrodes
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264Inorganic materials
    • H01L31/0304Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L31/03046Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP
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    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • H01L31/035281Shape of the body
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    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
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    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H01L31/1075Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure

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Abstract

A mesa PIN photodiode comprising a p-type region (6), an intrinsic region (4), an undoped barrier region (5) and an n-type region (3); wherein the barrier (5) is arranged between the intrinsic region (4) and the p-type region (6); and wherein the p-type region (6) is formed as a p-type mesa (11), and the p-type mesa (11) extends laterally less than the barrier region (5) to the extent that carriers are isolated from the lateral edge (12) of the barrier region (5). The mesa photodiode may be fabricated using III-V semiconductor materials with an InGaAs intrinsic layer. The mesa photodiode may operate in an avalanche photodiode for use in optoelectronic telecommunications.

Description

High Reliability MIESA Photodiode Technical Field of the Invention The present invention relates to the field of photodiodes and, in particular, to high reliability mesa type PIN photodiodes and mesa type Avalanche Photo Diodes
Background to the Invention
Modern communications systems are dependent upon fibre optic communications networks to transmit ever increasing amounts of data at ever quicker rates. Photodiodes are used in communication networks to convert optical signals into electronic signals. As fibre optic networks can be found in inaccessible places such as undersea cables and given their importance to modern life the components need to be highly durable with long lifetimes. In particular, devices must comply with Telcordia Testing Standards in order to be integrated into such networks.
Current photodiodes for, amongst other applications, optoelectronic telecommunication networks can be divided into two distinct types, mesa photodiodes and planar photodi odes.
Known mesa type photodiodes can achieve the data transfer rates required by current and near future networks but do not achieve the required lifetimes. During their production the etching of the mesa results in mesa sidewalls which contain surface defects, which when in proximity to the pn junction reduce the device lifetime Reduced lifetimes mean that they are not considered suitable for telecommunication infrastructures.
To achieve the required lifetimes photodiodes of the planar type are used, such as those found in C.P. SKRINISH1RE el al. Reliability of mesa and planar InGaAs PIN photodiodes. TEE Proceedings J -Optoelectronics February 1990, Vol. 137, No.1, pages 74-78.
Planar photodiodes are produced by depositing an n-type layer of semiconductor on a substrate followed by a lightly n-type doped layer and a passivation layer containing windows onto the lightly doped layer. Zinc or similar p-type dopant is then diffused into the light doped n-type regions turning them into p-type regions, by doing this the junction is no longer in proximity to the edges, instead being imbedded in the device thereby improving reliability.
However, planar photodiodes have by necessity a larger active area than mesa type photodiodes, this is disadvantageous as a large active area increases the capacitance of the device and this means high frequency applications (and thus high-speed communications) are not possible.
It is therefore an objective of the present invention to provide a photodiode that at least partially overcomes or alleviates some of the above problems.
Summary of the Invention
According to a first aspect of the invention there is provided a photodiode comprising a p-type region, an intrinsic region, an undoped barrier region and an n-type region, wherein the barrier region is arranged between the intrinsic region and the p-type region.
The provision of an undoped barrier region can achieve certain advantages. In particular, the number of carriers interacting with surface defects is decreased and the presence of the undoped barrier material allows some voltage drop across the undoped barrier alleviating all of the voltage being seen by the side wall as is the case in conventional photodiode structures.
The p-type region may be formed as a p-type mesa extending laterally less than the lateral extent of the rest of the photodiode, The provision of a p-type mesa with a lesser lateral extent can achieve certain advantages. In particular, it defines the size of the effective pn junction, isolating the pn junction from the edges of the photodiode.
In a preferred embodiment the p-type mesa is sufficiently far from the lateral edge of the barrier region that carriers are isolated from the lateral edge of the barrier region.
The provision of a p-type mesa sufficiently far from the lateral edge of the barrier region can achieve certain advantages. In particular, the effective pn junction is embedded in the photodiode such that carriers are isolated from the surface defects at the sides of the photodiode. This is analogous to the case in diffused junction photodiodes. This means that surface recombination is decreased and device lifetime is improved.
The p-type mesa may be at least 10 jtm from the lateral edge of the barrier region. The p-type mesa may be at least 20 um from the lateral edge of the barrier region The p-type mesa may be between 10 jtm and 50 jim from the lateral edge of the barrier region. The p-type mesa may be 14 um from the lateral edge of the barrier region. The p-type mesa may be 22 pm from the lateral edge of the barrier region. The p-type mesa may be 28 jun from the lateral edge of the barrier region The provision of the p-type mesa sufficiently far from the lateral edge of the mesa can achieve certain advantages. In particular, the separation protects against undesirable conduction near the sidewalls of the mesa.
In the present invention undoped may be defined as a charge carrier concentration of less than or equal to lx1015 cm-3 The provision of an undoped barrier region can achieve certain advantages. In particular, it limits the lateral diffusion of the holes to the order of the hole diffusion length meaning the effective pn junction is of a similar size to the p-type mesa.
The barrier region may be comprised of III-V semiconductors. The barrier region may be a ternary semiconductor. The bather region may be a quaternary semiconductor. The barrier region may be a penternary semiconductor. In some embodiments suitable group III elements may include, but are not limited to, any one or more of the following: aluminium, gallium and/or indium. In some embodiments suitable group V elements may include, but are not limited to, any one or more of the following: nitrogen, phosphorus, arsenic and/or antimony. In one embodiment the barrier may be comprised of InP. In a further embodiment the barrier region may be comprised of AlxInyGai_x-yAszSbi_z. In a preferred embodiment the barrier region may be comprised of AlInAs In a more preferred embodiment, the barrier may be comprised of A10.48In0.52As.
The provision of Al InA s barriers can achieve certain advantages In particular, it provides a suitable bandgap offset within the conduction band. More advantageously, Alo tolno 52As provides a suitable bandgap offset for the barrier and is lattice matched to InP -a commonly available substrate.
The barrier region may be at least 100nm thick, at least 150nm thick, at least 200nm thick. A thicker barrier up 400nm may also be acceptable but the photodiode will then be limited by a relatively large forward turn-on voltage, which might or might not be permitted by specific applications.
The barrier region may have a band gap greater than the p-type mesa and/or the bather region may have a band gap greater than the intrinsic region. The band gap may be at least 100meV, at least 200meV, at least 400meV, and/or no more than 800meV higher than the intrinsic region.
The intrinsic region may be comprised of III-V semiconductors. In some embodiments suitable group III elements may include, but are not limited to, any one or more of the following: aluminium, gallium and/or indium. In some embodiments suitable group V elements may include, but are not limited to, any one or more of the following: nitrogen, phosphorus, arsenic and/or antimony. The intrinsic region may be comprised of Im,Ga(i_x)As. The intrinsic region may be comprised of Ino.53Gao.47As.
The intrinsic region being comprised of 111-V semiconductors can achieve several advantages, in particular it allows the bandgap and lattice constant of the photodiode to be selected for the desired application. Furthermore, Ino 53Gao 47As has several advantages, in particular it has a band gap which is conducive to the operating wavelengths of optical telecommunication networks whilst also being lattice matched to InP a commonly available substrate.
The n-type region may be comprised of III-V semiconductors. In some embodiments suitable group III elements may include, but are not limited to, any one or more of the following: aluminium, gallium and/or indium. In some embodiments suitable group V elements may include, but are not limited to, any one or more of the following: nitrogen, phosphorus, arsenic and/or antimony. The n-type region may be comprised of Im1Ga(1_,,As. The n-type region may be comprised of In0.536a0.47As.
The n-type region being comprised of III-V semiconductors can achieve several advantages, in particular it allows the bandgap and lattice constant of the semiconductor
S
to the selected for the desired application. Furthermore, Ina 53Gau 4-,As has several advantages, in particular it has a band gap which is conducive to the operating wavelengths of optical telecommunication networks and is lattice matched to InP a commonly available substrate The p-type mesa may be comprised of III-V semiconductors. In some embodiments suitable group III elements may include, but are not limited to, any one or more of the following: aluminium, gallium and/or indium. In some embodiments suitable group V elements may include, but are not limited to, any one or more of the following: nitrogen, phosphorus, arsenic and/or antimony. The p-type mesa may be comprised of InxGa(1,0As. The p-type mesa may be comprised of Ina53Gaa47As.
The p-type mesa being comprised of III-V semiconductors can achieve several advantages, in particular it allows the bandgap and lattice constant of the semiconductor to the selected for the desired application. Furthermore, Ino 53Gao 47As has several advantages, in particular it has a band gap which is conducive to the operating wavelengths of optical telecommunication networks and is lattice matched to InP a commonly available substrate.
The photodiode may be arranged on a substrate. The substrate may be a III-V semiconductor. In some embodiments suitable group HI elements may include, but are not limited to, any one or more of the following: aluminium, gallium and/or indium. In some embodiments suitable group V elements may include, but are not limited to, any one or more of the following: nitrogen, phosphorus, arsenic and/or antimony. The substrate may be any suitable commercially available substrate, for example, In P, InAs, InSb, GaP, GaAs, GaSb or Si The substrate may be conducting InP. The substrate may be semi-insulating InP.
The provision of a semi-insulating InP substrate can achieve certain advantages, InP is a well-developed, cost effective material easily integrated into optoelectronic systems. It also provides a lattice constant to which a range of materials, with a range of desirable bandgaps suitable for optoelectronic telecommunication network applications, that are lattice matched The barrier region may be lattice matched to the substrate. Lattice matching the barrier region is advantageous as it improves the crystal quality and therefore improves the photodiode characteristics.
The n-type region may be lattice matched to the substrate. Lattice matching the n-type region is advantageous as it improves the crystal quality and therefore improves the photodiode characteristics.
The p-type mesa may be lattice matched to the substrate. Lattice matching the p-type mesa is advantageous as it improves the crystal quality and therefore improves the photodiode characteristics.
The intrinsic region may be lattice matched to the substrate. Lattice matching the intrinsic region is advantageous as it improves the crystal quality and therefore improves the photodiode characteristics. The intrinsic region may be arranged between the barrier region and the n-type region.
The barrier region and intrinsic region may comprise a second mesa on the n-type region. The lateral extent of second mesa may be sufficient to have a bond pad arranged on top of the second mesa.
The provision of the photodiode in a mesa package can achieve certain advantages. In particular mesa devices have lower capacitance than planar devices, allowing for higher frequency applications.
The photodiode may comprise a p-type contact. The p-type contact may be arranged on the p-type mesa. The p-type contact may be connected to the p-type mesa. The p-type contact may extend laterally beyond the p-type mesa. The lateral extension of the p-type contact may form a bond pad. The p-type contact may be isolated from the n-type region and/or the intrinsic region and/or the barrier region by a dielectric. In some embodiments suitable dielectrics may include, but are not limited to, any one or more of the following: BCB, SUS, SiO, SiN, or SiON. The p-type contact may be annular in shape. The annular p-type contact may be arranged on the perimeter of the upper surface of the p-type mesa. The inner edge of the annular p-type contact may define an optical window.
The p-type contact and bond pad may not extend beyond the lateral edge of the second mesa.
Arranging the p-type contact and bond pad entirely on top of the mesa can achieve certain advantages. In particular, the amount of parasitic capacitance is reduced 5 when compared to a p-type contact and bond pad where the bond pad extends beyond the mesa.
The photodiode may comprise an n-type contact. The n-type contact may be connected to the n-type region. The n-type contact may be arranged laterally to the base of the second mesa. The n-type contact may be isolated from the p-type mesa and/or the intrinsic region and/or the barrier region by a dielectric. In some embodiments suitable dielectrics may include, but are not limited to, any one or more of the following: BCB, SU8, SiO, SiN or SiON. The n-type contact may be annular and extend at least partially around the second mesa. The n-type contact may extend laterally away from the second mesa to form a bond pad.
The n-type contact and the p-type contact may be laterally separated so as to isolate the sidewall from the effective pn junction in the barrier. The n-type contact and p-type contact may be separated laterally by no less than 10 p.m The n-type contact and p-type contact may be separated laterally by no less than 20 pm The n-type contact and p-type contact may be separated laterally by between 10 pm and 50 pm. In one embodiment the n-type contact and the p-type contact may be separated laterally by 14 pm. In another embodiment the n-type contact and the p-type contact may be separated laterally by 22 pm. In a further embodiment the n-type contact and the p-type contact may be separated laterally by 28 p.m The photodiode may be operable with fibreoptic telecommunication networks.
The photodiode may be operable in a wavelength range of 1.3 pm to 1.6pm.
The photodiode may be an avalanche photodiode further comprising a charge control layer and multiplication layer. The photodiode may comprise a etch stop layer. The photodiode may comprise a cladding layer. The photodiode may comprise a lower grading layer. The photodiode may comprise an upper grading layer.
According to a second aspect of the invention, there is provided a method of manufacturing a photodiode, the method comprising: providing an epitaxial assembly comprising a p-type region, an intrinsic region, an undoped bather region and an n-type region, wherein the barrier region is arranged between the intrinsic region and the p-type region; and etching the p-type region to form a p-type mesa such that the p-type mesa has a lesser lateral extent than the remainder of the assembly.
The method of the second aspect of the invention can incorporate any/all features of the first aspect of the invention.
The method may include the additional step of etching a second mesa from the barrier region to the n-type region wherein the second mesa has a greater lateral extent than the p-type mesa.
The method may include the additional step of applying a dielectric layer to the assembly. The dielectric may contain a window located on the p-type mesa. The dielectric may contain a trench arranged laterally of the second mesa, extending down to the n-type region.
The method may include the additional step of depositing a p-type contact on top of the second mesa.
The method may include the additional step of depositing an n-type contact in the trench in the dielectric. The method may include the additional step of depositing an n-type contact on the reverse side of the substrate.
According to a third aspect of the invention there is provided a fibreoptic telecommunications network comprising one or more photodiodes according to the first aspect of the invention and/or one or more photodiodes manufactured according to the second aspect of the invention.
Detailed Description of the Invention
In order that the invention may be more clearly understood one or more embodiments thereof will now be described, by way of example only, with reference to the accompanying drawings, of which: Figure 1 is a schematic drawing of the cross section of a prior art mesa photodiode; Figure 2 Figure 3 Figure 4 Figure 5 l0 Figure 6 Figure 7 is a schematic drawing of the cross section of a prior art planar photodiode; is a schematic drawing of the layer composition of a photodiode according to the present invention; is a schematic drawing of the cross section of a photodiode according to the present invention of Figure 3; is a schematic drawing of the layer composition of a photodiode according to an alternate embodiment of the invention; is a schematic drawing of the cross section of the photodiode of figure 5; is a top down perspective view of the photodiode of figures 5 and 6.
With reference to figure 1 a mesa type photodiode 100 as found in the prior art is illustrated. The mesa type photodiode 100 is comprised of a substrate 101 such as InP. Onto the substrate 101 is deposited an n-type contact layer 102, followed by an undoped absorption layer 103 onto which a p-type barrier layer 104 is deposited and capped with a p-type contact layer. The composition of the individual layers can be selected from suitable semiconductor materials to give the desired properties, such as bandgap which will determine the wavelengths of light the photodiode 100 is sensitive to. The resultant epitaxial material is processed such that the epilayers are selectively etched away leaving a truncated cone which forms a mesa 113, the mesa 113 extends from the n-type contact layer 102 to the p-type contact layer 105. Passivation 110 is selectively applied to the mesa 113, covering the sidewalls 115 and top of the mesa 113 but leaving an optical window 114 for light to shine on the photodiode 100. Gold or similar contact metal is also selectively deposited forming an n-type bottom contact 107 and a p-type top contact 106. The n-type bottom contact 107 is connected to the n-type layer. The p-type top contact 106 is in contact with the p-type layer 105 and extends laterally away from the mesa, the end of the p-type top contact 106 distal from the top of the mesa 113 forms a bonding pad 109 for connection to a wire (not shown). A pn junction 111 is formed between the p-type barrier layer 104 and the undoped absorption layer 103, the pn junction 111 extends to the sidewalls 115 at point 112. The sidewalls 115 are discontinuities in the structure of the semiconductor material, which along with contaminants and free bonds, cause unwanted electrical characteristics. When the pn junction 111 interacts with the sidewalls the High Temperature Operating Lifetime (HTOL) is adversely affected, a long HTOL is a key performance indicator specified by telecommunications operators.
In order to achieve sufficiently long HTOLs an alternate photodiode design has been implemented. These are known as planar photodiodes 200 and figure 2 illustrates an example of one such device.
A suitable substrate 201 is selected onto which an n-type buffer layer 202, n-type absorption layer 203 and lightly doped n-type top layer 204 are deposited in turn. The resultant epitaxial material is masked with Si3N4 208, windows 210 are left in the silicon nitride related to where the active layer is in each device. Zinc is then diffused into the uncapped regions of the lightly doped n-type top layer 204 which become a p-type doped region 205. This produces a pn junction 206 embedded in the planar photodiode 200 and not exposed to any sidewalls, thus planar photodiodes 200 are able to pass HTOL testing. However, to ensure the isolation of the pn junction the device must be made with a larger area than a mesa type photodiode and as such the capacitance of the device is higher. Higher capacitance reduces the speed at which the device can operate, a disadvantage when high data rates are desired Figure 3 shows the layer composition of the epitaxial material of a photodiode 1 comprising a substrate 2. Arranged adjacent to and in contact with the substrate 2 is an n-type contact layer 3. Adjacent to the n-type contact layer 3 on the opposing side to the inP substrate 2 there is provided an intrinsic absorption layer 4. Adjacent to the absorption layer 4 on the opposing side to the n-type contact layer 3 is a barrier layer 5. Arranged adjacent to the barrier layer 5 on the opposing side to the absorption layer 4 is a p-type layer 6.
Using appropriate masks, and etching and deposition techniques known to the art the epitaxial material can be selectively etched and coated so as to achieve a mesa type photodiode 10 as illustrated in figure 4. Ii
After applying an etch resistant mask, the p-type layer 6 is selectively etched down to the barrier layer 5 thereby forming a p-type mesa 11 with a diameter of say 54m. A second etch resistant mask is applied and the epitaxial material etched such that a second mesa is formed extending from the barrier layer 5 down to the n-type contact layer 3 with a diameter of say 80ftm. The surface of the photodiode is then passivated using standard passivation techniques including, for example, BCB, SU8 SiO or SiN.
The mesa is coated with a suitable dielectric 13, a trench 14 displaced laterally from the mesa 10 is left in the dielectric 13 extending down to the n-type contact layer 3. A circular window 15 is also left in the dielectric on top of the p-type mesa H, forming an optical window 21.
An n-type contact 16 is provided in the trench 14 in the dielectric, the n-type contact 16 is formed of gold or a similar conductor. The n-type contact is attached to the n-type contact layer 3 and extends vertically up the trench 14, the end of the n-type contact 16 distal to the n-type contact layer 3 is formed into an n-type bond pad 20, extending laterally away from the mesa 10 and arranged on top of the dielectric 13.
A p-type contact 17 is formed on the p-type mesa 11 on the surface distal from the barrier layer 5, the p-type contact 17 is annular is shape and is arranged around the perimeter of the p-type mesa 11, the interior of the ring corresponding to the optical window 21. The p-type contact 17 is formed of gold or a similar conductor. A contact strip 18 of the contact material extends away from p-type contact 17 in the direction diametrically opposed to the n-type contact 16. The contact strip 18 is arranged on the dielectric 13 and extends beyond the mesa 10 to a p-type bond pad 19.
In one example embodiment the substrate 2 is comprised of semi-insulating InP.
The n-type contact layer 3 is comprised of Ino53Gao47As 500nm thick and doped with silicon such that the carrier concentration is of the order 1x1Pcm-3. The intrinsic absorption layer 4 is 1.5 rim thick and comprised of undoped lno slGao.47As. The barrier layer 5 is 100nm thick and comprised of comprised of undoped Alo 481no52As. The p-type mesa 11 is comprised of Ino.510a01,As, is 150nm thick and is doped with beryllium such that the carrier concentration is of the order of lx1Owcm'.
One skilled in the art will recognise that the above compositions are given as an example only, they will appreciate that, for example, different III-V materials could be used to change the band gap of the material to allow detection at different wavelengths. Different substrates could be used to maintain lattice matching for different III-V materials. They will also recognise that layer thicknesses can be adjusted, for example increasing the thickness of the absorption layer 4 to increase the light absorption.
In operation the mesa type photodiode 1 is connected to a suitable circuit (not shown) which provides a bias voltage and measures the current, the circuit is connected to the mesa type photodiode 1 via the p-type 19 and n-type 20 bond pads.
A light source, for example, a telecommunications laser operating at 1.55 pm is directed at the optical window 21. Carrier pairs are generated in the absorption layer 4, and migrate due to the applied bias. Because the barrier layer 5 is undoped, it has a relatively high resistance, which means the carriers are in effect constrained from moving laterally across the barrier layer. As such carriers in the barrier layer 5 are confined to a region 23 within the barrier layer 5 which corresponds to the interface with the p-type contact layer 6 and extending downward into the absorption layer 4. The region 23 within the barrier layer 5 extends laterally beyond the interface between the barrier layer 5 and p-type contact layer 6 by approximately 1.2 pm.
As the free carriers are restricted in the barrier layer 5 to the region 23 defined by the p-type mesa 11, which is itself arranged away from the sidewalls 12 of the mesa 10, an effective pn junction 24 is formed at the interface of the barrier layer 5 and the absorption layer 4. The effective pn junction 24 is isolated from the sidewalls 12 thereby avoiding detrimental effects from surface states effecting the pn junction.
With reference to figures 5 to 7 a further example embodiment is illustrated. In this embodiment the photodiode is an avalanche photodiode 50 The avalanche photodiode comprises a substrate 51. Arranged on the substrate 51 is an n-type contact layer 52, embedded in the n-type contact layer 52 is an etch stop layer 53. Arranged on top of the n-type contact layer 52 is a cladding layer 54 Arranged on top of the cladding layer 54 is a multiplication layer 55 Arranged on top of the multiplication layer 55 is a charge control layer 56. Arranged on top of the charge control layer 56 is a lower grading layer 57. Arranged on top of the lower grading layer 57 is an absorption layer 58. Arranged on top of the absorption layer 58 is an upper grading layer 59. Arranged on top of the upper grading layer is a barrier layer 60. Arranged on top of the barrier layer 60 is a p-type contact layer 61.
Using appropriate masks, and etching and deposition techniques known to the art the epitaxial material can be selectively etched and coated so as to achieve a mesa type photodiode 50 as illustrated in figure 6.
After applying an etch resistant mask the p-type layer 61 is selectively etched down to the barrier layer 60 thereby forming a p-type mesa 63 with a diameter of say 50pm. A second etch resistant mask is applied and the epitaxial material etched such that a second mesa is formed extending from the barrier layer 60 down to the etch stop layer 53. The surface of the photodiode is then passivated using BCB, SU8, SiN or SiO or similar materials, The mesa is coated with a suitable dielectric 64, a trench 65 displaced laterally from the mesa 67 is left in the dielectric 13 extending down to the n-type contact layer 52. A circular window 66 is also left in the dielectric 64 on top of the p-type mesa 63, to act as an optical window 75.
An n-type contact 68 is provided in the trench 65 in the dielectric 64, the n-type contact 68 is formed of gold or similar conductor. The n-type contact 68 is attached to the n-type contact layer 52 and extends vertically up the trench 65, the end of the n-type contact 68 distal to the n-type contact layer 52 is formed into an n-type bond pad 69, extending laterally away from the mesa 67 and arranged on top of the dielectric 64.
A p-type contact 70 is formed on the p-type mesa 63 on the surface distal from the barrier layer 60, the p-type contact 70 is annular is shape and is arranged around the perimeter of the p-type mesa 63, the interior of the ring corresponding to the optical window 75. The p-type contact 70 is comprised of a contact material 76, for example, gold or similar conductor. A contact strip 71 is comprised of the contact material 76 and extends away from p-type contact 70 in the direction diametrically opposed to the n-type contact 68. The contact strip '71 and a p-type bond pad 72 are arranged on the dielectric 64 and p-type bond pad is arranged on top of the mesa.
In one particular embodiment the substrate 51 is comprised of semi-insulating InP. The n-type contact layer 52 is comprised of 500 nm of In0.536a0.47As lattice matched to the substrate 51, it is doped with silicon to give a carrier concentration of lx1019cm3. The etch stop layer 53 is comprised of 50 nm of InP doped so as to give a carrier concentration of 1x10"cm'ii. The etch stop layer 53 is arranged with 100 nm of the n-type contact 52 between it and the substrate 51 and 400nm between it and the cladding layer 54. The cladding layer 54 is comprised of 200 nm of A10.481n0.52As lattice matched to the substrate 51, the layer is doped with silicon to give a carrier concentration of 2x1018cm3. The multiplication layer 55 is comprised of 200 nm of undoped A10.481n0.52As. The charge control layer 56 is comprised of 50 nm of 4gIno.52As doped with beryllium to give a carrier concentration that achieves a breakdown voltage of between 28 V and 35 V. The lower grading layer 57 lattice matched to the substrate 51 and is comprised of 50 nm of undoped A1022Ga0.251n0.52As.
The absorption layer 58 is lattice matched to the substrate 51 and is comprised of 1500 nm of undoped In0.53Gao.47As. The upper grading layer 59 is lattice matched to the substrate 51 and is comprised of 50 nm of undoped A6276a0.751n0.52As. The barrier layer 60 is lattice matched to the substrate 51 and is comprised of 100 nm of undoped Alo 4gIno 57As. The p-type contact 61 is lattice matched to the substrate 51 and is comprised of 150 nm of Ino.53Ga0.47As doped with beryllium, the lower 100 nm having a carrier concentration of lx1019cm-5 and the top 50 nm having a carrier concentration of 2x10 I9cmi3 One skilled in the art will recognise that the above compositions are given as an example only, they will appreciate that, for example, different III-V materials could be used to change the band gap of the material to allow detection at different wavelengths. Different substrates could be used to maintain lattice matching for different III-V materials. They will also recognise that the doping of the charge control layer 56 could be varied to achieve different breakdown voltages.
IS
In operation the mesa type photodiode 50 is connected to a suitable circuit (not shown) which provides a bias voltage and measures the current, the circuit is connected to the mesa type photodiode 50 via the p-type 72 and n-type 69 bond pads.
Light from, for example, a telecommunications laser operating at 1.55 p.m is directed at the optical window 75. Carrier pairs are generated in the absorption layer 58, and are accelerated due to the applied bias, the device operating in the standard way for an avalanche photodiode. Because the barrier layer 60 is undoped, it has a relatively high resistance, which means the carriers are in effect constrained from moving laterally across the barrier layer 60. As such carriers in the barrier layer 60 are confined to a region 74 within the barrier layer 60 which corresponds to the interface with the p-type contact layer 61 and extending downward into the absorption layer 58. The region 74 within the barrier layer 60 extends laterally beyond the interface between the barrier layer 60 and p-type contact layer 61 by approximately 1.2 pm.
As the free carriers are restricted in the barrier layer 60 to the region 74 defined by the p-type mesa 63, which is itself arranged away from the sidewalls 62 of the mesa 67, an effective pn junction 73 is formed at the interface of the upper grading layer 59 and the absorption layer 58. The effective pn junction 73 is isolated from the sidew-alls 62 thereby avoiding detrimental effects from surface states effecting the pn junction.
In a further embodiment the epitaxial material of the first embodiment, as illustrated in figure 3, can be processed in an alternate way.
Using appropriate masks, and etching and deposition techniques known to the art the epitaxial material can be selectively etched and coated so as to achieve a mesa type photodiode 80 as illustrated in figure 8.
After applying an etch resistant mask, the epitaxial material is selectively etched down to the n-type contact layer 3 thereby forming a mesa 84 with a diameter of say 80p.m. A further etching process etches from the n-type contact layer 3 to the substrate 2, thereby electrically isolating the individual mesas. The surface of the photodiode is coated with a suitable dielectric 81, leaving a circular window in the top of the mesa forming an optical window 82 An n-type contact 83, formed of gold or similar conductor, is provided adjacent to the mesa 84 and arranged on the n-type contact layer 3 A p-type contact 85, formed of gold or similar conductor, is formed on the top of the mesa 84, arranged around and slightly radially in of the optical window 82 such that the p-type contact 85 is in contact with the p-type layer 6. A contact strip 86 formed of the gold or similar conductor of the p-type contact 85 extends laterally from the p-type contact 85, off the top of the mesa 84 in a direction opposite to that of the n-type contact 83. The contact strip 86 is separated from the mesa 84 by the dielectric 81 Adjacent to the mesa 84 on the side opposite to the n-type contact 83 a p-type bond pad 87 is formed which is connected to the contact strip 86.
In one example embodiment the substrate 2 is comprised of semi-insulating InP. The n-type contact layer 3 is comprised of Ino 53Gao 4-As 500nm thick and doped with silicon such that the carrier concentration is of the order 1 x1019cm". The intrinsic absorption layer 4 is 1.5 gm thick and comprised of undoped Ino slGao 47A s The barrier layer 5 is 100nm thick and comprised of comprised of undoped Alo 48Ino 52As. The p-type mesa 11 is comprised of Ino.53Gao 4-As, is 150nm thick and is doped with beryllium such that the carrier concentration is of the order of 1x10"cm3.
One skilled in the art will recognise that the above compositions are given as an example only, they will appreciate that, for example, different 111-V materials could be used to change the band gap of the material to allow detection at different wavelengths.
Different substrates could be used to maintain lattice matching for different III-V materials. They will also recognise that layer thicknesses can be adjusted, for example increasing the thickness of the absorption layer 4 to increase the light absorption.
In operation the mesa type photodiode 80 is connected to a suitable circuit (not shown) which provides a bias voltage and measures the current, the circuit is connected to the mesa type photodiode 80 via the p-type bond pad 87 and n-type contact 83.
A light source, for example, a telecommunications laser operating at 1.55 ttm is directed at the optical window 82. Carrier pairs are generated in the absorption layer 4, arid migrate due to the applied bias Device performance is improved over mesa diodes with doped barriers (such as those found in the prior art) as a fraction of the applied voltage is dropped across the barrier region 5 and hence less voltage is drop is found at the sidewalls 88 which results in improved HTOL performance The one or more embodiments are described above by way of example only. Many variations are possible without departing from the scope of protection afforded by the appended claims.

Claims (2)

  1. CLAIMSA photodiode comprising at least a p-type region, an intrinsic region, an undoped barrier region and an n-type region; wherein the barrier is arranged between the intrinsic region and the p-type region.
  2. 2. A photodiode according to claim I wherein the undoped barrier region has a carrier concentration of no more than lx1015 cm-3 A photodiode according to any preceding claim wherein the p-type region is formed as a p-type mesa extending laterally less than the of the rest of the photodiode 4. A photodiode according to claim 3 wherein the p-type mesa extends laterally less than the barrier region to the extent that carriers are isolated from the lateral edge of the barrier region.5. A photodiode according to claim 3 or 4 wherein the remainder of the device is formed as a second mesa extending from the barrier region to the n-type region and having a greater lateral extent than the p-type mesa A photodiode according to claim 5 wherein the lateral extent of the second mesa is sufficient to have a bond pad arranged on top of the second mesa.A photodiode according to any preceding claim wherein the barrier region is comprised of III-V semiconductors 8. A photodiode according to any preceding claim wherein the barrier region is comprised of a ternary III-V semiconductor.A photodiode according to any preceding claim wherein the barrier region is comprised of Alo4gInos2As A photodiode according to any preceding claim wherein the barrier region is at least 100nm thick, at least 150nm thick or at least 200nm thick, and wherein the bather region is no more than 800nm thick.11. A photodiode according to any preceding claim wherein the barrier region has a band gap at least 100meV greater than the adjacent layers and up to 800meV greater than the adjacent layers.12. A photodiode according to any preceding claim wherein the intrinsic region is comprised of III-V semiconductors.13 A photodiode according to any preceding claim wherein the intrinsic region is comprised of Ino 53Gau 47As 14. A photodiode according to any preceding claim wherein the photodiode is arranged on a substrate 15. A photodiode according to claim 14 wherein the substrate is proximate to the n-type end of the device and distal from the p-type end.16. A photodiode according to claim 14 or 15 wherein the photodiode is lattice matched to the substrate.17. A photodiode according to any preceding claim wherein the photodiode comprises a p-type contact and p-type bond pad, wherein the p-type contact is connected to the p-type mesa and to the p-type bond pad; and wherein the p-type bond pad is arranged on a dielectric and does not extend beyond the lateral edge of the second mesa.18. A photodiode according to any preceding claim wherein the photodiode is an avalanche photodiode.19. A method of manufacturing a photodiode, the method comprising: providing an epitaxial assembly comprising a p-type region, an intrinsic region, an undoped barrier region and an n-type region, wherein the barrier region is arranged between the intrinsic region and the p-type region.20. A method according to claim 19 wherein the photodiode further comprises any or all of the features of claims Ito 18.21. A method according to claim 19 including the further step of etching the p-type region to form a p-type mesa such that the p-type mesa has a lesser lateral extent than the remainder of the assembly.22. A method of manufacturing a photodiode according to claim 21 including the further step of etching a second mesa from the barrier region to the n-type region wherein the second mesa has a greater lateral extent than the p-type mesa 23. A method according to any of claims 19 to 22 including the further step of depositing a dielectric on the assembly.24. A method according to claims 22 or 23 including the further step of depositing a p-type bond pad on the second mesa 25. A fibreoptic telecommunication network comprising one or more photodiodes according to any of claims 1 to 18 and/or one or more photodiodes manufactured according to any of claims 19 to 24.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021104471B4 (en) 2020-03-25 2023-10-12 Globalfoundries U.S. Inc. PHOTODETECTORS WITH ADJUSTED ANODE-CATHODE PAIRS
EP4358158A1 (en) * 2022-10-18 2024-04-24 Viavi Solutions Inc. Photodiode semiconductor stacks with reduced recovery times

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070249109A1 (en) * 2006-04-20 2007-10-25 Hiroyuki Kamiyama Optical device and optical module
US20080290369A1 (en) * 2007-05-22 2008-11-27 Mitsubishi Electric Corporation Semiconductor light-receiving device and manufacturing method thereof
WO2010035508A1 (en) * 2008-09-29 2010-04-01 日本電気株式会社 Semiconductor photoreceptor element and manufacturing method therefor
JP2013207240A (en) * 2012-03-29 2013-10-07 Asahi Kasei Electronics Co Ltd Infrared-ray sensor array

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070249109A1 (en) * 2006-04-20 2007-10-25 Hiroyuki Kamiyama Optical device and optical module
US20080290369A1 (en) * 2007-05-22 2008-11-27 Mitsubishi Electric Corporation Semiconductor light-receiving device and manufacturing method thereof
WO2010035508A1 (en) * 2008-09-29 2010-04-01 日本電気株式会社 Semiconductor photoreceptor element and manufacturing method therefor
JP2013207240A (en) * 2012-03-29 2013-10-07 Asahi Kasei Electronics Co Ltd Infrared-ray sensor array

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
C.P. SKRIMSHIRE ET AL.: "Reliability of mesa and planar InGaAs PIN photodiodes", IEE PROCEEDINGS J - OPTOELECTRONICS, vol. 137, no. 1, February 1990 (1990-02-01), pages 74 - 78, XP000095897

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102021104471B4 (en) 2020-03-25 2023-10-12 Globalfoundries U.S. Inc. PHOTODETECTORS WITH ADJUSTED ANODE-CATHODE PAIRS
EP4358158A1 (en) * 2022-10-18 2024-04-24 Viavi Solutions Inc. Photodiode semiconductor stacks with reduced recovery times

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