GB2585803A - Electro-absorption modulator - Google Patents
Electro-absorption modulator Download PDFInfo
- Publication number
- GB2585803A GB2585803A GB2015215.3A GB202015215A GB2585803A GB 2585803 A GB2585803 A GB 2585803A GB 202015215 A GB202015215 A GB 202015215A GB 2585803 A GB2585803 A GB 2585803A
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- Prior art keywords
- layer
- silicon
- waveguide
- box
- doped region
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/015—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
- G02F1/017—Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
- G02F1/01708—Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells in an optical wavequide structure
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/015—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction
- G02F1/025—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements with at least one potential jump barrier, e.g. PN, PIN junction in an optical waveguide structure
Abstract
An optoelectronic device comprising: a silicon-on-insulator (SOI) substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; a waveguide region, where a portion of the silicon device layer and a portion of the BOX layer underneath the portion of the device layer have been removed, the portion of the BOX layer having been replaced with a layer of silicon and a layer of crystalline oxide on top of the silicon; and a waveguide structure located directly on top of the crystalline oxide layer, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in-between, creating a PIN junction across which a bias can be applied to create a modulation region.
Claims (36)
1. An electro-absorption modulator (EAM), the EAM comprising: a silicon-on-insulator (SOI) substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; a waveguide region, where a portion of the silicon device layer and a portion of the BOX layer underneath the portion of the device layer have been removed, the portion of the BOX layer having been replaced with a layer of silicon and a layer of crystalline oxide on top of the silicon; and a waveguide structure located directly on top of the crystalline oxide layer, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in-between, creating a PIN junction across which a bias can be applied to create a modulation region.
2. The EAM of claim 1 , wherein the waveguide structure is made of one or more of the following materials: SiGeSn, SiGe, InGaAs, AllnGaAs and InGaAsP.
3. The EAM of claim 1 or claim 2, wherein the crystalline oxide layer has a thickness of 20nm-400nm.
4. The EAM of any one of claims 1 to 3, wherein the silicon support layer is Si(111), and the replacement silicon layer is Si(111).
5. The EAM of any one of the preceding claims, wherein the waveguide structure is a rib waveguide which comprises: a waveguide ridge on a slab, with a first slab portion on a first side of the ridge, and a second slab portion on a second side of the ridge; and wherein the waveguide ridge, first slab portion and second slab portion are all formed of the same material as one another.
6. The EAM of claim 5, wherein the P doped region is located at the first slab and the N doped region is located at the second slab.
7. The EAM of claim 6, wherein the P doped region extends into a first sidewall of the ridge and/or wherein the N doped region extends into a second sidewall of the ridge.
8. The EAM of claim 6 or claim 7, further comprising a first metal contact at the first slab, in electrical connection with the P doped region and a second metal contact at the second slab portion, in electrical connection with the N doped region.
9. The EAM of any one of the preceding claims, wherein the SOI substrate is a 3pm SOI platform.
10. The EAM of claim 1 , wherein the waveguide structure is made of one or more of the following materials: SiGe multiple quantum well (SiGe MOW), AllnGaAs MOW, InGaAsP MOW and InGaNAs MOW.
11. The EAM of claim 10, wherein the SOI substrate is a 1 pm SOI platform.
12. A method of fabricating an electro-absorption modulator (EAM), the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; etching through a portion of the silicon device layer and the BOX layer to create a cavity in the substrate which exposes a portion of the silicon support layer; epitaxially growing a replacement layer of silicon on top of the exposed portion of the silicon support layer; epitaxially growing a layer of crystalline oxide on top of the replacement layer of silicon, the replacement layer of silicon and the crystalline oxide layer replacing the portion of the BOX layer that had been etched away; epitaxially growing a layer of a first material on top of the crystalline oxide layer; and fabricating a waveguide structure within the layer of the first material, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in- between, creating a PIN junction across which a bias can be applied to function as a modulation region.
13. The method of claim 12, wherein the first material is one or more of the following materials: SiGeSn, SiGe, InGaAs, AllnGaAs, InGaAsP, SiGe multiple quantum well (SiGe MQW), AllnGaAs MQW InGaAsP MQW and InGaNAs MQW.
14. The method of claim 12 or claim 13, wherein the step of fabricating the waveguide structure comprises: etching the first material layer to form a rib waveguide of the first material, the rib waveguide including a ridge on a slab, the slab comprising a first slab portion on a first side of the ridge, and a second slab portion on a second side of the ridge.
15. The method of claim 14, wherein the P doped region is located at the first slab portion and the N doped region is located at the second slab portion.
16. The method of claim 15, wherein the P doped region extends into a first sidewall of the ridge and/or wherein the N doped region extends into a second sidewall of the ridge.
17. The method of any one of claims 12 to 16, wherein the silicon support layer is Si(111); and replacement silicon is Si(111).
18. An optoelectronic device, the optoelectronic device comprising: a silicon-on-insulator (SOI) substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; a waveguide region, where a portion of the silicon device layer and a portion of the BOX layer underneath the portion of the device layer have been removed, the portion of the BOX layer having been replaced with a layer of silicon and a layer of crystalline oxide on top of the silicon; and a waveguide structure located directly on top of the crystalline oxide layer, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in-between, creating a PIN junction across which a bias can be applied to create a modulation region.
19. The optoelectronic device of claim 18, wherein the optoelectronic device is an EAM or a laser, or a photodetector
20. The optoelectronic device of claim 18 or claim 19, wherein the waveguide device is an AllnGaAs MQW waveguide structure
21. The optoelectronic device of claim 18, wherein the waveguide device is an InGaNAs MQW waveguide structure
22. A method of fabricating an optoelectronic device, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; etching through a portion of the silicon device layer and the BOX layer to create a cavity in the substrate which exposes a portion of the silicon support layer; epitaxially growing a replacement layer of silicon on top of the exposed portion of the silicon support layer; epitaxially growing a layer of crystalline oxide on top of the replacement layer of silicon, the replacement layer of silicon and the crystalline oxide layer replacing the portion of the BOX layer that had been etched away; epitaxially growing a layer of a first material on top of the crystalline oxide layer; and fabricating a waveguide structure within the layer of the first material, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in- between, creating a PIN junction across which a bias can be applied to function as a modulation region.
23. An electro-absorption modulator, EAM, the EAM comprising: a silicon-on-insulator, SOI, substrate comprising: a silicon support layer; a buried oxide, BOX, layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; a waveguide region, where a portion of the silicon device layer, a portion of the BOX layer underneath the portion of the device layer, and a portion of the silicon support layer underneath the portion of the BOX layer have been removed, at least a part of the portion of the silicon support layer having been replaced with a layer of crystalline oxide on top of the remaining silicon support layer; and a waveguide structure located directly on top of the crystalline oxide layer, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in-between, creating a PIN junction across which a bias can be applied to create a modulation region.
24. The electro-absorption modulator of claim 23, wherein the portion of the silicon support layer and at least a part of the portion of the BOX layer has been replaced with a layer of crystalline oxide.
25. The electro-absorption modulator of either claim 23 or claim 24, wherein a passive waveguide, provided in the silicon device layer and adjacent to the waveguide region, is coupled to the waveguide region by a bridge-waveguide.
26. The electro-absorption modulator of claim 25, wherein the bridge-waveguide comprises a lined channel filled with a filling material with a refractive index similar to that of a material forming a sidewall adjacent to the bridge-waveguide.
27. The electro-absorption modulator of claim 26, wherein the liner is formed of silicon nitride.
28. The electro-absorption modulator of either claim 26 or claim 27, wherein a lowermost surface of the sidewalls of the channel and a top surface of a portion of the liner located in the base of the channel are aligned with a top surface of the buried oxide layer.
29. The electro-absorption modulator of any of claims 26 to 28, wherein the liner has a thickness of at least 200 nm and no more than 280 nm.
30. The electro-absorption modulator of any of claims 26 to 29, wherein the filling material is amorphous silicon.
31. The electro-absorption modulator of any of claims 23 to 30, wherein the waveguide structure is formed of plural layers, at least one being formed from indium phosphide.
32. A method of fabricating an electro-absorption modulator, EAM, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide, BOX, layer on top of the silicon support layer, and a silicon device layer on top of the BOX layer; etching through a portion of the silicon device layer, the BOX layer, and the silicon support layer, to create a cavity in the substrate which exposes a portion of the silicon support layer; epitaxially growing a layer of crystalline oxide, on top of the exposed portion of the silicon support layer, the crystalline oxide layer replacing a part of the portion of the silicon support layer which had been etched away; epitaxially growing a layer of a first material on top of the crystalline oxide layer; and fabricating a waveguide structure within the layer of the first material, the waveguide structure including a P doped region, and an N doped region with an intrinsic region in- between, creating a PIN junction across which a bias can be applied to function as a modulation region.
33. The method of claim 32, wherein the step of fabricating the waveguide structure includes the sub-steps of: etching one or more channels adjacent to the first material, thereby removing any edge defects thereof; lining the one or more channels with a liner to provide a lined channel; and filling the lined channel with a filling material which has a refractive index which is similar to that of a material forming a sidewall so that the filling material forms a bridge- waveguide in the channel between a passive waveguide in the silicon device layer and the waveguide structure.
34. The method of claim 33, wherein the liner is formed of silicon nitride.
35. The method of either claim 33 or claim 34, wherein the liner has a thickness of at least 200 nm and no more than 280 nm.
36. The method of any of claims 33 to 35, wherein the filling material that the lined channel is filled with comprises amorphous silicon.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201862635955P | 2018-02-27 | 2018-02-27 | |
PCT/EP2018/062269 WO2019101369A1 (en) | 2017-11-23 | 2018-05-11 | Electro-optically active device |
US201862675050P | 2018-05-22 | 2018-05-22 | |
PCT/IB2019/000188 WO2019166875A1 (en) | 2018-02-27 | 2019-02-26 | Electro-absorption modulator |
Publications (3)
Publication Number | Publication Date |
---|---|
GB202015215D0 GB202015215D0 (en) | 2020-11-11 |
GB2585803A true GB2585803A (en) | 2021-01-20 |
GB2585803B GB2585803B (en) | 2022-10-05 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2015215.3A Active GB2585803B (en) | 2018-02-27 | 2019-02-26 | Electro-absorption modulator |
Country Status (3)
Country | Link |
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CN (1) | CN112204459A (en) |
GB (1) | GB2585803B (en) |
WO (1) | WO2019166875A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11327343B2 (en) | 2018-05-15 | 2022-05-10 | Rockley Photonics Limited | Integration of photonic components on SOI platform |
US11673798B2 (en) | 2020-10-29 | 2023-06-13 | International Business Machines Corporation | Microfluidic devices with electrodes formed as physically separated sections of microchannel side walls |
CN113113839B (en) * | 2021-03-19 | 2022-05-13 | 武汉光迅科技股份有限公司 | Laser chip |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009126351A2 (en) * | 2008-01-18 | 2009-10-15 | The Regents Of The University Of California | Hybrid silicon laser-quantum well intermixing wafer bonded integration platform for advanced photonic circuits with electroabsorption modulators |
US8741725B2 (en) * | 2010-11-10 | 2014-06-03 | International Business Machines Corporation | Butted SOI junction isolation structures and devices and method of fabrication |
GB2523383B (en) * | 2014-02-24 | 2016-09-14 | Rockley Photonics Ltd | Detector remodulator |
US10231038B2 (en) * | 2014-02-24 | 2019-03-12 | Rockley Photonics Limited | Detector remodulator and optoelectronic switch |
EP3163359B1 (en) * | 2014-07-31 | 2020-04-22 | Huawei Technologies Co. Ltd. | Germanium-silicon electroabsorption modulator |
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2019
- 2019-02-26 CN CN201980028386.8A patent/CN112204459A/en active Pending
- 2019-02-26 WO PCT/IB2019/000188 patent/WO2019166875A1/en active Application Filing
- 2019-02-26 GB GB2015215.3A patent/GB2585803B/en active Active
Non-Patent Citations (3)
Title |
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FENG DAZENG ET AL, "High-Speed GeSi Electroabsorption Modulator on the SOI Waveguide Platform", IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, vol. 19, no. 6, doi:10.1109/JSTQE.2013.2278881, ISSN 1077-260X, (20131101), page 3401710, (20130927), * |
GOTTLOB H D B ET AL, "CMOS integration of epitaxial Gd"2O"3 high-k gate dielectrics", SOLID STATE ELECTRONICS, ELSEVIER SCIENCE PUBLISHERS, BARKING, GB, vol. 50, no. 6, doi:10.1016/J.SSE.2006.04.018, ISSN 0038-1101, (20060601), pages 979 - 985, (20060601), * |
H. J. OSTEN ET AL, "Introducing crystalline rare-earth oxides into Si technologies", PHYSICA STATUS SOLIDI. A: APPLICATIONS AND MATERIALS SCIENCE, DE, (20080401), vol. 205, no. 4, doi:10.1002/pssa.200723509, ISSN 1862-6300, pages 695 - 707, * |
Also Published As
Publication number | Publication date |
---|---|
WO2019166875A1 (en) | 2019-09-06 |
GB202015215D0 (en) | 2020-11-11 |
CN112204459A (en) | 2021-01-08 |
WO2019166875A8 (en) | 2020-10-22 |
GB2585803B (en) | 2022-10-05 |
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