GB2584227B - Inter-pipeline data hazard avoidance - Google Patents

Inter-pipeline data hazard avoidance Download PDF

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Publication number
GB2584227B
GB2584227B GB2012008.5A GB202012008A GB2584227B GB 2584227 B GB2584227 B GB 2584227B GB 202012008 A GB202012008 A GB 202012008A GB 2584227 B GB2584227 B GB 2584227B
Authority
GB
United Kingdom
Prior art keywords
inter
pipeline data
data hazard
hazard avoidance
avoidance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB2012008.5A
Other versions
GB202012008D0 (en
GB2584227A (en
Inventor
Iuliano Luca
Nield Simon
Foo Yoong-Chert
Mower Ollie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Imagination Technologies Ltd
Original Assignee
Imagination Technologies Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imagination Technologies Ltd filed Critical Imagination Technologies Ltd
Priority to GB2012008.5A priority Critical patent/GB2584227B/en
Priority claimed from GB1917083.6A external-priority patent/GB2576457B/en
Publication of GB202012008D0 publication Critical patent/GB202012008D0/en
Publication of GB2584227A publication Critical patent/GB2584227A/en
Application granted granted Critical
Publication of GB2584227B publication Critical patent/GB2584227B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
GB2012008.5A 2017-06-16 2017-06-16 Inter-pipeline data hazard avoidance Active GB2584227B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB2012008.5A GB2584227B (en) 2017-06-16 2017-06-16 Inter-pipeline data hazard avoidance

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB2012008.5A GB2584227B (en) 2017-06-16 2017-06-16 Inter-pipeline data hazard avoidance
GB1917083.6A GB2576457B (en) 2017-06-16 2017-06-16 Queues for inter-pipeline data hazard avoidance

Publications (3)

Publication Number Publication Date
GB202012008D0 GB202012008D0 (en) 2020-09-16
GB2584227A GB2584227A (en) 2020-11-25
GB2584227B true GB2584227B (en) 2021-06-23

Family

ID=72425343

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2012008.5A Active GB2584227B (en) 2017-06-16 2017-06-16 Inter-pipeline data hazard avoidance

Country Status (1)

Country Link
GB (1) GB2584227B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115576610B (en) * 2022-11-18 2023-03-10 北京数渡信息科技有限公司 Instruction distribution processing method and device suitable for general sequence emission processor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5961630A (en) * 1997-12-30 1999-10-05 Intel Corporation Method and apparatus for handling dynamic structural hazards and exceptions by using post-ready latency
US6065105A (en) * 1997-01-08 2000-05-16 Intel Corporation Dependency matrix
GB2447907A (en) * 2007-03-26 2008-10-01 Imagination Tech Ltd Reducing data hazards by counting the number of long-latency instructions in the thread still being processed before running the hazard instruction

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6065105A (en) * 1997-01-08 2000-05-16 Intel Corporation Dependency matrix
US5961630A (en) * 1997-12-30 1999-10-05 Intel Corporation Method and apparatus for handling dynamic structural hazards and exceptions by using post-ready latency
GB2447907A (en) * 2007-03-26 2008-10-01 Imagination Tech Ltd Reducing data hazards by counting the number of long-latency instructions in the thread still being processed before running the hazard instruction

Also Published As

Publication number Publication date
GB202012008D0 (en) 2020-09-16
GB2584227A (en) 2020-11-25

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