GB2582868B - Hardware implementation of convolution layer of deep neural network - Google Patents

Hardware implementation of convolution layer of deep neural network Download PDF

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Publication number
GB2582868B
GB2582868B GB2005436.7A GB202005436A GB2582868B GB 2582868 B GB2582868 B GB 2582868B GB 202005436 A GB202005436 A GB 202005436A GB 2582868 B GB2582868 B GB 2582868B
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Prior art keywords
neural network
deep neural
convolution layer
hardware implementation
convolution
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GB2005436.7A
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GB202005436D0 (en
GB2582868A (en
Inventor
Martin Chris
Hough David
Gibson Clifford
Barnard Daniel
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Imagination Technologies Ltd
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Imagination Technologies Ltd
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Priority to GB2005436.7A priority Critical patent/GB2582868B/en
Priority claimed from GB1718297.3A external-priority patent/GB2568086B/en
Publication of GB202005436D0 publication Critical patent/GB202005436D0/en
Publication of GB2582868A publication Critical patent/GB2582868A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/045—Combinations of networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • General Health & Medical Sciences (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Computational Linguistics (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Artificial Intelligence (AREA)
  • Neurology (AREA)
  • Complex Calculations (AREA)
GB2005436.7A 2017-11-03 2017-11-03 Hardware implementation of convolution layer of deep neural network Active GB2582868B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB2005436.7A GB2582868B (en) 2017-11-03 2017-11-03 Hardware implementation of convolution layer of deep neural network

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB2005436.7A GB2582868B (en) 2017-11-03 2017-11-03 Hardware implementation of convolution layer of deep neural network
GB1718297.3A GB2568086B (en) 2017-11-03 2017-11-03 Hardware implementation of convolution layer of deep neutral network

Publications (3)

Publication Number Publication Date
GB202005436D0 GB202005436D0 (en) 2020-05-27
GB2582868A GB2582868A (en) 2020-10-07
GB2582868B true GB2582868B (en) 2021-06-02

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GB2005436.7A Active GB2582868B (en) 2017-11-03 2017-11-03 Hardware implementation of convolution layer of deep neural network

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2602524B (en) * 2021-01-04 2024-02-14 Imagination Tech Ltd Neural network comprising matrix multiplication
GB2602494A (en) * 2021-01-04 2022-07-06 Imagination Tech Ltd Implementing fully-connected neural-network layers in hardware

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Abhinav Podili et al. "Fast and Efficient Implementation of Convolutional Neural Networks on FPGA", 2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pg. 11 - 18, 2017-07-10 *
Jiantao Qiu et al, "Going Deeper with Embedded FPGA Platform for Convolutional Neural Network", Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '16, pg. 26-35, 2016-01-01 *

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Publication number Publication date
GB202005436D0 (en) 2020-05-27
GB2582868A (en) 2020-10-07

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