GB2580631B - Phase-locked loop circuitry - Google Patents

Phase-locked loop circuitry Download PDF

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Publication number
GB2580631B
GB2580631B GB1900683.2A GB201900683A GB2580631B GB 2580631 B GB2580631 B GB 2580631B GB 201900683 A GB201900683 A GB 201900683A GB 2580631 B GB2580631 B GB 2580631B
Authority
GB
United Kingdom
Prior art keywords
phase
locked loop
loop circuitry
circuitry
locked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1900683.2A
Other versions
GB2580631A (en
GB201900683D0 (en
Inventor
Li Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cml Microcircuits Uk Ltd
Original Assignee
Cml Microcircuits Uk Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cml Microcircuits Uk Ltd filed Critical Cml Microcircuits Uk Ltd
Priority to GB1900683.2A priority Critical patent/GB2580631B/en
Publication of GB201900683D0 publication Critical patent/GB201900683D0/en
Priority to PCT/GB2019/053706 priority patent/WO2020148517A1/en
Publication of GB2580631A publication Critical patent/GB2580631A/en
Application granted granted Critical
Publication of GB2580631B publication Critical patent/GB2580631B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
GB1900683.2A 2019-01-17 2019-01-17 Phase-locked loop circuitry Active GB2580631B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB1900683.2A GB2580631B (en) 2019-01-17 2019-01-17 Phase-locked loop circuitry
PCT/GB2019/053706 WO2020148517A1 (en) 2019-01-17 2019-12-30 Phase-locked loop circuitry

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1900683.2A GB2580631B (en) 2019-01-17 2019-01-17 Phase-locked loop circuitry

Publications (3)

Publication Number Publication Date
GB201900683D0 GB201900683D0 (en) 2019-03-06
GB2580631A GB2580631A (en) 2020-07-29
GB2580631B true GB2580631B (en) 2022-04-27

Family

ID=65528359

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1900683.2A Active GB2580631B (en) 2019-01-17 2019-01-17 Phase-locked loop circuitry

Country Status (2)

Country Link
GB (1) GB2580631B (en)
WO (1) WO2020148517A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020105389A1 (en) * 2001-02-06 2002-08-08 Matsushita Electric Industrial Co., Ltd. PLL circuit
US9160352B1 (en) * 2014-05-27 2015-10-13 United Microelectronics Corp. Phase-locked loop and method for controlling the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07297713A (en) * 1994-04-28 1995-11-10 Sony Corp Frequency synthesizer
JP2002198808A (en) * 2000-10-19 2002-07-12 Sony Corp Pll circuit and optical communication receiving device
TWI346460B (en) * 2006-10-31 2011-08-01 Realtek Semiconductor Corp A clock and data recovery circuit and a method for adjusting loop bandwidth used thereby

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020105389A1 (en) * 2001-02-06 2002-08-08 Matsushita Electric Industrial Co., Ltd. PLL circuit
US9160352B1 (en) * 2014-05-27 2015-10-13 United Microelectronics Corp. Phase-locked loop and method for controlling the same

Also Published As

Publication number Publication date
WO2020148517A1 (en) 2020-07-23
GB2580631A (en) 2020-07-29
GB201900683D0 (en) 2019-03-06

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