GB2560983B

GB2560983B - Detector for detecting a wide band signal

Info

Publication number: GB2560983B
Application number: GB1705211.9A
Authority: GB
Inventors: Le Bars Philippe; Sahyoun Walaa
Original assignee: Canon Inc
Current assignee: Canon Inc
Priority date: 2017-03-31
Filing date: 2017-03-31
Publication date: 2019-08-07
Anticipated expiration: 2037-03-31
Also published as: GB201705211D0; GB2560983A

Description

Detector for detecting a wide band signal

FIELD OF THE INVENTION

The present invention relates to the field of integrated circuits for electromagnetic waves detection. In particular, the present invention relates to the detection of high frequency electromagnetic waves (e.g. above 100 GHz and below 3 THz) for signal processing, in particular with a Field Effect Transistor with a transition frequency of well below this domain of electromagnetic waves.

The invention has applications notably in wireless communications and in radar and imaging systems.

BACKGROUND OF THE INVENTION

It is known from the prior art that Field Effect Transistors (FET) can be used as high frequency electromagnetic waves detectors.

At the interface between the layers of a FET, notably between the metal and semiconductor layers, the crystal structure of the semiconductor material shows defects and irregularities leading to mobility of charge carriers.

At this interface, the tightness of the bounds between atoms and electrons is weaker and the mobility of the charge carriers is greater.

This resulting enhanced mobility of the charge carriers is referred to as “gas of carriers" or “plasma". The oscillations that may appear within this plasma are referred as to “plasmons".

The plasma in the FET transistor has nonlinear properties that may be used for detection and for mixing the electromagnetic waves reaching the FET transistor.

When a high frequency electromagnetic wave reaches a FET transistor, the FET transistor mixes (or multiplies) the electromagnetic wave, and creates a signal representing the square of the electromagnetic wave. Thus, the FET transistor creates a rectified form of the AC current which is generated when the electromagnetic wave reaches the FET transistor.

When a high frequency electromagnetic wave reaches a FET transistor, a voltage appears between the source and drain of the transistor. This voltage is proportional to the power of the electromagnetic wave reaching the FET transistor,

This voltage between the source and the drain appears when an asymmetry is present between the source and the drain, i.e. when the electrical potential at the source and the drain is different. The asymmetry may be obtained by pinching off the FET transistor by means of the polarization of the gate.

It may be noted that without asymmetry between the source and the drain no voltage would appear between them.

Terahertz detectors using plasmonic FET transistors are known, for example from US2015/0364508.

According to the document “Terahertz responsivity enhancement and low-frequency noise study in silicon CMOS detectors using a drain current bias” A. Lisauskas, S. Boppel, H. G. Roskos L. Minkevicius, G. Valusis 2011 21st International Conference on Noise and Fluctuations, at signal modulation frequencies above 50 KHz and in a sub-threshold bias regime, the signal to noise ratio becomes independent of an applied current, and the responsivity of the detector may be enhanced. The responsivity of a detector may be defined as the gain between the input and the output of the detector and corresponds to the root mean square value of the voltage or current that appears in the detector, normalized to the power of the incoming electromagnetic wave.

It has been concluded that a detector using plasmonic transistors in an active configuration can be used in communication applications if the signal carrying data has a spectrum above a corner frequency, i.e. above a frequency where the power of the flicker noise becomes less than the power of the thermal noise.

However, the inventors have found that this conclusion is over-optimistic for large bandwidth signals and that signal modulation frequencies in sub-threshold bias regime are not a sufficient condition.

In addition, the inventors have found that a passive detector may not be totally appropriate when an extended bandwidth in the several GHz range is sought.

Indeed, there is no correct adaptation of the plasmonic FET transistor to an antenna and to a band pass amplifier for a large bandwidth in sub-threshold bias regime. One reason for this is that for the gate of a plasmonic FET to be correctly adapted to an antenna and to a band pass amplifier, has to present a large ratio between its width and its length, the resistance of its channel being low. Consequently, the current flowing from the drain to the source has to be great in order to obtain good amplification. However, the higher the current is, the higher is the corner frequency of the flicker noise.

Also, a DC voltage biasing the drain of a passive detector generates a flicker noise that will reduce the signal-to-noise ratio. The amount of generated flicker noise depends on the presence or the absence of a carrier frequency, and on the distance between the emitter and the receiver. According to tests carried out by the inventors, an emitter close to a receiver may fail to allow good transmission, contrary to expectation.

SUMMARY OF THE INVENTION

The present invention is directed to providing an improved detector for wide band signals making it possible to enhance the signal-to-noise ratio with respect to prior art detectors.

To that end, according to a first aspect, the present invention concerns a detector for detecting a wide band signal comprising a terahertz wave carrier signal modulated by a baseband signal, the detector comprising a first transistor being a plasmonic transistor and means for noise cancelation, wherein: - said plasmonic transistor comprises a gate connected to the ground and a first port which is one of a drain and a source, connected to an antenna configured to receive said wide band signal, and a second port which is the other of said drain and said source, said plasmonic transistor generating a noise current, - said noise cancellation means comprises a transistor comprising a gate coupled to said first port of the plasmonic transistor, a first port which is one of a drain and a source, connected to the ground, and a second port which is the other of said drain and said source, biased so that the amplitude of a voltage generated at said second port of said transistor is equivalent to the amplitude of a voltage generated at the second port of said plasmonic transistor by the noise current, and - a differential amplifier comprising a first input connected to the second port of the plasmonic transistor and a second input connected to the second port of the transistor, the output of said differential amplifier representing the baseband signal.

Thus, the detector, which is a quadratic detector, detects a wide band signal, i.e. provides the envelope of a terahertz carrier that was modulated by a baseband signal and generates an amplified wide band signal without any or limited noise created by the plasmonic transistor.

It may be noted that the voltage generated by the noise current at the second port (drain or source) of the plasmonic transistor is similar to the voltage at the second port (drain or source) of the second transistor, these voltages having a same polarity. Thus, these voltages are not present in the output signal generated by the differential amplifier.

According to a feature, the gate of said second transistor is polarized by a DC current source.

Thus DC current source regulates the current flowing through the transistors.

According to a feature, the plasmonic transistor is in a common gate configuration.

According to a feature, the wide band detector further comprises a capacitor connected to the gate of the plasmonic transistor.

The capacitor is connected between the gate of the plasmonic transistor and the ground. The ground corresponds to the AC ground of the antenna.

Thus, the gate of the plasmonic transistor can be tied to a DC voltage for biasing the transistor even though the gate is tied to the AC ground of the antenna.

According to a feature, the wide band detector further comprises a load connected between the second port of the second transistor and a DC power source.

Thus, the second transistor is arranged in a common source configuration.

According to an embodiment, the load is a resistor consisting of a FET transistor.

According to a feature, the wide band detector further comprises a low pass filter connected between the first port of the plasmonic transistor and the gate of the second transistor.

Thus, the terahertz wave reaching the plasmonic transistor does not reach the second transistor, so preventing this second transistor from becoming a plasmonic transistor.

According to embodiments, the low pass filter comprises at least one of a stub, an inductor or a combination of passive elements.

According to a feature, the wide band detector further comprises a low pass filter connected between the second port of the plasmonic transistor and the first input of the differential amplifier.

The behavior of the differential amplifier is unknown at terahertz frequencies. Thus, by virtue of the use of the low pass filter, the terahertz wave reaching the plasmonic transistor does not reach the differential amplifier and possible and unknown issues are avoided

According to a feature, the wide band detector further comprises a first resistor connected between the gate and the second port of the second transistor.

The presence of this first resistor allows the gain of the second transistor to be linear for the frequency of the signal at the gate.

According to an embodiment, the wide band detector further comprises a load connected between a DC power source and the second port of the plasmonic transistor.

Thus, the voltage generated at the second port of said plasmonic transistor is amplified.

According to a feature, the wide band detector further comprises a second resistor connected between the gate and the second port of the plasmonic transistor.

According to a second aspect, the present invention concerns a receiver comprising a detector for detecting a wide band signal according to the invention.

According to a feature, the wide band signal is emitted by a radar transmitter.

According to a third aspect, the present invention concerns a radar system comprising a radar transmitter emitting a wide band signal and a receiver according to the invention.

The objects according to the second and third aspects of the invention provide at least the same advantages as those provided by the detector according to the first aspect.

BRIEF DESCRIPTION OF THE DRAWINGS

Still other particularities and advantages of the invention will appear in the following description, made with reference to the accompanying drawings which are given by way of non-limiting example, and in which: - Figure 1a is a diagram of direct-conversion of a baseband signal in a radar system; - Figure 1 b is a diagram of direct-conversion of a baseband signal in a radar system using a plasmonic Field-Effect Transistor ·, - Figure 2 schematically represents a Field-Effect Transistor; - Figure 3 represents two arrangements of a FET detecting Terahertz frequencies and a curve representing the noise as a function of the frequency; - Figure 4 represents an example of a current source implemented with CMOS technology - Figure 5 represents a wide band detector with a plasmonic detector in active mode according to a first embodiment of the invention; and - Figure 6 represents a wide band detector with a plasmonic detector in passive mode according to a second embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention applies to detectors comprising a plasmonic FET in a passive and in an active configuration.

Direct-conversion of a baseband signal in a radar system is represented in Figures 1a and 1b.

In Figure 1a an emitter 101 sends its energy through an antenna 110 to a target 120. The emitter 101 uses direct-conversion architecture for converting a baseband signal to a transposed bandwidth.

The direct conversion is obtained by mixing, in a mixer 103, the baseband signal with a signal generated by a local oscillator 102. The signal generated by the local oscillator 102 is at the desired carrier frequency. The mixer 103 generates at its output the baseband signal converted to this desired carrier frequency. A receiver 104, which also uses direct-conversion architecture, receives energy sent by the target 120.

The direct-conversion at the receiver 104 is carried out using a mixer 106 that is driven by a local oscillator 105 at the carrier frequency. The mixer generates at its output a baseband signal.

In Figure 1b an emitter 101 similar to that represented by Figure 1a sends its energy through an antenna 110 to the target 120. A receiver 104b, which also uses direct-conversion architecture, receives energy sent by the target 120.

The direct conversion at the receiver 104b is carried out by using a plasmonic transistor 107. The plasmonic transistor 107 is biased by a DC source 108 connected to its gate. A baseband signal is generated at the drain of the plasmonic transistor 107.

It may be noted that a same receiver structure applies also to wireless transmission of data.

Figure 2 represents a view in longitudinal section of a plasmonic Field Effect Transistor 200. When the gate G of the transistor 200 is illuminated with a Terahertz electromagnetic wave, a wave 202 appears in the channel 201 formed under the surface of the gate G and between the source S and the drain D. A first branch of an antenna 203 is connected to the gate G and a second branch is connected to the source S.

The amplitude of the created wave 202 decreases between the source S and the drain D. The effective length LO of the wave 202 is defined by a distance from its origin, i.e. the source S, to a point 204 where the amplitude of the wave reaches the amplitude at origin multiplied by 1/e, where “e” is Euler’s constant.

Figure 3 represents two detectors using a plasmonic FET.

In a first architecture 301 a plasmonic FET 302 is connected in a passive arrangement. The drain D is left unconnected. The gate G is DC biased by a DC power source 304 and connected to a first branch 303a of an antenna that is not connected to the ground. The Source S is connected to a second branch 303b of the antenna 303 that is AC and DC biased to the ground gnd.

In a second architecture 310, the plasmonic FET 302 is connected in an active arrangement. The architecture is similar to the first one 310 except for the drain D which is connected to a resistor R2 connected to a DC power source Vdd, a current Id flowing through the drain D of the transistor 302.

In this architecture 310 the responsivity is increased with respect to the first one 301, but the flicker noise is also increased.

The curve 320 represents the noise generated in the FET 302 as a function of the frequency, resulting from the DC biasing of the FET 302. A passive FET, as for the first architecture 301, only produces thermal noise 321 which is not dependent on the frequency. The thermal noise 321 is only dependent on the impedance of the FET 302 channel. If the impedance is low, the noise may present a low value. The thermal noise power is equal to 4*k*T*B Watts, where k is the Boltzmann constant, T the temperature, R the resistance of the FET channel and B the bandwidth of interest.

According to an illustrative example, the noise is around -107 dB at ambient temperature for a 1GHz bandwidth, or 28 microvolts over a 50 Ohm impedance.

It may be noted that for a signal of 100 microW, a responsivity of 2V/W is enough to get a mere 17 dB of SNR, which would be appropriate for a transmission of data, or the detection of distant targets in a radar. However, the inventors have observed that this is not the case on passive detectors submitted to a large bandwidth BPSK signal, where a SNR of 10 dB or even less is achieved, resulting in a large amount of erroneous data, or a shortened radar range. Indeed, a low frequency noise 322 is present at a high level, even when the drain is not biased (as for the first architecture 301). It may be noted that flicker noise is present. Flicker noise is also named as 1/f noise (f being the frequency), as its amplitude decreases with the frequency. The point 323 where this amplitude is at the same level as the thermal noise is called the corner frequency, the corner frequency being dependent on the amount of DC current flowing through the drain. The higher the current flowing through the drain is, the higher the corner frequency is.

Thus, as shown below, the first architecture 301 is not a really “passive” configuration.

The signal received Sr(t) at the detector 301,302 is :

Sr(t)= Sc cos(oct+ φ)+ Sb(t). cos(oct) where Sb(t) is the baseband signal, fc is the carrier frequency, oc its pulsation, Sc is the amplitude of the carrier signal and φ is the phase between the carrier signal and the baseband signal, Sc. cos(oct+ φ) being the carrier signal and Sb(t). cos(oct) the transposed baseband signal.

The signal received Sr(t) may be written as

Sr(t)= Sc [cos(oct).cos( φ)+ sin(oct).sin( φ)]+ Sb(t). cos(oct)

The signal resulting from detection (detection signal) Sd(t) is proportional to the square of the received signal. Thus, the detected signal Sd(t) may be writen as follows:

Sd(t)= k. [Sc [cos(ract).cos( φ)+ sin(oct).sin( φ)]+ Sb(t). cos(oct)]2

The resulting signal at baseband frequency is

Sd(t)= k.( Sb(t)2/2+ Sc2/2 + Sb(t).Sc. οοε(φ));

Considering the spectrum of the detected signal, it may be observed that a DC offset appears. Thus, DC power is present at the drain of the transistor and current flows through the channel of the transistor, enhancing the flicker noise.

The created DC power depends on the amplitude of the carrier signal and of the modulating signal. Thus, the closer the emitter and the receiver are, the higher the amount of noise is.

Thus, contrary to other communication or radar systems, the signal-to-noise ratio is not a squared function of the distance between the emitter and the receiver.

As a consequence, the present invention may also apply to detectors comprising a plasmonic FET in a passive configuration.

Figure 4 represents an example of current source in CMOS technology that may be used in the invention.

The circuit implementing the current source of Figure 4 comprises a first transistor T1 and a second transistor T2, both of FET type, sharing a same substrate and being connected by their gates. The drain and the gate of a first transistor T1 are connected between them. The drain is also connected to a resistor Rref connected to a voltage source Vdd. The current that flows to the gate of the transistors T1, T2 being negligible, the current through the resistor Rref is considered to entirely flow through the drain. Its value is set by the resistance Rref and may be written as follows

Iref= (VDD-Vgs)/Rref

If the two transistors T1, T2 are identical and they are operating in its saturation area, then the current Ibias flowing through the drain of the second transistor T2 is identical to the current Irf flowing through the drain of the first transistor T1. The current Ibias flowing through the drain of the second transistor T2 is controlled by the voltage between its gate and its source Vgs.

If the two transistors T1, T2 have different geometries, then the relation between the currents flowing by their respective drains may be written as follows: lbias/lref= (W2/L2)/(W1/L1), where W is the width of a transistor and L the length of the gate.

It may be noted that the current Ibias flowing through the drain of the second transistor T2 is not modified by any variation of load or voltage at the second transistor T2 drain, since it is stabilized by the first transistor T1. Hence the impedance at the drain of the second transistor T2 is very high, even though its DC resistance is low.

It may be noted that other embodiments of current source may be used, for example a Wilson current mirror architecture.

Figure 5 represents a wide band detector according a first embodiment.

The detector 500 comprises a first transistor T1 510 and noise cancellation means 550 which comprises a second transistor T2 520.

The first transistor 510 is a plasmonic transistor and is arranged in an active configuration. The plasmonic transistor 510 works at a frequency above its nominal transition frequency for the technology for the received signal, but around its technology transition frequency for the rectified detected signal. The second transistor 520 works below its technology transition frequency.

The first transistor 510 is connected in a common gate configuration. Thus, its gate is connected to the ground. The first transistor 510 comprises a first port and a second port, each being one of the drain and the source.

It may be noted that a transistor in common gate configuration provides wide band amplification. The noise this transistor generates is proportional to the square of the bandwidth. Thus, if the bandwidth is large, the noise power is high.

In the described embodiment, the first port is the source S1 and the second port is the drain D1.

The first port S1 of the first transistor 510 is connected to an antenna 507, 508 configured to receive a wide band signal comprising a terahertz wave carrier signal modulated by a baseband signal.

In particular, the antenna 507, 508 is connected to the transistor gate G1 and source S1.

It may be noted that, typically an active branch of an antenna may drive the gate, while a passive branch may drive the source. However, as described by Hertz, one of the branches of the antenna can be replaced by a geometry that contains the other branch geometry, hence it is possible to use a ground surface and a single lead if one of the ground dimensions is greater than the lead dimension, and this forms a complete antenna.

In the described embodiment, the antenna 507 comprises two branches 507, 508, one branch 507 being connected to the source S1 and the other branch 608 being connected to the AC ground.

According to the superposition theorem for electrical circuits, the gate G1 may be tied to a DC voltage in order to bias the first transistor 510 even though the gate G1 is tied to the AC ground with the antenna 508.

In the described embodiment, the detector 500 further comprises a capacitor 506 in order to allow this superposition if the DC ground is not directly connected to the AC ground. A load 504 is connected between a DC power source Vdd and the drain D1 of the plasmonic transistor 510, and a current flows through the drain D1. In the described embodiment, the load 504 is a resistor. However, the person skilled in the art knows that many other arrangements, for example with transistors, can be used in order to make a current flow through the drain D1 of the first transistor 510.

The value of the DC current is regulated with a current source 501 connected, as it will be described below, to the gate of the second transistor 520. According to a non-limitative example, an architecture of current source as that described with reference to Figure 4 may be used.

The second transistor 520 is configured in a common source configuration, i.e. its source is connected to the ground gnd. The second transistor 520 comprises a first port and a second port, each being one from the drain and the source.

In the described embodiment, the first port is the source and the second port is the drain. However, in other embodiments the first port may be the drain and the second port the source.

The gate of the second transistor 520 is coupled to the first port of the plasmonic transistor 510 (its source)

The first port of the second transistor 520 (its source) is connected to the ground, and a second port (its drain) is connected to an end of a load 503 which is, in this embodiment is a resistor, connected by another end to a DC power source Vdd.

It may be noted that the resistor 503 is a non-limitative example, and the person skilled in the art can replace it by many other circuits emulating a resistance, such as a FET transistor.

The gate G2 of the second transistor 520 is also connected to the DC current source 501. As is known by the person skilled in the art, the impedance represented by a DC current source is very high (impedance at the drain of the second transistor T2 in the architecture represented by Figure 4). Since the impedance is very high, the connection point of the plasmonic transistor 510 source S1 and the current source 501 presents approximately the antenna impedance.

Because the second transistor 520 is operated in common source configuration, any voltage on its gate G2 creates a voltage and a current in the transistor channel, the channel current being in an opposite direction with respect to the current at the gate.

The gain and the bias of the second transistor 520 is selected, as described below, so that a noise voltage of same value and polarity is created at the drains of the first 510 and second 520 transistors. In other words, the second transistor 520 is biased so that the amplitude of a voltage generated at said second port of said second transistor 520 (generated by the current flowing through the second transistor) is equivalent to the amplitude of a voltage generated at the second port of said plasmonic transistor 510 by the noise current generated by plasmonic transistor.

It may be noted that when a Terahertz signal reaches the first transistor 510, an AC voltage is induced at the drain D1 of the transistor 510 and generates a current (id) flowing from the drain D1 to the source S1.

The detector 500 further comprises a differential amplifier 560 comprising a first input 561 connected to the drain D1 of the plasmonic transistor 510 and a second input 562 connected to the drain D2 of the second transistor 520. The output 563 of said differential amplifier 560 represents the baseband signal modulating the Terahertz signal.

In particular, at the output 563 of the differential amplifier 560, an output signal representing the difference between the signals at the drains of the transistors amplified and with reduction of common noise is generated.

It may be noted that in theory, the differential amplifier 560 only amplifies the AC voltage at the drain D1, D2 of the transistors 510, 520, the signal at its output 563 corresponding to the envelope of the Terahertz signal. However, in a reduction to practice the impedance of the current source is not infinite. Thus, a small amount of voltage representing the Terahertz signal envelope may appear at its input, this voltage being amplified. This amplified voltage signal appears on the second transistor’s 520 drain D2 with a reverse polarity compared to the voltage signal on the first transistor’s 510 drain D1. Again this is favourable to the use of a differential amplifier between drains of T1 and T2.

It may be noted that the noise voltage at the drain D1, D2 of the transistors 510, 520 have the same polarity and the amplified voltage representing the Terahertz signal envelope have opposite polarity.

As stated in the theory, a terahertz wave can construct itself only in a portion of the physical channel of the first transistor, this portion being below the physical gate G1, and propagates itself only to a distance L0 named “effective distance” (see Figure 2). The beginning of the propagation of the wave is located in the channel, where the physical beginning of the gate is located. The rectified voltage appears on the channel side that is not tied to the antenna, i.e. the drain D1.

In the described embodiment, the detector 500 further comprises a Low Pass Filter 502 connected between the first port (here the source S1) of the plasmonic transistor 510 and the gate G2 of the second transistor 520.

The Low Pass Filter 502 blocks the propagation of the Terahertz wave reaching the first transistor 510 towards the second transistor 520.

In the absence of the filter, the second transistor 520 may experience a relatively high quantity of Terahertz energy between its gate and source and may become plasmonic, although its dimensions may not allow operation in this mode. Indeed, the transistor used in a good detector has very large dimensions, but a good amplification transistor does not necessarily have these dimensions, and its input impedance in common source will be very high and very poorly adapted to the antenna.

In addition, in the absence of the filter 502, the current source 501 could have unwanted plasmonic effects.

It may be noted that transistors are not characterized at frequencies of operation above the technology transition frequency by the manufacturing “Fabs” (manufacturing line for integrated circuits), as it is unlikely they are operated in this frequency range. Consequently, their behavior is difficult to predict.

Thus, the use of the low pass filter 502 allows the effect of the Terahertz wave to be limited.

According to different embodiments, the filter 502 may be at least one of a stub, an inductor, or a combination of different passive elements.

Advantageously, an inductive element or a combination of passive elements allows the impedance of a branch of the circuit to be high at the frequencies received by the antenna. Thus the antenna tuning is not influenced by the transistor gate impedance. Furthermore, the second transistor T2 does not behave as a plasmonic detector, as the amount of energy capable of activating the plasmonic mode is limited by the presence of this high impedance.

In the described embodiment, a first feedback resistor 509 is connected between the gate G2 and the drain D2 of the second transistor 520 and a second feedback resistor 505 is connected between the gate and the second port of the plasmonic transistor 510.

By virtue of the presence of these transistors 505, 509, the gain of the respective transistors 510, 520 is linearized as a function of the frequency.

As explained above, the gain and the bias of the second transistor 520 are selected so that a noise voltage of same value and polarity is created at the drains of the first 510 and second 520 transistors. That is to say that the gain and the bias of the second transistor 520 are selected so that the voltage due to noise is cancelled. For that, if RL1 is the resistance value of the resistor 504 connected to the drain D1 of the first transistor 510, RL2 is the resistance value of the resistors 503 connected to the drain D2 of the second transistor, inoise is the AC current flowing through the first transistor 510, id2 is the current flowing through the second transistor 520, g is the transconductance of the second transistor 520, and Zantenna is the antenna impedance in the baseband bandwidth:

Since Zantenna is taken at baseband frequencies, RL1, RL2 and g may be selected for allowing the cancellation of the voltage due to noise.

It may be noted that the feedback resistors 505, 509 have not been taken into account in the above equations.

An open drain plasmonic transistor can be described as follows:

The velocity of plasma waves is s, so that

where q is the electron charge, T the temperature, k the Boltzmann constant, Vo the threshold voltage defined by the technological process used, m the effective mass of the electron in the semiconductor, and η is the slope of the channel conductivity decay below threshold.

If Lg is the length of the gate of the first transistor 510, defining the channel length modulation parameter:

We have

And the detected voltage u is

where ua2 is the power of the incoming wave.

It may be noted that for a perfect match of the first transistor 510 with the antenna 507, 508 and output, the maximum responsivity is R = q/(4.m.s2) which is reached if the effective length L0 is sufficiently small, for example if Q is higher than 2.5.

In addition, the responsivity with current flowing through the drain is the responsivity of an open drain form (R = q/(4.m.s2)), multiplied by

1+2ld/(ldsat*Q*(Vgs-Vth)). Thus, the responsivity with current flowing through the drain may be written as follows: R =( q/(4.m.s2)).( 1+2ld/(ldsat*Q*(Vgs-Vth)). where Id is the DC current flowing through the first transistor 510, and Idsat the pinch-off current defined as ldsat= p*Cox*(Vgs-Vth)2/(2Lg).

This equation applies for ld> Idsat, which is the case for the biased drain, as its current depends on the current source Id, the value of this current Id is adjusted by modifying the resistor Rref (see Figure 4).

Therefore, the voltage created at the drain D2 of the second transistor 520 is

Vout2= R P. 1+2ld/(ldsat*Q*(Vgs-Vth)), where P is the power at the output of the antenna 507.

There is no voltage created at the source S1 of the first transistor 510 by the plasmonic phenomenon. However there is a small parasitic capacitance between the source S1 and drain D1 which let a small part of the rectified current id flows through the antenna impedance, resulting in a small amount of parasitic voltage. However, this parasitic voltage will be in phase with the voltage Vout2 at the drain D2 of the second transistor 520 (because the impedance of the parasitic capacitance is high). The parasitic voltage is amplified by the second transistor 520, the amplified voltage appearing 180° out of phase with Vout2 at the drain D1 of the first transistor 510, since the second transistor 520 is in common source configuration.

The voltage at the drain D1 of the first transistor 510 resulting from the parasitic leak is added to the voltage produced by the rectification of the incoming Terahertz signal.

Thus, this effect due to this parasitic voltage favorably reinforces the Signal-to-noise Ratio SNR ofthe output signal 563.

The detector 500 further comprises a second Low Pass Filter 570 connected between the drain D1 of the first transistor 510 and the first input 561 of the differential amplifier 560.

The presence of the second Low Pass Filter 570, makes it possible to avoid the problems due to the use of the first transistor 510 in frequencies where the technology has not been characterized.

According to an embodiment, the low pass filter 570 may be a sole small inductance. A value of for example a couple of nH is enough for providing isolation at 300 GHz.

According to another embodiment, a stub may be used.

Figure 6 represents a wide band detector according a second embodiment.

This embodiment is similar to the first embodiment. Thus the parts of the architecture described with reference to Figure 5 are note described again.

In the second embodiment, the load of the first transistor 610 is replaced by its output impedance. The output impedance, whether plasmonic or not is:

Zout=W/L*p*Cox*(Vgs-Vth), where W and L are respectively the width and the length of the transistor channel, μ is the mobility, Cox is the capacitance per surface unit, Vgs is the gate voltage, and Vth the threshold voltage. W and L are defined by the desired responsivity.

As explained above, the amount of DC power at the output 663 of the differential amplifier 600 created by the modulation is not disturbed with noise since the created noise will be reduced.

It may be noted that in this embodiment the responsivity corresponds to the responsivity in the first embodiment divided by sqrt(1 -Id/ldsat). Thus, the current created by the modulation has to be evaluated, this current varying with the power received at the first transistor 620. Therefore, it is preferable to use this embodiment of detector only when the received power varies little.

Claims

1. Detector for detecting a wide band signal comprising a terahertz wave carrier signal modulated by a baseband signal, the detector comprising a first transistor being a plasmonic transistor and means for noise cancelation, wherein: - said plasmonic transistor comprises a gate connected to the ground and a first port which is one of a drain and a source, connected to an antenna configured to receive said wide band signal, and a second port which is the other of said drain and said source, said plasmonic transistor generating a noise current, - said noise cancellation means comprises a second transistor comprising a gate coupled to said first port of the plasmonic transistor, a first port which is one of a drain and a source, connected to the ground, and a second port which is the other from said drain and said source, biased so that the amplitude of a voltage generated at said second port of said second transistor is equivalent to the amplitude of a voltage generated at the second port of said plasmonic transistor by the noise current, and - a differential amplifier comprising a first input connected to the second port of the plasmonic transistor and a second input connected to the second port of the second transistor, the output of said differential amplifier representing the baseband signal.

2. Wide band detector according to claim 1, wherein the gate of said second transistor is polarized by a DC current source.

3. Wide band detector according to any one of claims 1 or 2, wherein said plasmonic transistor is in a common gate configuration.

4. Wide band detector according to any one of the preceding claims, further comprising a capacitor is connected to the gate of said plasmonic transistor.

5. Wide band detector according to any one of the preceding claims, further comprising a load connected between the second port of the second transistor and a DC power source.

6. Wide band detector according to claim 5, wherein said load is a resistor consisting of a FET transistor.

7. Wide band detector according to any one of the preceding claims, further comprising a low pass filter connected between the first port of the plasmonic transistor and the gate of the second transistor.

8. Wide band detector according to claim 7, wherein the low pass filter comprises at least one of a stub, an inductor or a combination of passive elements.

9. Wide band detector according to any one of preceding claims, further comprising a low pass filter connected between the second port of the plasmonic transistor and the first input of the differential amplifier.

10. Wide band detector according to any one of the preceding claims, further comprising a first resistor connected between the gate and the second port of the second transistor.

11. Wide band detector according to any one of preceding claims, further comprising a load connected between a DC power source and the second port of the plasmonic transistor.

12. Wide band detector according to claim 11, further comprising a second resistor connected between the gate and the second port of the plasmonic transistor.

13. Receiver comprising a detector for detecting a wide band signal according to any of the preceding claims.

14. Receiver according to claim 13, wherein said wide band signal is emitted by a radar transmitter.

15. Radar system comprising a radar transmitter emitting a wide band signal and a receiver according to any one of claims 13 or 14.