GB2559338A

GB2559338A - Contact pressure sensor manufacture

Info

Publication number: GB2559338A
Application number: GB1701518.1A
Authority: GB
Inventors: Philip Sperring Christopher
Original assignee: Individual
Current assignee: Individual
Priority date: 2017-01-31
Filing date: 2017-01-31
Publication date: 2018-08-08
Also published as: GB201701518D0

Abstract

The force, pressure or contact sensor is manufactured by epitaxially depositing, on to a semiconductor substrate, a pressure-sensitive layer comprising a piezo-resistive semiconductor. Optionally a temperature-sensitive layer may also be deposited. A conductive coating layer in a predetermined pattern is applied over the epitaxially deposited pressure-sensitive layer. An etching process is used to remove parts of the epitaxially deposited pressure-sensitive layer not coated in the predetermined pattern. Then a conductive contact is applied to the resulting patterned conductive coating layer. Finally, the semiconductor substrate structure is machined to a thickness of less than 50 micrometres. The piezo-resistive semiconductor comprises a compound of elements in Groups IIIA and VA of the Periodic Table.

Description

(54) Title ofthe Invention: Contact pressure sensor manufacture

Abstract Title: Method of making a piezo-resistive sensor and machining the substrate.

(57) The force, pressure or contact sensor is manufactured by epitaxially depositing, on to a semiconductor substrate, a pressure-sensitive layer comprising a piezo-resistive semiconductor. Optionally a temperature-sensitive layer may also be deposited. A conductive coating layer in a predetermined pattern is applied over the epitaxially deposited pressure-sensitive layer. An etching process is used to remove parts ofthe epitaxially deposited pressure-sensitive layer not coated in the predetermined pattern. Then a conductive contact is applied to the resulting patterned conductive coating layer. Finally, the semiconductor substrate structure is machined to a thickness of less than 50 micrometres. The piezoresistive semiconductor comprises a compound of elements in Groups 111A and VA of the Periodic Table.

CHIP FABRICATION PROSESS

Figure 1 ( START )

9CHIP FABRICATION PROSESS

Figure 1

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Fig 6) Eutectic die bond/epoxy

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Fig 7) Flip chip compression bond in

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Fig.8) Conformal tracking

CONTACT PRESSURE SENSOR MANUFACTURE

The present invention relates to the manufacture of piezo-resistive based contact pressure sensors that have commercial utility for monitoring contact pressures between two adjacent or contiguous surfaces.

BACKGROUND

Contact pressure sensors are frequently used in industry to measure or monitor contact pressures between two adjacent surfaces, such as the mating contiguous surfaces on respective joints between a flange and a gasket in a pipeline. Uneven tightening of bolts on such a joint may cause distortion of the joint, and ultimately leakage from the pipeline. Furthermore, it is frequently important to have real time information of the pressure distribution at the mating surfaces of such joints.

Known contact pressure sensors are known that are based on solid state physics of the pressure sensitivity of semi-conductor elements from columns SNA and VA of the Mendeleev Periodic Table of the Elements. Different column elements are combined, and are grown epitaxially (lattice-matched) on a single substrate. Once contact pressure is applied to the material, a difference in resistance can be measured.

Contact pressure sensors to date have typically been made using the piezoresistivity properties of Aluminium Gallium Arsenide (AIGaAs) material, in the form of an epitaxial film. Such a film is generally grown on a wafer substrate of Gallium Arsenide (GaAs) having the same crystalline lattice structure as the epitaxial film.

EP 1651935B1 discloses a method of making such a contact pressure sensor, which method comprises: providing a carrier substrate and a receiver substrate, each having different lattice structures; depositing an insulation layer on the carrier substrate; depositing on the insulation layer a pressure sensitive layer comprising a material with piezoresistive properties and lattice structure different to the receiver substrate; depositing a conductive layer on the pressure sensitive layer to form a conductive contact; and transferring the resulting laminate from the carrier substrate to the receiver substrate.

We have found that it is difficult to scale up the method just described, because it is difficult to maintain ductility in the laminate.

We have further found that the previously perceived need to transfer the laminate from a carrier substrate to a receiver substrate can be avoided if certain process parameters are employed.

According to the invention, therefore, there is provided a method of making a contact sensor device (such as a wafer), which method comprises:

(a) epitaxially depositing on to a semiconductor substrate a pressure-sensitive layer comprising a piezoresistive semiconductor;

(b) applying a conductive coating layer in a predetermined pattern to the pressuresensitive layer;

(c) etching to remove parts of the pressure-sensitive layer not coated in the predetermined pattern;

(d) depositing conductive contacts to the resulting patterned coating layer; and (e) machining the semiconductor substrate to a thickness of in excess of 10 micrometres, but less than less than 50 micrometres.

It has been surprisingly found according to the invention that if the semiconductor substrate is machined to a thickness in the range indicated above, then it is not necessary to carry out lift-off (or transfer) of the pressure-sensitive layer of the piezoresistive semiconductor. Thus, it is possible to achieve a laminate forming the sensor device that has a suitable balance of ductility and other mechanical properties.

Specifically, providing that the thickness of the semiconductor substrate is less than 50 micrometres after step (e), it has surprisingly been found according to the invention that the sensor device can have sufficient ductility to allow it to be mounted on a carrier (whether or not that substrate is itself flexible. Conversely, if the semiconductor substrate is too thick (that is, with a thickness in excess of 50 micrometres), then the sensor is likely to crack when compressed in a joint (that is, in the environment where pressure measurement is to be carried out).

The thickness of the semiconductor substrate is generally monitored at intervals by a suitable non-contact method (for example, by an optical thickness measurement method) during pauses in the machining step (e); the mechanical thinning step is resumed until a subsequent pause when the thickness is again measured. Such pauses are typically at predetermined time intervals.

If the mechanical thickness of the semiconductor substrate is found to be above 50 micrometres (to two significant figures) during any such measurement, then the machining should generally be resumed; if the thickness ofthe semiconductor substrate is found to be below 50 micrometres, then the machining should be stopped (that is, not resumed) in the method according to the invention, so that the resulting laminate can be demounted, carried or transferred to suitable further process operations.

Step (e) preferably comprises a repeated sequence of sub-steps of machining, each such sub-step being followed by a thickness measurement, until the measurement indicates that a thickness of less than 50 micrometres has been achieved for the semiconductor carrier layer. There is generally no further advantage to be gained in reducing the thickness significantly below 50 micrometres - especially since such further machining can result in the laminate being difficult to handle and even more susceptible to breakage when handling in manufacturing steps. It is therefore preferred that the thickness of the semiconductor substrate should be at least 40 micrometres as measured in the last measurement step.

A practical absolute minimum to the thickness of the semiconductor substrate is, in any case, about 10 micrometres - because if the substrate were to be as thin as 10 micrometres, then there would be a potential danger of damage to the epitaxially deposited layer.

The machining in step (e) may be carried out using a grinding or lapping paste, as is known in the art. Such a grinding or lapping paste typically employs grinding pastes including granular abrasive materials such as silicon carbide or alumina - typically employing a paste having granules with a mean particle size of less than 10 micrometres for any thinning in step (e) that is carried out after a thickness measurement of 60 micrometres or less is obtained for the semiconductor substrate.

it is a feature of preferred embodiment of the present invention that larger granules (such as granules of a mean particle size of 20 micrometres or above) may be employed until such a thickness measurement (of 60 micrometres or less) is obtained for the semiconductor substrate.

The piezoresistive semiconductor that is epitaxially deposited on to the initial semiconductor substrate in step (a) of the method according to the invention may comprise appropriate compounds of semiconductor elements, these generally being elements from Groups (columns) 11 IA and VA of the Mendeleev Periodic Table of the Elements (such as the Group 11 IA elements Al, and/or Ga and the Group VA elements As and/or Sb), Especially preferred such compounds are ones forming ntype semiconductors (that is, ones creating an excess of electrons) such as an aluminium gallium arsenide of the general formula Al_xGai-_xAs (where x is less than the integer 1). The aluminium gallium arsenide typically contains about 30% of aluminium by atomic composition, but the piezoelectric properties may be tailored depending on the composition (that is the value of x in the above formula).

The pressure-sensitive layer of the piezoresistive semiconductor typically has a thickness of the order of one micrometre (such as about 0.8 to 1.2 micrometres).

The piezoresistive semiconductor forming the pressure-sensitive layer is, as indicated above, epitaxially deposited on a suitable semiconductor carrier or substrate layer, the latter being preferably undoped. In order to permit epitaxial deposition, the semiconductor (carrier or substrate) layer should have essentially the same crystalline lattice structure as the piezoresistive semiconductor. Preferred examples of suitable semiconductor substrates (on to which a layer of aluminium gallium arsenide can be epitaxially deposited as described above) is of gallium arsenide.

The semiconductor substrate just described may itself be provided on a (temporary) substrate, as is known in the art. An example of such a substrate may be lattice matched gallium arsenide on a silicon base layer.

The conductive contacts that are to be applied to the patterned conductive coating layer in step (d) may typically be of titanium, platinum or gold when applied to the “p” side of the pressure-sensitive layer, or for example of gold or nickel when applied to the ”n” side thereof.

It is preferred that (during the machining step) the contacts and the piezoresistive pressure sensitive layer should be mounted on to a support assembly, the resulting wafer being demounted from the support assembly following the machining step (e). Such demounting may be, for example, by means of a commercial vacuum pick-up, designed to avoid damage to the surface of the contact sensor device.

Following the machining step (e), the resulting contact sensor device may be cut to size, typically to produce a batch of the resulting devices, all of the same dimensions (to within manufacturing tolerances).

in the method according to the invention, the epitaxial (lattice matched) deposition in step (a) is carried out on to the semiconductor substrate. The epitaxial film deposition may be, for example, by molecular beam epitaxy (MBE) or by metal organic chemical vapour deposition (MOCVD).

The application of a conductive coating layer in step (b) in a predetermined pattern to produce the pressure-sensitive layer and etching in step (c) to remove parts of the pressure-sensitive layer not coated in the predetermined pattern may be carried out in a conventional photolithographic process.

The sensor device produced according to the invention may be used in applications where knowledge of the direct contact pressure between two surfaces would be beneficial. An example of such a use is between flange and gasket surfaces in a pipeline, when one or more points of contact between such two surfaces may be monitored by a corresponding number of sensors. When used between the flange and gasket surfaces of a pipeline, a sensor device (or a plurality of sensor devices) may be positioned proximate to critical areas of either surface, such as each bolt of the joint along a pipeline.

By way of example, the sensor device according to the invention may be employed in a joint such as that described in US patent 5529346. Such a joint may be employed in a system such as that disclosed in US2007/0193361 A1 or in US patent 7127949.

Preferred features of the present invention will now be illustrated with reference to the accompanying drawings, in which:

Figure 1 is a schematic block diagram showing the sequence of operations in the method according to the invention,

Figure 2 is a side view of an exemplary layer structure for a contact sensor device produced by a method according to the invention after contacts have been applied.

Figure 3 is a perspective view of a resulting contact sensor device formed by a method according to the invention.

Figure 4 is a perspective view of a further embodiment of contact sensor device formed by a method according to the invention, with an integral temperature sensor element.

Figure 5 is a schematic flow chart showing three exemplary sequences of operations that may be used for semiconductor devices produced by a method according to the invention.

Figures 6a, 6b and 6c are respectively perspective, side and plan elevations showing features of an embodiment of a semiconductor device produced by a first exemplary sequence of operations.

Figures 7a, 7b and 7c are respectively perspective, side and plan elevations showing features of a further embodiment of a semiconductor device produced by a second exemplary sequence of operations;

Figures 8a, 8b and 8c are respectively perspective, side and plan elevations showing features of a further embodiment of a semiconductor device produced by a third exemplary sequence of operations;

Referring to Figure 1, the sequence starts at the top. A semiconductor layer S is provided at the start and in step 1 a piezoresistive semiconductor is epitaxially deposited on to substrate S. In subsequent step 2, a conductive coating layer is applied in a predetermined pattern to the piezoresistive layer (for example, by photolithography). Then, in step 3, the pattern is etched to remove parts of the piezoresistive layer not coated in the predetermined pattern.

Then, in subsequent step 4, top contact terminals are applied to the etched pattern, and the semiconductor in step 5 is machined to a thickness of less than 50 micrometres. The semiconductor may, before step 5, be mounted on a support assembly in step 4a; the semiconductor is then demounted in step 6; after optional backside metallisation in step 7, the resultant sensor device is then cut to size or scribed in step 8, to produce the required piezoelectric sensor device at the end 9 of the process sequence.

Referring to Figures 2 and 3 (in which like parts are denoted by like reference numerals), there is shown a semi-conductor layer 30 such as a Gallium Arsenide (GaAs) wafer. A layer 32 that acts as a pressure-sensitive layer has been epitaxially deposited on the semiconductor layer 30.

The pressure-sensitive layer 32 generally comprises a semi-conductor comprised of elements of columns INA and VA of the Mendeleev Periodic Table of the Elements, for example, n-type Aluminium Gallium Arsenide (AlxGal- xAs, or n-type Al xGa 1-x As) typically including about 30% Al.

A layer 34 that acts as a conductive or ohmic contact layer is deposited on the pressure-sensitive layer 32. The layer 34 is generally of a material with conductive properties such as doped GaAs, typically with a thickness of about 3 to 5 micrometres.

A masking resist material 36 (for example of photoresistive polyimide or the like) is deposited on the ohmic contact layer 34; the masking material is applied in a predetermined pattern to the ohmic contact layer. The predetermined pattern may be formed by a conventional photolithographic technique. Those parts of the ohmic contact layer that are not coated by the resist are then removed by etching or the like, to produce a conductive meander 38 shown, by way of example in Figure 3, as a series of conducive lines forming a continuous unbroken conductive path.

Referring again to Figure 3, the two ends of the path are terminated with respective conductive pads 40, 42 which can then serve as bond pads for further wire bonding. The underside U of semiconductor layer 30 is then machined to a thickness of less than 50 micrometres, the resulting device being as schematically shown in Figure 3.

in another embodiment (as shown in Figure 4) a further layer 44, that is a temperature-sensitive layer, is applied to the semiconductor carrier layer 30 between (and spaced from) the conductive pads 40,42. Further conductive pads 46, 48 are then applied to the temperature-sensitive layer 44 to serve as bond pads for further wire bonding.

The provision of an integrated temperature-sensitive layer in this manner advantageously permits monolithic integration of pressure and temperature responsive elements on a single chip sensor. This is advantageous because it enables the piezoresistive sensor to be calibrated to compensate for variations in temperature -- because the piezo response (and therefore the apparent measured pressure) can vary with the temperature of the sensor. St therefore follows that a measurement of pressure, on its own, may not be sufficient in all circumstances (such as, when high accuracy is required) to provide usable data unless compensation can be made for measured or detected temperature in the vicinity of the contact pressure sensor device produced according to the invention.

The electrical circuitry used to connect to and drive the contact pressure sensor device produced according to the invention is not shown in the drawings. However, such circuitry would be well known to the person skilled in the art. For example, suitable circuitry may comprise a power source, such as a constant voltage power source with positive terminal connected to one contact of the sensor and the negative terminal connected to the other contact, or the negative terminal and other contact to earth (ground). Additionally, it will be known that other components in the electrical circuitry may be applied such as current detectors, and the like.

An additional protective layer such as a polyimide layer or passivation layer or the like may be applied to the complete sensor for protection against moisture or the like, individual sensors are cut into required sizes depending on their applications. After the formation of complete sensor devices, the samples are cut into smaller pieces and may be protected at the sides by wax or the like.

Referring to Figure 5, there are shown three exemplary sequences, (1), (2) and (3), which will be respectively described in more detail respectively in Figures 6a, 6b and 6c; 7a, 7b and 7c; and 8a, 8b and 8c.

Fig 5, line 1 includes a sequence in which a device comprising a chip on a carrier, produced by a method according to the invention is die bonded to a pair of contacts. The device (produced by a method according to the invention) as represented in Box A is die bonded to the chip as represented by Box B and then terminals (such as 42, 44 of Figure 3) are wire bonded via conductive wires to respective main terminals as represented by Box C.

Figure 6a is a perspective view of a device 101 formed by a method according to the invention, in which like parts to those in Figure 3 are denoted by like reference numerals. (Figure 6b is a side view of the device of Figure 6a, and Figure 6c is a plan view of the same device.) in addition to the parts shown in Figure 3, the chip of Figures 6a to 6c further includes a conductive connection wire 52 (typically of gold) that connects the terminal 40 to a further main terminal 54, and a further conductive connection wire 56 connecting the terminal 42 to a further counterpart main terminal 58. The terminals 40 and 54 are in the illustrated embodiment bonded to the wire 52 via a ball bond process; similarly the terminals 42 and 58 are bonded to the respective wire 56 by a ball bond process.

As indicated (see Figure 6b), the meander 38 has been applied to the p surface of a piezoresistive layer 32, the latter being present on a semiconductor substrate 30.

The wires 52 and 56 are typically encapsulated in an epoxy resin or the like before the device is ready for use.

Fig 5, line 2 includes a sequence in which a device comprising a chip on a substrate, produced by a method according to the invention is flip chip bonded to a pair of contacts. The device (produced by a method according to the invention) as represented in Box B is flip chip bonded to the meander on the underside and then terminals (such as 40a, 42a of Figure 7) are wire bonded via conductive wires to respective main terminals 54a,54b.

Figure 7a is a perspective view of an alternative embodiment of a device 102 formed by a method according to the invention, in which like parts to those in Figure 6a are denoted by like reference numerals. (Figure 7b is a side view of the device of Figure 7a, and Figure 7c is a plan view of the same device.) Like the device of Figures 6a to 6c, the device of Figures 7a to 7c includes conductive connection wires 52a and 56a (again, like the connection wires 52 and 56 of Figure 6, being typically of gold).

In the embodiment of Figures 7a to 7c the conductive wire 52a connects the terminal 40a to a further main terminal 54a, and the further conductive wire 56a connects the terminal 42a to a further counterpart main terminal 58a. The terminals 40a and 54a are in the illustrated embodiment bonded to the conductive wire 52a via a compression bond process; similarly the terminals 42a and 58a are bonded to the further conductive wire 56a by a compression bond process.

As indicated (see Figure 6b), the meander 38 has been applied to the n surface of a piezoresistive layer 32, the latter being present on a semiconductor substrate 30.

The conductive connection wires 52a and 56a are (as for the embodiment of Figure 5) typically encapsulated in an epoxy resin or the like before the final device is ready for use.

Fig 5, line 3 includes an assembly sequence in which a device comprising a chip on a substrate by a method according to the invention is first embedded in a printed circuit board (Box A) and then in BOX B epoxy bonded to a printed circuit board (RGB) substrate. Topside contacts are applied (Box C) and tthen he final device is laminated to a RGB (Box D).

Figure 8a is a perspective view of an alternative embodiment of a device 103 formed by a method according to the invention, in which like parts to those in Figure 6a are denoted by like reference numerals. (Figure 8b is a side view of the device of Figure 8a, and Figure 8c is a plan view of the same device.) Like the device of Figures 6a to 6c, the device of Figures 8a to 8c again includes conductive connections wires (52b and 56b). in the embodiment of Figures 8a to 8c, a conductive, conformal track 52b connects the terminal 40b to a further main terminal 54b, and the further conductive conformal track 56b connects the terminal 42b to a further counterpart main terminal 58b. The conformal tracks follow the shape of the sidewall of the device, having been defined by methods such as 3D printing of a conductive material or conformal deposition of a conductive materiai.

Claims

1. A method of making a contact sensor device, which method comprises:

(a) epitaxially depositing, on to a semiconductor substrate, a pressuresensitive layer comprising a piezoresistive semiconductor;

(b) applying a conductive coating layer in a predetermined pattern to the epitaxially deposited pressure-sensitive layer;

(c) etching to remove parts of the epitaxially deposited pressure-sensitive layer not coated in the predetermined pattern;

(d) depositing conductive contacts to the resulting patterned coating layer; and (e) machining the semiconductor substrate to a thickness of less than 50 micrometres.

2. A method according to claim 1, wherein the semiconductor substrate comprises gallium arsenide or aluminium arsenide.

3. A method according to claim 1 or 2, wherein the piezoresistive semiconductor comprises a compound of semiconductor elements of Groups iliA and VA of the Mendeleev Periodic Table of the Elements.

4. A method according to any of claims 1 to 3, wherein step (e) is paused periodically and the thickness of the semiconductor substrate is measured by a non-contact method in each such pause, the machining step (e) being resumed each time the thickness of the semiconductor substrate is measured to be more than 50 micrometres; and not resumed when the thickness of the semiconductor substrate is measured to be less than 50 micrometres.

5. A method according to claim 4, wherein the machining in step (e) is carried out using a grinding or lapping paste having granules with a mean particle size of less than 10 micrometres after a pause during which the thickness of the semiconductor substrate is measured to be less than 60 micrometres.

6. A method according to claim 5, wherein until the thickness measurement of less than 60 micrometres, the machining is carried out using a grinding or lapping paste having granules with a mean particle size of more than 20 micrometres.

7. A method according to any of claims 1 to 6, wherein a temperature-sensitive layer, is applied to the semiconductor substrate.

Intellectual

Property

Office

Application No: GB 1701518.1 Examiner: Eamonn Quirk