GB2558496A - Fuzzy caching mechanism for thread execution layouts - Google Patents

Fuzzy caching mechanism for thread execution layouts

Info

Publication number
GB2558496A
GB2558496A GB1807548.1A GB201807548A GB2558496A GB 2558496 A GB2558496 A GB 2558496A GB 201807548 A GB201807548 A GB 201807548A GB 2558496 A GB2558496 A GB 2558496A
Authority
GB
United Kingdom
Prior art keywords
fuzzy
thread
caching mechanism
layouts
caching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB1807548.1A
Other versions
GB201807548D0 (en
Inventor
Martins Leonardo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pontus Networks 1 Ltd
PONTUS NETWORKS 1 Ltd
Original Assignee
Pontus Networks 1 Ltd
PONTUS NETWORKS 1 Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pontus Networks 1 Ltd, PONTUS NETWORKS 1 Ltd filed Critical Pontus Networks 1 Ltd
Publication of GB201807548D0 publication Critical patent/GB201807548D0/en
Publication of GB2558496A publication Critical patent/GB2558496A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5033—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering data affinity
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Stored Programmes (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

System (2900) and methods (2100) for using a fuzzy caching mechanism (2000) to store and retrieve previous thread execution layouts (900,1000). The methods comprising: constructing a fuzzy caching mechanism (2000) with a set of Fuzzy caching input variables 2030, as well as a set of Fuzzy cached thread layout output variables 2040. The Fuzzy Caching Mechanism 2000 may be embodied as an artificial neural network, where the input variables are an optional Calendar Date/time Input 2010, and one or more Key Characteristics of Software Threads 2020. For each thread 1224 for all software components 1202-1212, a set of Key Characteristics of Software Threads 2020 is created. Similarly, the Fuzzy cached thread layout output variables 2040 represent the allocation in all computing cores 1112-1126 for each thread 1224.
GB1807548.1A 2015-11-20 2016-10-28 Fuzzy caching mechanism for thread execution layouts Withdrawn GB2558496A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1520465.4A GB2544530A (en) 2015-11-20 2015-11-20 Fuzzy Caching mechanism for thread execution layouts
PCT/GB2016/053355 WO2017085454A1 (en) 2015-11-20 2016-10-28 Fuzzy caching mechanism for thread execution layouts

Publications (2)

Publication Number Publication Date
GB201807548D0 GB201807548D0 (en) 2018-06-20
GB2558496A true GB2558496A (en) 2018-07-11

Family

ID=55133078

Family Applications (2)

Application Number Title Priority Date Filing Date
GB1520465.4A Withdrawn GB2544530A (en) 2015-11-20 2015-11-20 Fuzzy Caching mechanism for thread execution layouts
GB1807548.1A Withdrawn GB2558496A (en) 2015-11-20 2016-10-28 Fuzzy caching mechanism for thread execution layouts

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB1520465.4A Withdrawn GB2544530A (en) 2015-11-20 2015-11-20 Fuzzy Caching mechanism for thread execution layouts

Country Status (2)

Country Link
GB (2) GB2544530A (en)
WO (1) WO2017085454A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11861403B2 (en) * 2020-10-15 2024-01-02 Nxp Usa, Inc. Method and system for accelerator thread management
CN117640471B (en) * 2024-01-26 2024-04-09 中国人民解放军国防科技大学 Inter-core communication bandwidth measurement method, system and equipment for multi-core processor

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110022870A1 (en) * 2009-07-21 2011-01-27 Microsoft Corporation Component power monitoring and workload optimization
US20110191776A1 (en) * 2010-02-02 2011-08-04 International Business Machines Corporation Low overhead dynamic thermal management in many-core cluster architecture
US20120084777A1 (en) * 2010-10-01 2012-04-05 Microsoft Corporation Virtual Machine and/or Multi-Level Scheduling Support on Systems with Asymmetric Processor Cores
US20120192195A1 (en) * 2010-09-30 2012-07-26 International Business Machines Corporation Scheduling threads
WO2015177691A1 (en) * 2014-05-21 2015-11-26 Pontus Networks 1 Ltd. Thread performance optimization

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110022870A1 (en) * 2009-07-21 2011-01-27 Microsoft Corporation Component power monitoring and workload optimization
US20110191776A1 (en) * 2010-02-02 2011-08-04 International Business Machines Corporation Low overhead dynamic thermal management in many-core cluster architecture
US20120192195A1 (en) * 2010-09-30 2012-07-26 International Business Machines Corporation Scheduling threads
US20120084777A1 (en) * 2010-10-01 2012-04-05 Microsoft Corporation Virtual Machine and/or Multi-Level Scheduling Support on Systems with Asymmetric Processor Cores
WO2015177691A1 (en) * 2014-05-21 2015-11-26 Pontus Networks 1 Ltd. Thread performance optimization

Also Published As

Publication number Publication date
WO2017085454A1 (en) 2017-05-26
GB2544530A (en) 2017-05-24
GB201807548D0 (en) 2018-06-20
GB201520465D0 (en) 2016-01-06

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)