GB2540190B - Check pointing a shift register - Google Patents

Check pointing a shift register Download PDF

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Publication number
GB2540190B
GB2540190B GB201511981A GB201511981A GB2540190B GB 2540190 B GB2540190 B GB 2540190B GB 201511981 A GB201511981 A GB 201511981A GB 201511981 A GB201511981 A GB 201511981A GB 2540190 B GB2540190 B GB 2540190B
Authority
GB
United Kingdom
Prior art keywords
shift register
check pointing
pointing
check
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB201511981A
Other versions
GB201511981D0 (en
GB2540190A (en
Inventor
Day Philip
Bailey Julian
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MIPS Tech LLC
Original Assignee
MIPS Tech LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MIPS Tech LLC filed Critical MIPS Tech LLC
Priority to GB201511981A priority Critical patent/GB2540190B/en
Publication of GB201511981D0 publication Critical patent/GB201511981D0/en
Priority to GB201517325A priority patent/GB2540221B/en
Priority to EP16178017.6A priority patent/EP3115888A1/en
Priority to CN201720185017.8U priority patent/CN206773689U/en
Priority to CN201620722509.1U priority patent/CN206058178U/en
Priority to CN202111144056.0A priority patent/CN113868056A/en
Priority to US15/205,445 priority patent/US20170010819A1/en
Priority to CN201610539460.0A priority patent/CN106339284B/en
Priority to US15/205,555 priority patent/US10025527B2/en
Priority to CN202111144014.7A priority patent/CN113868055A/en
Publication of GB2540190A publication Critical patent/GB2540190A/en
Priority to US16/036,104 priority patent/US10642527B2/en
Application granted granted Critical
Publication of GB2540190B publication Critical patent/GB2540190B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/017—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising using recirculating storage elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30134—Register stacks; shift registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3848—Speculative instruction execution using hybrid branch prediction, e.g. selection between prediction techniques
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Advance Control (AREA)
GB201511981A 2015-07-08 2015-07-08 Check pointing a shift register Expired - Fee Related GB2540190B (en)

Priority Applications (11)

Application Number Priority Date Filing Date Title
GB201511981A GB2540190B (en) 2015-07-08 2015-07-08 Check pointing a shift register
GB201517325A GB2540221B (en) 2015-07-08 2015-09-30 Check pointing a shift register
EP16178017.6A EP3115888A1 (en) 2015-07-08 2016-07-05 Check pointing a shift register
US15/205,445 US20170010819A1 (en) 2015-07-08 2016-07-08 Check pointing a shift register
CN201620722509.1U CN206058178U (en) 2015-07-08 2016-07-08 Obtain the hardware configuration of one or more checkpoints of master shift register
CN202111144056.0A CN113868056A (en) 2015-07-08 2016-07-08 Checkpointing shift registers
CN201720185017.8U CN206773689U (en) 2015-07-08 2016-07-08 Obtain the hardware configuration of one or more checkpoints of master shift register
CN201610539460.0A CN106339284B (en) 2015-07-08 2016-07-08 Checkpointing shift registers
US15/205,555 US10025527B2 (en) 2015-07-08 2016-07-08 Check pointing a shift register using a circular buffer
CN202111144014.7A CN113868055A (en) 2015-07-08 2016-07-08 Checkpointing shift registers
US16/036,104 US10642527B2 (en) 2015-07-08 2018-07-16 Check pointing a shift register with a circular buffer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB201511981A GB2540190B (en) 2015-07-08 2015-07-08 Check pointing a shift register

Publications (3)

Publication Number Publication Date
GB201511981D0 GB201511981D0 (en) 2015-08-19
GB2540190A GB2540190A (en) 2017-01-11
GB2540190B true GB2540190B (en) 2020-01-01

Family

ID=54013677

Family Applications (1)

Application Number Title Priority Date Filing Date
GB201511981A Expired - Fee Related GB2540190B (en) 2015-07-08 2015-07-08 Check pointing a shift register

Country Status (1)

Country Link
GB (1) GB2540190B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050120191A1 (en) * 2003-12-02 2005-06-02 Intel Corporation (A Delaware Corporation) Checkpoint-based register reclamation
US20100082953A1 (en) * 2008-09-30 2010-04-01 Faraday Technology Corp. Recovery apparatus for solving branch mis-prediction and method and central processing unit thereof
US20100161951A1 (en) * 2008-12-18 2010-06-24 Faraday Technology Corp. Processor and method for recovering global history shift register and return address stack thereof
US20130297911A1 (en) * 2012-05-03 2013-11-07 Nvidia Corporation Checkpointed buffer for re-entry from runahead
US20150032997A1 (en) * 2013-07-23 2015-01-29 International Business Machines Corporation Tracking long ghv in high performance out-of-order superscalar processors

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050120191A1 (en) * 2003-12-02 2005-06-02 Intel Corporation (A Delaware Corporation) Checkpoint-based register reclamation
US20100082953A1 (en) * 2008-09-30 2010-04-01 Faraday Technology Corp. Recovery apparatus for solving branch mis-prediction and method and central processing unit thereof
US20100161951A1 (en) * 2008-12-18 2010-06-24 Faraday Technology Corp. Processor and method for recovering global history shift register and return address stack thereof
US20130297911A1 (en) * 2012-05-03 2013-11-07 Nvidia Corporation Checkpointed buffer for re-entry from runahead
US20150032997A1 (en) * 2013-07-23 2015-01-29 International Business Machines Corporation Tracking long ghv in high performance out-of-order superscalar processors

Also Published As

Publication number Publication date
GB201511981D0 (en) 2015-08-19
GB2540190A (en) 2017-01-11

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20180517 AND 20180523

732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20180524 AND 20180530

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20200401