GB2529456A - Intermittent fault simulation system - Google Patents

Intermittent fault simulation system Download PDF

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Publication number
GB2529456A
GB2529456A GB1414846.4A GB201414846A GB2529456A GB 2529456 A GB2529456 A GB 2529456A GB 201414846 A GB201414846 A GB 201414846A GB 2529456 A GB2529456 A GB 2529456A
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United Kingdom
Prior art keywords
ifs
intermittent
simulation
intermittent fault
fault simulation
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GB1414846.4A
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GB201414846D0 (en
Inventor
James David Cockram
Mark Anselm Fleming
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Copernicus Technology Ltd
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Copernicus Technology Ltd
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Priority to GB1414846.4A priority Critical patent/GB2529456A/en
Publication of GB201414846D0 publication Critical patent/GB201414846D0/en
Publication of GB2529456A publication Critical patent/GB2529456A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2846Fault-finding or characterising using hard- or software simulation or using knowledge-based systems, e.g. expert systems, artificial intelligence or interactive algorithms
    • G01R31/2848Fault-finding or characterising using hard- or software simulation or using knowledge-based systems, e.g. expert systems, artificial intelligence or interactive algorithms using simulation
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/54Testing for continuity

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Evolutionary Computation (AREA)
  • Medical Informatics (AREA)
  • General Engineering & Computer Science (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

A fault simulation system 1 for evaluating the performance of multi­channel intermittent fault detection (IFD) test equipment 6 comprises a circuit 4 that creates defined resistance changes of varying characteristics to simulate real-world intermittent faults experienced by electrical/electronic equipment. The system is connected to the IFD tester under evaluation by an interface adapter 5 and to a computing device 2 which hosts intermittent fault simulation software. The software controls switches in the system to switch in or out different resistors, producing changes in resistance on an output channel. This simulates a continuity fault which is detected by the IFD tester if it is operating correctly. Pseudo-random variations of resistance with time or user-defined fault simulation sequences may be produced, saved, run and repeated by the system.

Description

Intermittent Fault Simulation System This invention relates to an electronic device for evaluating the performance of intermittent fault detection (IFD) test equipment in a standardised and repeatable manner by simulating intermittent faults, across multiple test channels, to emulate intermittent fault behaviour experienced in electrical and electronic components, wiring and interconnections.
Intermittent faults are a widespread problem affecting electrical and electronic equipment in everything from aircraft systems to mobile telephones. Intermittent faults occur because of degraded electrical continuity in circuits and wiring, due to a variety of design and operating environment-related causes ranging from vibration to corrosion. The degradation leads to random and variable changes in the ohmic characteristics of the circuits which ultimately, subject to time and operating conditions, will continue to deteriorate to a permanent fault condition. Prior to that point the intermittent fault symptoms present a major challenge to maintenance technicians attempting to diagnose and repair the faults and often results in numerous repair attempts until the problem is solved successfully. This maintenance problem has resulted in the development of test equipment to use for IFD testing of wiring and circuits. Some designs of IFD equipment have multiple test channels to enable them to test multiple circuits for intermittency at the same time.
It is possible to conduct a rudimentary test of the detection performance of IFD equipment's test channels one at a time by using instruments such as signal generators and oscilloscopes; or it is possible to test several lED channels at a time by using multiples of such instruments attached one per channel. However, if the IFD equipment has several hundred test channels then it is extremely time-consuming to test all the IFD channels to the same consistent standard; and the instruments used are not designed to replicate the characteristics of intermittent faults as experienced in faulty systems and wiring.
To overcome these problems the invention provides an Intermittent Fault Simulation (IFS) System with the ability to generate, record and repeat pseudo-random or user-defined ohmic changes of varying characteristics on multiple test channels connected to the IFD tester being checked.
The invention will now be described with reference to the accompanying drawings in which: Figure 1 shows the simple arrangement of the IFS System connected to the IFD tester being evaluated, Figure 2 shows the IFS circuit for each channel within an IFS Unit, Figure 3 shows an example of the varying resistance characteristics of a simulated intermittent fault event which can be generated by an IFS circuit.
The IFS System 1 is controlled by an IFS software application loaded on to a computing device 2, which is connected to the IFS Unit via a USB connection 3. The IFS Unit 4 contains an arrangement of multiple IFS circuits (Figure 2) with each IFS circuit consisting of a group of channels called a segment, with one channel corresponding directly with one test channel. Hence the IFS Unit design is scalable and can be assembled with multiple segments and multiple channels. The control and selection of each of the segments is carried out by a microcontroller via multiplexing devices. The process for generating a simulated intermittent fault occurrence is carried out by first creating the profile in the IFS software application which in turn selects the segment and channel, sets the command paths and simultaneously commands the channel to create the simulated fault ie the ohmic change. The command process is time critical and is undertaken by purpose-designed firmware that ensures that the characteristics of the fault profile are consistent.
64 or 128 channels could be considered to be a useful minimum size of IFS System, however the number of test channels needed will depend on the number of channels to be tested on different designs of IFD test equipment. An Interface Adapter cable 5 connects to each test channel output on the IFS Unit -via an external connector on the IFS Unit -to all of the test channels to be evaluated on the IFD Tester 6 under test.
The IFS software application provides a Graphical User Interface (GUI) so that the parameters of the IFS sequence can be managed by the user in terms of creating, saving, importing, running and monitoring simulation sequences. The user can either select: a. The set-up of a pseudo-random IFS sequence, whereby the software automatically creates a sequence of x' resistance changes in y' minutes (where x and y are user defined) which is pseudo-random with respect to which test channels will be triggered', and with respect to the simulated faults' resistance characteristics (duration, ohmic variance, profile and frequency); b. Or the creation of a user-defined sequence, whereby the user determines which test channels will be triggered, at what point in time and with what resistance characteristics (duration, ohmic variance, profile and frequency).
If creating a pseudo-random IFS sequence the fault profiles are randomly selected from a library of profiles, the duration is randomly selected from between upper and lower limits specified by the user, the time the fault occurs within the run period is randomly selected within the time specified (y) for the IFS sequence. All random generation calculations are conducted using Microsoft standard frameworks.
After creating an IFS sequence the IFS software saves the sequence so it can be used on multiple occasions to enable a standardised, like-for-like comparison of different designs or modification standard of IFD test equipment performance to be carried out using same IFS sequence(s).
To carry out an IFS test evaluation of an IFD test equipment, the IFS SYSTEM 1 is connected to the IFD tester being evaluated 6 as per the arrangement in Figure 1. The IFS sequence is then set-up using the IFS software application as described above, and the IFS sequence is run.
When the sequence is running the software application controls the switching of the IFS circuits (Figure 2) connected to each test channel. The IFS software operates high speed routing switches in the IFS circuits individually, or as groups, for appropriate periods of time delay between OFF/ON/OFF and ON/OFF/ON operations. These switches are for routing the command signals only and their operation is not part of the simulated fault generation, and therefore their operation is not time-critical in relation to the generated fault duration (which is designed to be in the nanosecond region). Whilst these routing switches are all set in slow-time' (ie micro/millisecond range, including USB communication, confirmation and initiation of the simulated fault event), the switching of the command signals on the IFS circuit's command lines (shown as IN1 to 3 on Figure 2) can be switched rapidly (in the nanosecond region) using purpose-designed firmware.
For each simulated fault the command lines will be made HIGH incrementally until the desired output resistance is achieved. Example resistance values of 10, 1 KU, 1 OKO and 1 OOKU are shown in Figure 2 but any relevant quantity of switches and resistors and any stepped combination of resistor values could be used in the construction of the IFS circuit.
The switching and command line arrangement then switches out different combinations of the resistors in the IFS circuit to create the change in resistance on the corresponding IFS SYSTEM test channel. This resistor-switching-out technique results from the IFS sequence set up in the IFS software application and so by changing the order and duration with which the IFS circuit resistors are switched out/in the profile of the resistance change is created in terms of both duration and amplitude. The resistor-switching-out technique provides a more realistic intermittent fault profile, while also allowing a better steady state for the channels that are not being switched, as well as providing better Electro-Static Discharge protection. An example of a resistance change profile generated by this method is shown in Figure 3, and these profiles can be user-defined to represent typical intermittent fault characteristics as experience in fielded equipment.
When the IFS sequence has been completed the saved sequence details, including time-stamping of when each simulated fault (ie resistance change) was triggered, can be manually compared with the detection results of the IFD tester being evaluated to identify how many and which type of simulated intermittent faults were correctly detected. The IFS sequence can then be repeated on the same IFD tester 6 or implemented on another design of IFD tester for comparison purposes.

Claims (15)

  1. Claims An Intermittent Fault Simulation (IFS) System for evaluating the performance of Intermittent Fault Detection (IFD) test equipment, the System containing a multi-channel IFS Unit that generates variable resistance changes on each test channel connected to the IFD tester being evaluated, thus simulating real-world intermittent faults experienced by electrical/electronic equipment.
  2. 2. An Intermittent Fault Simulation (IFS) System according to claim 1, wherein the simulated intermittent faults are represented by resistance changes created by IFS circuits, which contain an arrangement of high-speed switches that select combinations of resistors to generate the resistance changes on each test channel, the circuits being voltage and current tolerant to enable connection to a range of Intermittent Fault Detection test equipment types.
  3. 3. An Intermittent Fault Simulation (IFS) System according to claim 1, wherein the sequence and characteristics of simulated intermittent faults are compiled by use of a purpose-designed software application loaded on to a computing device connected to the IFS Unit.
  4. 4. An Intermittent Fault Simulation circuit according to claim 2 wherein the selective switching out of specific resistors in the circuit, for specific durations, creates a resistance change in both time and ohmic variation while maintaining a steady state on adjacent channels, thus simulating real-world intermittent faults in electrical/electronic equipment.
  5. 5. An Intermittent Fault Simulation System (IFS) according to claims 1 and 3, wherein the fault simulation functionality of the IFS Unit is controlled by use of the purpose designed software application which is used to create, save, run, record and repeat user-defined IFS sequences.
  6. 6. An Intermittent Fault Simulation System (IFS) according to claims 4 and 5 wherein the specific durations of simulated intermittent faults can be set up by the user using the software application and then, when running the simulation sequence, generated by the IFS Unit as the appropriate duration resistance changes.
  7. 7. An Intermittent Fault Simulation (IFS) System according to claims 4 and 5 wherein the specific ohmic variation of simulated intermittent faults can be set up by the user using the software application and then, when running the simulation sequence, generated by the IFS Unit as the corresponding ohmic variation.
  8. 8. An Intermittent Fault Simulation (IFS) System according to claims 4 and 5 wherein the simulated intermittent faults can be set up by the user using the software application to trigger on specified test channels connected to the Intermittent Fault Detection Tester being evaluated and then, when running the simulation sequence, generated by the IFS Unit as the appropriate resistance changes on the specified channels.
  9. 9. An Intermittent Fault Simulation (IFS) System according to claims 4 and 5 wherein the simulated intermittent faults can be set up by the user using the software application to trigger after a specific time has elapsed when running the simulation sequence, which is then generated by the IFS Unit as the appropriate resistance changes at the specified elapsed time.
  10. 10. An Intermittent Fault Simulation (IFS) System according to claims 6 and 7 wherein specific profiles of resistance change can be set up using the software application by selecting specific combinations of simulated fault duration and ohmic variation to create for example stepped, ramped, saw-tooth and square-wave fault profiles to simulate real-world intermittent fault characteristics; and then, when running the simulation sequence, the IFS Unit generates the appropriate duration/ohmic variation profiles.
  11. 11. An Intermittent Fault Simulation (IFS) System according to claim 10 in which the firmware library is tuned to enable the IFS circuits to generate highly consistent and repeatable simulated fault profiles on each test channel output in terms of ohmic variance profile, duration of fault and frequency.
  12. 12. An Intermittent Fault Simulation (IFS) System according to claim 2 comprising a quantity of IFS circuits, with each circuit connected to a test channel output and each circuit able to generate resistance changes to simulate intermittent faults.
  13. 13. An Intermittent Fault Simulation (IFS) System according to claim 12 wherein the size of the IFS Unit's design can be determined and scaled up or down accordingly in relation to the number of test channels to be evaluated on an Intermittent Fault Detection tester.
  14. 14. An Intermittent Fault Simulation (IFS) System according to claims 5, 6, 7, 8, 9 and 10 wherein the user can choose to manually compile a user-defined IFS sequence or they can select the creation of a pseudo-random sequence by the software application.
  15. 15. An Intermittent Fault Simulation (IFS) System according to claims 5 and 14 wherein the IFS software application saves all compiled simulation sequences, both user-defined and pseudo-random, so that they can be repeated identically for testing the same or different designs of Intermittent Fault Detection test equipment for comparison purposes.
GB1414846.4A 2014-08-20 2014-08-20 Intermittent fault simulation system Withdrawn GB2529456A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020133196A1 (en) 2020-12-11 2022-06-15 Weetech Gmbh Connection tester and method for testing an intermittent change in impedance

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111736091B (en) * 2020-05-27 2022-11-29 湖南省湘电试验研究院有限公司 Unstable high-resistance ground fault simulation circuit based on RTDS platform and application method thereof
CN114966482B (en) * 2022-05-07 2024-04-26 中国人民解放军63653部队 Intermittent fault recurrence method for electric connector based on stepping stress
CN115542227B (en) * 2022-10-25 2023-07-18 浙江华电器材检测研究院有限公司 Software simulation verification method, system, device and medium for true test

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103985300A (en) * 2009-11-16 2014-08-13 江苏省电力公司常州供电公司 Cable fault simulating and positioning system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103985300A (en) * 2009-11-16 2014-08-13 江苏省电力公司常州供电公司 Cable fault simulating and positioning system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020133196A1 (en) 2020-12-11 2022-06-15 Weetech Gmbh Connection tester and method for testing an intermittent change in impedance
EP4012430A1 (en) 2020-12-11 2022-06-15 Weetech GmbH Connection testing device and method for testing intermittent impedance change
US11493546B2 (en) 2020-12-11 2022-11-08 Weetech Gmbh Connection test device and method for checking an intermittent impedance variation

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