GB2518650A

GB2518650A - Circuit arrangement and method for designing a circuit arrangement of a system for inductive power transfer

Info

Publication number: GB2518650A
Application number: GB1317152.5A
Authority: GB
Inventors: Robert Czainski; Frederico Garcia
Original assignee: Bombardier Transportation GmbH
Current assignee: Alstom Transportation Germany GmbH
Priority date: 2013-09-27
Filing date: 2013-09-27
Publication date: 2015-04-01
Also published as: WO2015044288A1; CN105050851A; GB201317152D0

Abstract

A system for inductive power transfer, in particular to an electric vehicle, where the circuit arrangement comprises at least one phase line having an inductance and a capacitance that are chosen such that a resonant frequency of the phase line matches a predetermined operating frequency (Ï‰). The capacitance is provided by at least two capacitive subcircuits C1, C2 and the inductance is provided by at least two inductive subcircuits L1, L2. The inductive subcircuits and the capacitive subcircuits are arranged such that a maximal absolute value of the potential V along the phase line is smaller than a predetermined potential. The inductive subcircuits may comprise an inductive element e.g. a winding or coil. The circuit arrangement may be part of the primary or secondary unit of the system for inductive power transfer. The circuit arrangement may comprise three phase lines. The electric vehicle may be a track bound vehicle such as a train or tram, or a road automobile.

Description

Circuit arrangement and method for designing a circuit arrangement of a system for inductive power transfer The invention relates to a circuit arrangement and a method of designing a circuit arrangement of a system for inductive power transfer, in particular a circuit arrangement of a primary unit or a receiving device of a system for inductive power transfer, in particular of inductive power transfer to a vehicle. Further, the invention relates to a secondary unit and to a primary unit.

Electric vehicles, in particular a track-bound vehicle, and/or a road automobile, can be operated by electric energy which is transferred by means of an inductive power transfer.

Such a vehicle may comprise a circuit arrangement which can be a traction system or a part of a traction system of the vehicle. Also, a vehicle can comprise a so-called receiving device adapted to receive an alternating electromagnetic field and to produce an alternating electric current by electromagnetic induction. Such a receiving device can comprise or provide the circuit arrangement. Furthermore, such a vehicle can comprise a rectifier adapted to convert an alternating current (AC) to a direct current (DC). The DC can be used to charge a traction battery or to operate an electric machine. A rectifier converts the AC provided by the receiving device into the DC.

Alternatively, the circuit arrangement can be a part of a primary unit of the inductive power transfer system, wherein said primary unit comprises or provides the circuit arrangement.

The inductive power transfer is usually performed using the primary unit which generates the alternating electromagnetic field and a secondary unit which comprises the receiving device for receiving said electromagnetic field. The primary unit and the secondary unit can e.g. each comprise a set of three-phase windings. A set of windings of the primary unit can be installed on the ground (primary windings) and can be fed by a wayside power converter (WPC). A set of windings of the secondary unit is installed on the vehicle. For example, the second set of windings can be attached underneath the vehicle, in the case of trams under some of its wagons. The set of windings of the primary unit can also be referred to as primary side, wherein the set of windings of the secondary unit can be referred to as secondary side. The first and the secondary side can be part of a high frequency transformer to transfer electric energy to the vehicle. This transfer can be done in a static state (when there is no movement of the vehicle) and in a dynamic state (when the vehicle moves).

The first or the second set of windings can be part of the aforementioned circuit arrangement. The windings of the primary unit and the secondary unit provide inductive elements.

To transfer high power levels, it is necessary to use an adequate capacitance in order to compensate the reactance of the inductors of the circuit arrangement at a predetermined operating frequency, e.g. 20 kHz. The combination of the inductance and the (compensating) capacitance forms a resonant circuit. A perfect impedance cancellation happens if impedance values of the inductance and of the capacitance are chosen such that the natural resonant frequency of the resonant circuit is equal to the operating frequency. Such a resonant circuit is said to be tuned.

GB 1216184.0 (not yet published) discloses a circuit arrangement, wherein the circuit arrangement comprises an impedance and at least one rectifier for rectifying an AC voltage, wherein an AC part of the circuit arrangement comprises the impedance. The rectifier connects the AC part to a DC part of the circuit arrangement. The circuit arrangement further comprises at least one current control means for controlling a current flow in the AC part. Further, the impedance is provided by an inductance and a capacitance, wherein the capacitance is connected in series to the inductance. The document, however, discloses only a single capacitor which is connected in series to a single inductive element.

GB 1219724.0 (not yet published) discloses a circuit arrangement, wherein the circuit arrangement comprises a pick-up arrangement and at least one variable compensating arrangement, wherein the variable compensating arrangement comprises a capacitive element. The variable compensating arrangement further comprises a first switching element and a second switching element.

Within a phase line of a primary unit or secondary unit of a system of inductive power transfer, high potential levels can occur during power transfer. These potential levels require a high insulation effort and limit the number of components which can be used in a design of said phase line.

It is an object of the present invention to provide a circuit arrangement of a primary unit and/or a secondary unit of a system for inductive power transfer and a method of designing said circuit arrangement by which a maximal absolute value of a potential along a phase line of the primary unit and/or the secondary unit is reduced in an operating state, wherein a difference between a resonant frequency of the phase line and a predetermined operating frequency is minimized. Another object of the invention is to provide a primary unit and a secondary unit, in particular a secondary unit of a vehicle, each comprising such a circuit arrangement.

It is a basic idea of the invention to distribute a required (compensation) capacitance and/or a required inductance to multiple subcircuits along the phase line, wherein the phase line comprises said subcircuits, and further arrange the subcircuits such that the maximal absolute value of the potential which occurs along the phase line is limited to a predetermined value.

A circuit arrangement of a system for inductive power transfer is proposed. The system for inductive power transfer is in particular a system for inductive power transfer to a vehicle.

The present invention can be applied to any land vehicle (including but not preferably, any vehicle which is only temporarily on land), in particular track-bound vehicles, such as rail vehicles (e.g. trams), but also to road automobiles, such as individual (private) passenger cars or public transport vehicles (e.g. busses including trolley busses which are also track-bound vehicles).

The proposed circuit arrangement can be a part of a secondary unit or a receiving device, wherein the receiving device is used to receive an alternating electromagnetic field which is generated by a primary unit. Further, the receiving device generates an AC voltage.

In particular, a receiving device can provide or be a part of a secondary unit of a transformer, wherein the transformer is used to transfer energy from e.g. a route-sided primary unit to the vehicle. The route-sided primary unit can e.g. be installed on or in a ground providing a driving surface for the vehicle. The receiving device can be installed at a bottom side of the vehicle, e.g. a side facing the driving surface.

Alternatively, the proposed circuit arrangement can be a part of a primary unit of the system for inductive power transfer, wherein the primary unit generates the alternating

electromagnetic field.

The circuit arrangement comprises at least one phase line. Preferably, the circuit arrangement comprises three phase lines. The three phase lines can be electrically arranged in parallel. It is possible to connect the three phase lines in a delta or star connection. It is also possible that the three phase lines are designed independent from each other.

The at least one phase line has a resulting inductance. The resulting inductance denotes the inductance resulting from all inductive elements of the phase line. The phase line can comprise at least one inductive element, e.g. for generating or receiving the alternating electromagnetic field. The inductive element can e.g. be a winding structure, for instance a coil.

Further, the at least one phase line has a resulting capacitance. The resulting capacitance denotes a capacitance resulting from all capacitive elements of the phase line. Thus, the at least one phase line can comprise at least one capacitive element. The at least one capacitive element can be a compensating capacitive element which is arranged within the phase line in order to tune the resonant circuit provided by the phase line such that its resonant frequency matches a desired operating frequency. In the context of this invention, the term "tune" can mean that a desired resonant frequency point is set.

The resulting inductance and the resulting capacitance of the phase line are chosen such that a resonant frequency of the phase line matches a predetermined operating frequency. In current embodiments, an operating frequency can be chosen in a range from 20 kHz to 300 kHz. This does, however, not exclude the choice of a higher or lower operating frequency. The operating frequency can be chosen depending on a desired (maximum) power to be transferred by the inductive power transfer system. The desired power to be transferred can e.g. be chosen up to 500 kW. The desired power can correspond to a power provided at an output of the secondary unit, e.g. a power provided to a secondary-sided battery.

The predetermined operating frequency can e.g. be 20 kHz. The term "matches" includes the case that a difference between the predetermined operating frequency and the resonant frequency is smaller than a predetermined threshold value. Preferably, the resonant frequency of the phase line equals to the predetermined operating frequency.

Thus, the resulting inductance and the resulting capacitance of the phase line can be chosen such that the phase line is tuned to the operating frequency.

According to the invention, the resulting capacitance is provided by at least two capacitive subcircuits. A capacitive subcircuit denotes a circuit arrangement of one or multiple capacitive elements, preferably one or multiple capacitors. If the capacitor subcircuit comprises more than one capacitive element, these capacitive elements can be connected in series or parallel. It is, however, possible that the capacitive subcircuit only comprises one capacitive element, e.g. one capacitor. The feature that the resulting capacitance is provided by at least two capacitive subcircuits includes the case that the resulting capacitance is provided partially by at least two capacitive subcircuits. The at least two capacitive subcircuits are designed and/or arranged independently of each other, in particular as separate subcircuits or elements. This means, for example, that at least one other electric element is electrically arranged between the two capacitive subcircuits or that the two capacitive subcircuits are connected by at least one other electric element.

The resulting capacitance, however, can also be provided partially by capacitances of other electric elements of the phase line.

Alternatively or in addition, the resulting inductance is provided by at least two inductive subcircuits. An inductive subcircuit denotes a circuit arrangement which comprises one or multiple inductive elements, e.g. winding structures, in particular coils. Preferably, an inductive subcircuit consists of one winding structure, e.g. one coil. As in the case of the at least two capacitive subcircuits, the resulting inductance can also be provided partially by inductances of other electric elements of the phase line. The at least two inductive subcircuits are designed and/or arranged independently of each other, in particular as separate subcircuits or elements. This means, for example, that at least one other electric element is electrically arranged between the two inductive subcircuits or that the two inductive subcircuits are connected by at least one other electric element.

This means that if the phase line comprises at least two capacitive subcircuits, the phase line can comprise one or multiple inductive subcircuits. Also, if the phase line comprises at least two inductive subcircuits, the phase line can comprise one or multiple capacitive subcircuits.

The at least two inductive subcircuits and/or the at least two capacitive subcircuits within the phase line are arranged such that a maximal absolute value of a potential along the phase line is smaller than a predetermined potential. The term "potential" denotes a potential with respect to a reference level, in particular a ground level. This means that in each section or at each point of the phase line, the absolute value of the potential is smaller than the predetermined potential. In other words, the at least two inductive subcircuits and/or the at least two capacitive subcircuits can be distributed along the phase line such that a maximal absolute value of the potential along the phase line is smaller than a predetermined potential. This, in turn, means that the previously mentioned resulting capacitance and/ or resulting inductance is distributed among the at least two capacitive and/or inductive subcircuits and thus distributed along the phase line.

Within the phase line, the proposed capacitive subcircuits and/or the proposed inductive subcircuits can be connected in series.

In particular, the at least two inductive subcircuits and/or the at least two capacitive subcircuits within the phase line can be arranged such that a maximal absolute value of the potential along the phase line is smaller than an absolute value of a voltage drop across a virtual inductive element if a predetermined maximal phase current flows through the virtual inductance at the predetermined operating frequency. The inductance of the virtual inductive element equals to the resulting inductance of the phase line, e.g. the sum of the inductances of all inductive elements of the phase line.

In particular, the arrangement can be made such that the maximal absolute value of the achievable potential along the phase line is smaller than a predetermined percentage, e.g. 75%, 50% or 25%, of the absolute value of the voltage drop across the virtual inductive element.

The virtual inductive element can be part of an equivalent circuit of the phase line, wherein the equivalent circuit is provided by a series connection of the single virtual inductive element and a single virtual capacitive element, wherein a capacitance of the virtual capacitive element equals to the resulting capacitance. Thus, the predetermined potential can be the maximal potential within an equivalent LC series circuit which comprises one inductive element and one capacitive element and which has the same resulting inductance and the same resulting capacitance.

Within this disclosure, current values and voltage values refer to effective values or RMS-values (root mean square values) of the corresponding alternating currents or voltages.

The proposed circuit arrangement advantageously provides a lower potential along the phase line and thus across or within the electric elements arranged within the phase line.

This, in turn, reduces insulation requirements for the elements. This, in turn, allows reducing a required building space and costs. Furthermore, a higher power transmission is possible. Additionally, by using multiple inductive and/or capacitive subcircuits, a large freedom of tuning the phase line and resonant point achievement is provided.

Another major advantage is that a fine tolerance for tuning the resonant circuit provided by the phase line is permitted.

Another advantage is that a lifetime of the components, in particular of the capacitive elements, is extended.

In a preferred embodiment, the inductive subcircuit(s) and the capacitive subcircuit(s) are arranged alternately in at least one section of the phase line. In other words, the inductive subcircuit(s) and the capacitive subcircuit(s) are distributed alternately along at least one section of the phase line.

Each inductive subcircuit and each capacitive subcircuit can be assigned a first and a second terminal, wherein a current flowing through the first terminal equals to a current flowing through a second terminal of the respective subcircuit.

Alternating means that a second terminal of a first inductive subcircuit is electrically connected to a first terminal of a capacitive subcircuit, wherein a second terminal of said capacitive subcircuit is connected to a first terminal of a second inductive subcircuit and so on. In this case, the first inductive subcircuit can provide the first element of the phase line, e.g. with respect to a predetermined direction of a phase current.

Equivalently, a second terminal of a first capacitive subcircuit can be electrically connected to a first terminal of an inductive subcircuit, wherein a second terminal of said inductive subcircuit is connected to a first terminal of a second capacitive subcircuit. In this case, the first capacitive subcircuit can provide the first electric element of the phase line.

With respect to a current flow in the predetermined direction, it can be assumed that the potential will increase if the current flows through an inductive subcircuit. This means, that a potential at the second terminal of the inductive subcircuit will be higher than the potential at the first terminal of the subcircuit. In contrast, a potential will decrease if the current flows through a capacitive subcircuit. This means, that the potential of the first terminal of a capacitive subcircuit is higher than a potential of the second terminal of said capacitive subcircuit. This, however, refers to a common direction of the current flow, wherein the current flows through each subcircuit from the first to the second terminal. As will be explained later, the voltage increase across an inductive subcircuit and the voltage decrease across a capacitive subcircuit is only a convention made for illustrative purposes. Alternatively, it can be assumed that the voltage decreases across an inductive subcircuit and the voltage increases across a capacitive subcircuit.

By arranging the subcircuit alternately, an increase of the potential provided by an inductive subcircuit or inductive element is at least partially compensated by a decrease of the potential provided by a capacitive subcircuit. Thus, such a configuration advantageously provides a relatively simple minimization of the absolute value of the maximal absolute value of the potential along the phase line.

In an alternative embodiment, two inductive subcircuits enframe two capacitive subcircuits in at least one section of the phase line. In this embodiment, the two capacitive subcircuits are connected in series. In other words, a second terminal of a first inductive subcircuit is connected to a first terminal of a first capacitive subcircuit, wherein a second terminal of the first capacitive subcircuit is connected to a first terminal of a second capacitive subcircuit. A second terminal of the second capacitive subcircuit is connected to a first terminal of a second inductive subcircuit.

Alternatively, two capacitive subcircuits enframe two inductive subcircuits in at least one section of the phase line. In this case, the two inductive subcircuits are connected in series. In other words, a second terminal of the first capacitive subcircuit is connected to a first terminal of a first inductive subcircuit, wherein a second terminal of the first inductive subcircuit is connected to a first terminal of a second inductive subcircuit. A second terminal of the second inductive subcircuit is connected to a first terminal of a second capacitive subcircuit.

This advantageously allows distributing voltages across multiple capacitive or inductive subcircuits which are connected in series, which, in turn, reduces a voltage drop across each of the capacitive or inductive subcircuits.

In another embodiment, a capacitive subcircuit is designed such that a predetermined phase current is smaller than or equal to a maximal allowable current of the capacitive subcircuit. The phase current denotes a predetermined current which flows through the phase line comprising the inductive subcircuit(s) and/or the capacitive subcircuit(s) during an operation of the phase line, e.g. if the electromagnetic power field is generated or received.

The maximal allowable current is determined depending on the arrangement and/or the electric properties of at least one capacitive element, e.g. a capacitor, of the capacitive subcircuit. A capacitive element will have certain predetermined electric properties such as a maximal allowable voltage drop across the capacitive element or a maximal allowable current flow through the capacitive element. These electrical properties can be frequency-dependent. Depending on the chosen capacitive elements and their electrical arrangement (e.g. a series and/or a parallel connection of capacitive elements) a maximal allowable current through the capacitive subcircuit can be determined. If, for example, all capacitive elements of the capacitive subcircuit are connected in series, the maximal allowable current of the capacitive subcircuit will be the minimum of the allowable currents of the capacitive elements of the series connection.

In addition or alternatively, a capacitive subcircuit is designed such that a subcircuit voltage generated by the predetermined phase current is smaller than or equal to a maximal allowable subcircuit voltage. As in the case of the current condition, the maximal allowable subcircuit voltage can be determined depending on the arrangement and/or the electric properties of at least one capacitive element of the capacitive subcircuit. The subcircuit voltage can e.g. fall across the aforementioned first and second terminal of the subcircuit or across one capacitive element of the subcircuit.

In general, the design of each capacitive and/or inductive subcircuit, in particular the choice of capacitive or inductive elements and their electrical arrangement within a respective subcircuit will be done depending on the predetermined phase current.

This advantageously allows providing subcircuits which are able to withstand a predetermined phase current and/or the voltage generated by the predetermined phase current. The voltage generated by the predetermined phase current can denote a voltage falling across the subcircuit, e.g. across the first and the second terminal of each subcircuit.

In another embodiment, the number of capacitive elements and/or the electric properties of each capacitive element is/are chosen such that the resulting reactive power which can be fed to the arrangement of all capacitive elements is higher than or, preferably, equal to a total reactive power which can be fed to the phase line. The total reactive power of the phase line can be a predetermined or desired value.

In other words, the number of capacitive elements and/or the electric properties of the capacitive elements of all capacitive subcircuits have to provide a reactive power absorbability higher than or equal to a demanded total reactive power absorbability of the phase line. The electric properties of a capacitive element can e.g. be a capacitance of the capacitive element. This means, that a number of capacitive elements and/or their capacitances can be determined for the total phase line, and thus not necessary for each subcircuit. A distribution of the capacitive elements onto the different subcircuits can be done in another design step.

In another embodiment, the number of capacitive elements and/or the electrical properties of at least one capacitive element and/or the electrical arrangement of the at least one capacitive element is/are chosen such that a maximal current through the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable current through the at least one capacitive element, in particular if the phase line is operated at the operating frequency and the predetermined phase current flows through the phase line. In this context, the arrangement of the at least one capacitive element relates to an electric arrangement relative to or a connection to other electric elements of the phase line or respective subcircuit.

This means that the respective capacitive element is not operated at its maximal allowable current. This advantageously reduces a heat generation and prolongs a lifetime of the capacitive element.

In addition or alternatively, a maximal reactive power which is fed to the at least one capacitive element, in particular if the phase line is operated at the operating frequency and the predetermined phase current flows through the phase line, is smaller than a predetermined percentage of the maximal allowable reactive power which can be fed to the at least one capacitive element.

Alternatively or in addition, a maximal voltage across the at least one capacitive element, in particular if the phase line is operated at the operating frequency and the predetermined phase current runs through the phase line, is smaller than a predetermined percentage of the maximal allowable voltage across the at least one capacitive element.

Preferably, the electrical properties of each capacitive element and/or the electrical arrangement of each capacitive element is/are chosen according to the aforementioned criteria. This means that the aforementioned limitation of the current, reactive power and/or voltage can hold for all capacitive elements of the phase line or for all capacitive elements of one capacitive subcircuit.

The maximal allowable current, reactive power and/or voltage can be predetermined values depending on the type of capacitive elements chosen. In particular, said values can be provided by a manufacturer.

All the limitations advantageously allow operating the capacitive elements with less heat generation and thus providing a longer lifetime of each capacitive element.

Further proposed is a method of designing a circuit arrangement of a receiving device of a system for inductive power transfer, in particular of inductive power transfer to a vehicle.

The method comprises the steps of -determining a resulting inductance and a resulting capacitance of at least one phase line such that a resonant frequency of the phase line is equal to a predetermined operating frequency. In this step, the resulting inductance can be a resulting inductance of predetermined or existing inductive elements, such as winding structures, in particular winding structures for generating or receiving an alternating

electromagnetic field, within the phase line.

According to the invention, the method further comprises the steps of -providing the resulting capacitance by at least two capacitive subcircuits and/or the resulting inductance by at least two inductive subcircuits, -arranging the at least two inductive subcircuits and/or the at least two capacitive subcircuits within the phase line such that a maximal absolute value of a potential along the phase line is smaller than a predetermined potential.

In particular, the maximal absolute value of the potential is smaller than a maximal absolute value of a potential of an equivalent circuit of the phase line comprising only a series connection of a single inductive and a single capacitive element if the phase line or the equivalent circuit are operated at a predetermined frequency and the predetermined phase current runs through the phase line or the equivalent circuit.

This advantageously allows reducing the maximal potential along the phase line which, in turn, leads to less insulation requirements for the elements of the phase line.

In another embodiment, the inductive subcircuit(s) and the capacitive subcircuit(s) are arranged alternately in at least one section of the phase line.

In an alternative embodiment, the inductive subcircuit(s) and the capacitive subcircuit(s) are arranged such that two inductive subcircuits enframe two capacitive subcircuits or such that two capacitive subcircuits enframe two inductive subcircuits in at least one section of the phase line.

This, of course, makes it possible, that in one section of the phase line an alternating arrangement of inductive and capacitive subcircuits is provided, wherein in another section of the phase line inductive subcircuits enframe capacitive subcircuits or vice versa.

In another embodiment, the method comprises the step of: -determining an inductance of a predetermined number of inductive subcircuits within the phase line.

This inductance equals to the resulting inductance of the phase line.

The next step is to determine the resulting capacitance. Thus, the resulting capacitance can be chosen depending on the predetermined or given resulting inductance, the chosen operating frequency and, if applicable, a resulting resistance of the phase line.

In a next step, a number of capacitive subcircuits is defined, wherein the number is larger than one. This means that at least two capacitive subcircuits are chosen to be integrated into the phase line.

In a next step, the capacitive subcircuits are designed such that the resulting capacitance is provided and a predetermined phase current is smaller than or equal to a maximal allowable current of the capacitive subcircuits, wherein the maximal allowable current is determined depending on the arrangement and/or the electric properties of at least one capacitive element of a capacitive subcircuit. Alternatively or in addition, the capacitive subcircuits are designed such that a subcircuit voltage generated by the predetermined phase current is smaller than or equal to a maximal allowable subcircuit voltage.

In a final step, the capacitive subcircuits are arranged within the phase line such that the maximal absolute value of the potential along the phase line is smaller than the predetermined potential.

Thus, the arrangement of capacitive subcircuits along the phase line is done after the respective capacitive subcircuits are designed. Designing the capacitive subcircuits means that an arrangement and/or electric properties of capacitive elements, e.g. capacitors, of the capacitive subcircuit(s) is/are chosen. This, in turn, advantageously allows a fast and robust design of the phase line with multiple capacitive and/or inductive subcircuits.

In another embodiment, the number of capacitive subcircuits is increased, in particular increased by one, if at least one capacitive subcircuit is not designable such that the predetermined phase current is smaller than or equal to a maximal allowable current of the capacitive subcircuit and/or a subcircuit voltage generated by the predetermined phase current is smaller than or equal to a maximal allowable subcircuit voltage or if the capacitive subcircuits are not arrangeable within the phase line such that the maximal absolute value of the potential along the phase line is smaller than the predetermined potential. Thus, an iterative process is proposed, in which the number of capacitive subcircuits is increased until all design requirements, namely the requirements concerning the design of each subcircuit and the requirement of arrangement of the subcircuits, is met. This advantageously allows arriving at a design with a minimal number of subcircuits which meets the said requirements.

In a preferred embodiment, capacitive elements of the capacitive subcircuits are chosen from a set of predetermined capacitive elements. The set of predetermined capacitive elements e.g. denotes a set of capacitors with different electric properties, e.g. different maximal allowable currents, different maximal allowable voltages and different capacitances. It is, for instance, possible to design the capacitive subcircuits with only one type of capacitive element, e.g. one capacitor with predetermined electric properties.

This advantageously allows restricting the design process to a number of preferred capacitive elements.

In another embodiment, the total number of capacitive elements per phase line and/or the electric properties of at least one, preferably each, capacitive element is/are chosen such that the resulting reactive power which can be fed to the arrangement of all capacitive elements is higher than or equal to a total reactive power which can be fed to the phase line. This step can be performed before or after the design of the capacitive subcircuits. In this case, as explained previously, the number of all capacitive elements within the phase line is determined and not necessarily the number of capacitive elements in one capacitive subcircuit. The resulting reactive power which can be fed to the arrangement of all capacitive elements can denote a maximal reactive power which is absorbable by the arrangement.

Alternatively or in addition, the total number of capacitive elements per phase line and/or the electric properties of at least one, preferably each, capacitive element is/are chosen such that a difference between the resonant frequency of the phase line to a desired operating frequency is smaller than a predetermined threshold value. The ability to choose the number and/or electric properties of the capacitive elements in different distribution configurations of the phase line advantageously provides the opportunity to adjust a desired tuning point with a high precision. This means that the resonant frequency of the phase line can be adjusted precisely. The more capacitive elements are used, the finer the desired resonant frequency can be adjusted. The multiplicity of these combinations is huge, providing a very small step tolerance of total capacitance for tuning.

Preferably, the total capacitance will be distributed proportionally or equally to each capacitive element of the phase line.

In another embodiment, the number of capacitive elements and/or the electric properties of at least one capacitive element and/or the arrangement of the at least one capacitive elements is/are chosen such that a maximal current through the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable current through the at least one capacitive element. Alternatively or in addition, a maximal reactive power which is fed to the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable reactive power which can be fed to the at least one capacitive element. Further alternatively or in addition, a maximal voltage across the at least one capacitive element can be smaller than a predetermined percentage of the maximal allowable voltage across the at least one capacitive element.

The mentioned criteria especially hold in the case that the phase line is operated at a predetermined operating frequency or at the resonant frequency.

The aforementioned percentage can be in the range of 50% -90%, in particular within the range of 50% -70%.

Preferably, the electrical properties of each capacitive element and/or the electrical arrangement of each capacitive element is/are chosen according to the aforementioned criteria.

This advantageously allows designing the phase line or, in particular, one or each capacitive subcircuit such that a heat dissipation is minimized and a lifetime is prolonged.

In another embodiment, the capacitance of each capacitive subcircuit is equal. This means that the resulting capacitance is distributed equally among the capacitive subcircuits. This advantageously allows a very simple design of the phase line as only one type of capacitive subcircuit has to be integrated and distributed onto the phase line.

Further proposed is a secondary unit, wherein the secondary unit comprises a circuit arrangement according to one of the previously described embodiments. The secondary unit can be a part of a vehicle. Thus, a vehicle comprising a circuit arrangement according to one of the previously described embodiments is also described. The secondary unit can also comprise a rectifier for rectifying the AC voltage provided by the circuit arrangement of the secondary unit.

Further proposed is a primary unit, wherein the primary unit comprises a circuit arrangement according to one of the previously described embodiments.

The invention will be described with reference to the attached figures. The figures show: Fig. 1 a a schematic circuit diagram of an equivalent circuit of a phase line, Fig. lb a potential course along the equivalent circuit shown in Fig. la, Fig. 2a a circuit diagram of a phase line in a first embodiment according to the invention, Fig. 2b a potential course along the circuit diagram shown in Fig. 2a, Fig. 3a a circuit diagram of a phase line with multiple inductive subcircuits, Fig. 3b a potential course of the circuit diagram shown in Fig. 3a, Fig. 4a a circuit diagram of a phase line with multiple inductive subcircuits, Fig. 4b a potential course along the circuit diagram shown in Fig. 4a, Fig. 5a a circuit diagram of a phase line in a second embodiment according to the invention, Fig. 5b a potential course along the circuit diagram shown in Fig. 5a, Fig. 6a a circuit diagram of a phase line in a third embodiment according to the invention, Fig. Sb a potential course along the circuit diagram shown in Fig. Ga, Fig. 7a a circuit diagram of a phase line in a fourth embodiment according to the invention, Fig. 7b a potential course along the circuit diagram shown in Fig. 7a, Fig. 8a a circuit diagram of a phase line in a fifth embodiment according to the invention, Fig. Sb a potential course along the circuit diagram shown in Fig. Ba, Fig. 9a a circuit diagram of a phase line according to a sixth embodiment of the invention, and Fig. 9b a potential course along the circuit diagram shown in Fig. 9a.

Fig. 1 a shows an equivalent circuit of a phase line of a proposed circuit arrangement. The equivalent circuit comprises a series connection of an inductive element L and a capacitive element C. An inductance of the inductive element L is equal to the resulting inductance of the phase line, in particular to the resulting inductance of all inductive elements within the phase line. Correspondingly, the capacitance of the capacitive element C is equal to the resulting capacitance of the phase line, in particular to the resulting capacitance of all capacitive elements within the phase line.

Also shown are three sections Si, S2, S3 along the equivalent circuit. The section Si denotes a section comprising a first terminal TiL of the inductive element [. The section S2 denotes a section which comprises a second terminal T2_L of the inductive element L and a first terminal TiC of the capacitive element C. The section S3 denotes a section of the phase line comprising the second terminal T2C of the capacitive element C. A predetermined phase current Ip is shown which flows through the phase line with a current direction oriented from the first terminal Ti_L of the inductive element [(input terminal of the phase line) towards the second terminal T2C of the capacitive element C (output terminal of the phase line).

Fig. lb shows a potential course along the phase line, in particular along the different sections Si, S2, S3 if the phase current Ip flows through the phase line at a given operating frequency of e.g. 20 kHz. It is assumed that the predetermined phase current Ip has an RMS value of 1 A or 100 A. In section Si (see Fig. la), the potential V of the phase line will be at a reference value, e.g. 0 Vrms. However, the potential V (with respect to said reference) will increase to a value of +Vmax in section S2, wherein ÷Vmax can be equal to a product of the inductance of the inductive element L and the operating frequency Co. Then, the potential V will again be reduced to 0 Vrms in the section S3.

This shown potential course holds if the phase line is operated at a resonant frequency, in particular if the capacitance of the capacitive element C equals to the ratio of 1 and the product of the inductance of the inductive element L and the operating frequency co As can be seen from Fig. ib, the maximum potential +Vmax determines the required insulation level for the elements of the circuit arrangement shown in Fig. 1 a.

According to the convention in this example and for the following examples, a capacitive element provides a voltage decrease and an inductive element provides a voltage increase. It is, however, also possible to use a convention wherein a capacitive element provides a voltage increase and an inductive element provides a voltage decrease. Also, all values of the potential V in this example and in the following examples relate to an effective value or RMS-value of the real potential. The real potential, however, is oscillatory.

In the following figures, the resulting capacitance of all capacitive subcircuits is equal to the capacitance of the capacitive element C. Also, the resulting inductance of all inductive subcircuits is equal to the inductance of the capacitive element L. This, in turn, means that the phase lines shown in the Figs. 2a, 3a, 4a, 5a, 6a, 7a, Ba, 9a have a desired resonant frequency which e.g. equals to a desired operating frequency. Also, values of the potential V refer to the same scale.

Fig. 2a shows a circuit arrangement according to a first embodiment of the invention. The circuit arrangement comprises a first inductive subcircuit Li and a second inductive subcircuit L2 and a first capacitive subcircuit Cl. A first terminal TiLl of the first inductive subcircuit Li provides an input terminal of the phase line. A second terminal T2L1 of the first inductive subcircuit Li is electrically connected in series to a first terminal TiCi of the first capacitive subcircuit Cl. A second terminal T2C1 of the first capacitive subcircuit Ci is electrically connected in series to a first terminal T1L2 of the second inductive subcircuit L2. A second terminal T2L2 of the second inductive subcircuit [2 provides an output terminal of the phase line.

It is shown that the inductive subcircuits Li, L2 comprise only one winding structure, e.g. a coil. The first capacitive subcircuit Ci is provided by e.g. a capacitor.

A predetermined phase current Ip is shown which flows through the phase line with a current direction oriented from the first terminal TiLi of the first inductive element Li towards the second terminal T2_L2 of the second inductive element [2 at a predetermined operating frequency w.

Fig. 2b shows a potential course along the subcircuits Li, Cl, L2 of the phase line if the phase current Ip flows through the phase line at a given operating frequency w. A potential V is zero at the first terminal Ti_Li of the first inductive subcircuit Li. Across the first inductive subcircuit Li, the potential V increases to a value of e.g. Vmax/2. This potential is achieved at the second terminal T2L1 of the first inductive subcircuit Li.

Across the first capacitive subcircuit Ci, the potential V decreases to a value of e.g. VmaxI2. This potential is achieved at the second terminal T2Ci of the first capacitive subcircuit Ci. Across the second inductive subcircuit L2, the potential V increases to zero again. As can be seen from Fig. 2b, the maximal absolute value of the potential V along the phase line shown in Fig. 2a is +Vmax/2 and not Vmax as in the case of the phase line shown in Fig. ia.

The inductance of each inductive subcircuit Li, L2 and the capacitance of the first capacitive subcircuit Ci have to be chosen such that the resonant frequency of the series connection shown in Fig. 2a matches the predetermined operating frequency.

Fig. 3a shows a circuit diagram of a phase line with two inductive subcircuits and one capacitive subcircuit. In contrast to the circuit arrangement shown in Fig. 2a, the first and the second inductive subcircuit Li, L2 are directly connected in series, wherein the first capacitive subcircuit Ci is connected in series to the series connection of the two inductive subcircuits Li, L2.

As shown in Fig. 3b, a potential V increases across the first inductive subcircuit Li to a value of e.g. Vmax/2 if a phase current Ip (see Fig. 3a) flows through the phase line at a given operating frequency co. This potential V is achieved at a second terminal T2_Li of the first inductive subcircuit Li. Across the second inductive subcircuit L2, the potential V further increases by e.g. a value of Vmax/2 to a value of Vmax. This potential V is achieved at a second terminal T2_L2 of the second inductive subcircuit L2. Then, the potential V decreases across the first capacitive subcircuit Ci to a value of zero. Thus, the maximal absolute value of the potential V along the phase line is equal to Vmax and thus not smaller than the maximal absolute value of the potential V along the phase line of the equivalent circuit shown in Fig. 1 a if the same phase current Ip flows through the phase line at the given operating frequency to. It is assumed that the inductances of the inductive subcircuits Li, [2 are equal. Also, the capacitances of the capacitive subcircuits Ci, 02 are equal. It is, of course, possible that the inductances and/or capacitances take different values.

Fig. 4a shows a circuit diagram of another embodiment with two inductive subcircuits and one capacitive subcircuit. The circuit diagram comprises a series connection of a first capacitive subcircuit Ci, a first inductive subcircuit Li and a second inductive subcircuit L2. In contrast to the circuit arrangement shown in Fig. 2a, a series connection of the two inductive subcircuits Li, L2 is connected in series to the first capacitive subcircuit Ci, wherein a first terminal TiLl of the first inductive subcircuit Li is connected to a second terminal T2_Ci of the first capacitive subcircuit Cl.

Fig. 4b shows a potential course of a potential V along the subcircuits Ci, Li, L2 of the circuit diagram shown in Fig. 4a if a phase current Ip (see Fig. 4a) flows through the phase line at a given operating frequency in. Across the first capacitive subcircuit Ci, the potential V decreases to a value of -Vmax. Across the first inductive subcircuit Li, the potential V increases to a value of -Vmax/2. This potential V is achieved at the second terminal T2_Li of the first inductive subcircuit Li. Across the second inductive subcircuit L2, the potential V of the phase line increases to a value of zero. This potential V is achieved at the second terminal T2L2 of the second inductive subcircuit L2.

As can be seen from Fig. 4b, a maximal absolute value of the potential V is not smaller than the maximal absolute value of the potential along the phase line shown in Fig. i a if the same phase current Ip flows through the phase line at the given operating frequency (-U.

Fig. 5a shows a circuit diagram of a second embodiment according to the invention. The phase line comprises a series connection of the first inductive subcircuit Li, a first capacitive subcircuit Cl, a second capacitive subcircuit C2 and a second inductive subcircuit [2. In this embodiment, a series connection of the two capacitive subcircuits Cl, C2 is enframed by the first inductive subcircuit Li and the second inductive suboircuit L2. This means, that a first terminal 1101 of the first capacitive subcircuit Ci is connected to a second terminal T2_Li of the first inductive subcircuit Li. The first terminal T1C2 of the second capacitive subcircuit C2 is connected to a second terminal T2C1 of the first capacitive subcircuit Ci. A first terminal T1L2 of the second inductive subcircuit L2 is connected to the second terminal T202 of the second capacitive subcircuit C2.

A capacitance of the capacitive subcircuits Cl, 02 is chosen such that the series connection of the capacitive subeircuits Ci, C2 provides the same capacitance as the first capacitive subcircuit shown in Fig. 2a. In particular, the capacitances of each capacitive subcircuit Ci, C2 can be chosen twice as high as the capacitance of the first capacitive subcircuit Cl shown in Fig. 2a. Thus, the series connection of the two capacitive subcircuits Ci, C2 provides the same capacitance as the single capacitive subcircuit Ci shown in Fig. 2a.

Fig. 5b shows a potential course along the subcircuits Li, Cl, C2, L2 of the phase line if a phase current Ip (see Fig. 5a) flows through the phase line at a given operating frequency . If the phase current Ip flows through the phase line shown in Fig. 5a, the potential V increases from a value of zero at the first terminal TiLl of the first inductive subcircuit Li to a value of Vmax/2 at the second terminal T2[i of the first inductive subcircuit Li.

Then, the potential V decreases to a value of zero at the second terminal T2C1 of the first capacitive subcircuit Cl. Then, the potential V decreases to a value of -Vmax/2 at a second terminal T2C2 of the second capacitive subcircuit C2. Then, the potential V increases to a value of zero at the second terminal 12L2 of the second inductive subcircuit [2.

Thus, the maximal absolute value of potential V along the phase line is Vmax/2 which is smaller than the maximal absolute value of the potential V of the equivalent circuit shown in Fig. 1 a under the same operating conditions, e.g. if the same phase current Ip flows through the phase line at the given operating frequency w.

Fig. 6a shows a circuit diagram of a phase line in a third embodiment according to the invention. The phase line comprises a series connection of a first capacitive subcircuit Ci, a first inductive subcircuit Li, a second capacitive subcircuit 02 and a second inductive subcircuit [2. The subcircuits Ci, [1, C2, [2 are arranged in an alternating sequence.

This means, that the first terminal T1Li of the first inductive subcircuit Li is connected to a second terminal T2Ci of the first capacitive subcircuit Ci. A first terminal TiC2 of the second capacitive subcircuit C2 is connected to a second terminal T2_Li of the first inductive subcircuit. A first terminal TiL2 of the second inductive subcircuit [2 is connected to a second terminal T2C2 of the second capacitive subcircuit C2.

The capacitances of each capacitive subcircuit Ci, C2 are chosen twice as high as the capacitance of the capacitive subcircuit Ci shown in Fig. 2a. Thus, the resonant frequency of the phase line shown in Fig. Ga is equal to the resonant frequency of phase line shown in Fig. 2a.

Fig. Sb shows a potential course along the subcircuits Ci, Li, C2, [2 of the phase line shown in Fig. Ga. If a predetermined phase current Ip (see Fig. Ga) flows through the phase line from the first terminal TiCi of the first capacitive subcircuit Ci to a second terminal T2L2 of the second inductive subcircuit L2 at a predetermined operating frequency w, the potential V will decrease to a value of -Vmax/2 at the second terminal T2C1 of the first capacitive subcircuit Ci. Then, the potential V will increase to a value of zero at the second terminal T2Li of the first inductive subcircuit Li. Then, the potential V will decrease to a value of -VmaxI2 at a second terminal T2C2 of the second capacitive subcircuit 02. Then, the potential V will increase to a value of zero at the second terminal T2L2 of the second inductive subcircuit L2.

It can be seen from Fig. Gb that the maximal absolute value of the potential V is Vmax/2 and thus smaller than the maximal absolute value of the potential V of the phase line shown in Fig. ia.

Fig. 7a shows a circuit diagram of a phase line according to a fourth embodiment of the invention. The phase line comprises a series connection of a first capacitive subcircuit Ci, a first inductive subcircuit Li, a second capacitive subcircuit C2 and a second inductive subcircuit [2. The inductive and capacitive subcircuits Li, Ci, [2, C2 are arranged in an alternating sequence. This means that a first terminal T1Ci of the first capacitive subcircuit Ci is connected to a second terminal T2Li of the first inductive subcircuit Li.

Also, a first terminal T1_L2 of the second inductive subcircuit L2 is connected to a second terminal T2Ci of the first capacitive subcircuit Cl. Also, a first terminal T1C2 of the second capacitive subcircuit C2 is connected to a second terminal T2L2 of the second inductive subcircuit L2.

The capacitances of each capacitive subcircuit Cl, C2 are chosen twice as high as the capacitance of the capacitive subcircuit Ci shown in Fig. 2a. It is, of course, also possible to choose any combination of capacitances which provide a resulting capacitance equal to the capacitance of the capacitive subcircuit Cl shown in Fig. 2a. However, a combination of capacitive subcircuits Ci, C2 having equal capacitances is optimal to distribute the potential V. Thus, the resonant frequency of the phase line shown in Fig. 7a is equal to the resonant frequency of phase line shown in Fig. 2a.

Fig. 7b shows a potential course of a potential V if a predetermined phase current Ip (see Fig. 7a) flows from a first terminal T1Li of the first inductive subcircuit Li (input terminal of the phase line) to a second terminal T2_C2 of the second capacitive subcircuit C2 (output terminal of the phase line) at a predetermined operating frequency w. The potential V increases to a value of Vmax/2 at the second terminal T2Li of the first inductive subcircuit Li from a value of zero at the first terminal TiLi of the first inductive subcircuit Li. Then, the potential V decreases to a value of zero at the second terminal T2_C1 of the first capacitive subcircuit Ci. Then, the potential V increases again to a value of Vmax/2 at a second terminal T2L2 of the second inductive subcircuit L2. Then, the potential V decreases to a value of zero at the second terminal T2C2 of the second capacitive subcircuit C2.

As can be seen from Fig. 7b, the maximal absolute value of the potential V is Vmax/2 which is smaller the maximal absolute value of the potential V of the phase line according to the circuit arrangement shown in Fig. ia.

Fig. 8a shows a circuit diagram of a phase line according to a fifth embodiment of the invention. The phase line comprises a series connection of a first capacitive subcircuit Ci, a first inductive subcircuit Li, a second capacitive subcircuit C2 and a second inductive subcircuit [2. In this embodiment, series connection of the inductive subcircuits [1, L2 is enframed by the first capacitive subcircuit Cl and the second capacitive subcircuit C2.

This means, that a first terminal TiLl of the first inductive subcircuit Li is connected to a second terminal T2_C1 of the first capacitive subcircuit Cl. A first terminal Ti_L2 of the second inductive subcircuit L2 is connected to a second terminal T2Li of the first inductive subcircuit Li. A first terminal T1C2 of the second capacitive subcircuit C2 is connected to a second terminal T2_L2 of the second inductive subcircuit [2. A first terminal TiCi of the first capacitive subcircuit Cl provides an input terminal of the phase line, and a second terminal T2C2 of the second capacitive subcircuit C2 provides an output terminal of the phase line. Also shown is a phase current Ip which flows from the input to the output terminal.

The capacitances of each capacitive subcircuit Cl, C2 are chosen twice as high as the capacitance of the first capacitive subcircuit Cl shown in Fig. 2a.

In Fig. Sb a potential course of a potential V along the subcircuits Cl, Li, L2, C2 of the phase line shown in Fig. Ba is shown if a phase current Ip (see Fig. Ba) flows through the phase line at a given operating frequency w. At the first terminal T1C1 of the first capacitive subcircuit Ci, the potential V has a value of zero. The potential V decreases to a value of -VmaxI2 at the second terminal T2C1 of the first capacitive subcircuit Ci.

Then, the potential V increases to a value of zero at the second terminal T2Li of the first inductive subcircuit Li. Then, the potential V increases again to a value of Vmax/2 at the second terminal T2L2 of the second inductive subcircuit L2. Finally, the potential V decreases to a value of zero at the second terminal T2_C2 of the second capacitive subcircuit C2.

As can be seen, the maximal absolute value of the potential V is Vmax/2 which is smaller than the maximal absolute value of the potential V along the phase line shown in Fig. 1 a.

Fig. 9a shows a circuit diagram of a phase line according to a sixth embodiment of the invention. The phase line comprises a series connection of a first capacitive subcircuit Ci, a first inductive subcircuit Li, a second capacitive subcircuit C2, a third capacitive subcircuit C3, a second inductive subcircuit L2 and a fourth capacitive subcircuit C4. A first terminal TiC1 of the first capacitive subcircuit Ci provides an input terminal of the phase line. A first terminal Ti_Li of the first inductive subcircuit Li is connected to a second terminal T2Ci of the first capacitive subcircuit Ci. A first terminal TiC2 of the second capacitive subcircuit C2 is connected to a second terminal T2Li of the first inductive subcircuit Li. A first terminal TiC3 of the third capacitive subcircuit 03 is connected to a second terminal T2_C2 of the second capacitive subcircuit C2. A first terminal TiL2 of the second inductive subcircuit L2 is connected to a second terminal T2C3 of the third capacitive subcircuit C3. A first terminal TiC4 of the fourth capacitive subcircuit 04 is connected to a second terminal T2L2 of the second inductive subcircuit L2. A second terminal T2C4 of the fourth capacitive subcircuit C4 provides an output terminal of the phase line. Shown is also a predetermined phase current Ip which flows from the input to the output terminal of the phase line. The capacitances of each capacitive subcircuit Ci, C2, C3, 04 are each chosen four times as high as the capacitance of the first capacitive subcircuit Ci shown in Fig. i a.

In Fig. 9b a potential course of a potential V along the subcircuits Ci, Li, 02, C3, L2, 04 of the phase line shown in Fig. 9a is shown if a phase current Ip (see Fig. 9a) flows through the phase line at a given operating frequency w. At the first terminal TiCi of the first capacitive subcircuit Ci, the potential V has a value of zero. It decreases to a value of -Vmax/4 at the second terminal T2_Ci of the first capacitive subcircuit Ci. Then, the potential V increases to a value of Vmax/4 at the second terminal T2Li of the first inductive subcircuit Li. Then, the potential V decreases to a value of zero at the second terminal T2C2 of the second capacitive subcircuit 02. Then, the potential V further decreases to a value of -Vmax/4 at the second terminal T2C3 of the third capacitive subcircuit 03. Then, the potential V increases to a value of Vmax/4 at the second terminal T2_L2 of the second inductive subcircuit L2. Finally, the potential V decreases to a value of zero at the second terminal T2C4 of the fourth capacitive subcircuit.

As can be seen from Fig. 9b, the maximal absolute value of the potential V is Vmax/4.

This is again smaller than the maximal absolute value of the potential V of the circuit arrangement shown in e.g. Fig. 8a and smaller than the maximal absolute value of the potential V of the circuit arrangement shown in Fig. i a.

In the embodiments shown in Fig. 2a, 5a, Ba, 7a, 8a, 9a, the subcircuits Li, L2, Ci, C2, C3, 04 are designed such that subcircuits Li, L2, Ci 04 each withstand the predetermined phase current Ip. This means, that a voltage drop across each subcircuit Li, [2, Ci C4, e.g. from the respective first terminal to the respective second terminal due to the phase current Ip and the frequency is smaller than a maximal allowable RMS voltage of each circuit Li, L2, Ci 04. As can be seen especially from Fig. 9a, the more capacitive subcircuits Cl 04, the lower the voltage drop across each capacitive subcircuit Ci C4. On the other hand, the value of the capacitances of each capacitive subcircuit Ci C4 is doubled every time the number of capacitive subcircuits is doubled (if the capacitive subcircuits are connected in series).

Also, the number of capacitive subcircuits Cl 04 can be chosen such that a required total reactive power which can be fed to the phase line is smaller than the sum of all reactive power feedable to the capacitive subcircuits Cl 04 (if the capacitive subcircuits Ci 04 are connected in series). If all capacitive subcircuits Cl 04 have the same capacitance, the minimum number N of capacitive subcircuits Cl C4 can be given by N = cett(QpfQ.c) formula 1 wherein Qp denotes the total reactive power feedable to the phase line and Qc denotes a reactive power feedable to each capacitive subcircuit Cl 04. ccii denotes an operation of bringing a number up to a round figure.

The total reactive power Qp can be calculated by the product of the resulting inductance, the operating frequency wand the squared value of the predetermined phase current Ip.

For example, an operating frequency can be chosen as 20 kHz. The predetermined phase current can be assumed to be 200 A (rms). If the total inductance of the phase line is assumed to be 400 pH, the phase line requires a total capacitance of 158.31 nF to be in resonance. This configuration generates a maximum potential Vmax in the equivalent circuit shown in Fig. ia of 10kV. Using five capacitive subcircuits and four inductive subcircuits which are arranged according to the invention, the maximum potential Vmax along the phase line can be reduced to e.g. i.8 kV. This reduces an installation requirement significantly.

For all of the shown embodiments, in particular for all phase lines with an arrangement or distribution of at least two capacitive subcircuits (Ci, 02, C3, 04) and/or at least two inductive subcircuits ([1, [2, L3, [4) according to the invention, a desired characteristic of the phase line can be verified if the potential V at an input terminal of the phase line equals to the potential at an output terminal of the phase line or differs by less than a predetermined amount in the case where the phase line is operated at a desired operating frequency. In this case, a desired tuning of the phase line to the operating frequency is achieved, i.e. the resonant frequency of the phase line is equal to the operating frequency or differs less than a predetermined amount from the operating frequency.

As especially shown by Fig. 9a, the more a resulting capacitance is distributed onto multiple capacitive subcircuits and/or the more a resulting inductance is distributed onto multiple inductive subcircuits, the lower is a required insulation.

Another advantage of the invention is that a phase line designed according to the invention provides a huge flexibility for a compensation of the respective phase line. As there is a multiplicity of possible distributions of the subcircuits and/or a multiplicity of designs of each subcircuit, one can choose the distribution and design such that a desired resonant frequency of the phase line is provided with a predetermined accuracy. E.g. for five capacitive subcircuits connected in series along the phase line, wherein each capacitive subcircuit comprises one or two capacitors with a capacitance of 1.3 jiF, 1.8iF, 3.0tF or 4.7pF connected in parallel or in series, there are 42504 options of designing the phase line with a desired resonant frequency. Preferably, a capacitive subcircuit comprises two capacitors, either connected in series or in parallel.

The flexibility advantageously allows adapting the design of the phase line to a calculated inductance or a deviated inductance of the phase line with a desired accuracy. The deviation between a calculated inductance and the deviated inductance can e.g. be due to external factors which cause a calculated inductance of the phase line to vary. Such external factors include e.g. a temperature, a nominal displacement condition, a magnetic layer structure, a cable length, the design and/or material of a vehicle chassis. The same holds for a capacitance of the phase line.

In the case that a set of more than one arrangement or distribution of capacitive and/or inductive subcircuits fulfills the criteria that a desired resonant frequency of the phase line is provided, an arrangement or distribution can be chosen from said set in which the maximal absolute value of the potential V is minimal or wherein voltages falling across the subcircuits are distributed similar.

Claims

Claims 1. Circuit arrangement of a system for inductive power transfer, in particular of inductive power transfer to a vehicle, wherein the circuit arrangement comprises at least one phase line, wherein the at least one phase line has a resulting inductance and a resulting capacitance, wherein the resulting inductance and the resulting capacitance of the phase line are chosen such that a resonant frequency of the phase line matches a predetermined operating frequency (o4, characterized in that the resulting capacitance is provided by at least two capacitive subcircuits (Ci, C2, C3, C4) and/or the resulting inductance is provided by at least two inductive subcircuits (Li, L2), wherein the at least two inductive subcircuits (Li, L2) and/or the at least two capacitive subcircuits (Cl, C2, 03, C4) within the phase line are arranged such that a maximal absolute value of the potential (V) along the phase line is smaller than a predetermined potential.
2. The circuit arrangement according to claim 1, characterized in that the inductive subcircuit(s) (Li, L2) and the capacitive subcircuit(s) (Ci, 02, C3, 04) are arranged alternately in at least one section of the phase line.
3. The circuit arrangement according to claim i, characterized in that two inductive subcircuits (Li, L2) enframe two capacitive subcircuits (Ci, 02, C3, C4) or wherein two capacitive subcircuits (Cl, C2) enframe two inductive subcircuits (Li, L2) in at least one section of the phase line.
4. The circuit arrangement according to one of the claims i to 3, characterized in that a capacitive subcircuit (Cl, C2, 03, C4) is designed such that a predetermined phase current (Ip) is smaller than or equal to a maximal allowable current of the capacitive subcircuit (Ci, 02, 03, 04), wherein the maximal allowable current is determined depending on the arrangement and/or the electric properties of at least one capacitive element of the capacitive subcircuit (Ci, C2, C3, 04) and/or wherein a capacitive subcircuit (Ci, 02, C3, 04) is designed such that a subcircuit voltage generated by the predetermined phase current (Ip) is smaller than or equal to a maximal allowable subcircuit voltage.
5. The circuit arrangement according to one of the claims 1 to 4, characterized in that the number of capacitive elements per phase line and/or the electric properties of each capacitive element is/are chosen such that the resulting reactive power feedable to the arrangement of all capacitive elements is higher than or equal to a total reactive power feedable to the phase line and/or that a difference between the resonant frequency of the phase line to a desired operating frequency is smaller than a predetermined threshold value.
6. The circuit arrangement according to one of the claims 1 to 5, characterized in that the number of capacitive elements and/or the electrical properties of at least one capacitive element and/or the arrangement of the at least one capacitive elements is chosen such that a maximal current through the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable current through the at least one capacitive element and/or a maximal reactive power feedable to the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable reactive power feedable to the at least one capacitive element and/or a maximal voltage across the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable voltage across the at least one capacitive element.
7. A method of designing a circuit arrangement of a receiving device of a system for inductive power transfer, in particular of inductive power transfer to a vehicle, comprising the steps of -determining a resulting inductance and a resulting capacitance of at least one phase line such that a resonant frequency of the phase line is equal to a predetermined operating frequency, characterized in that the method further comprises the steps of -providing the capacitance by at least two capacitive subcircuits (Ci, C2, C3, C4) and/or the inductance by at least two inductive subcircuits (Li, L2), -arranging the at least two inductive subcircuits (Li, L2) and/or the at least two capacitive subcircuits (Cl, C2, C3, C4) within the phase line such that a maximal absolute value of a potential V along the phase line is smaller than a predetermined potential.
8. The method of claim 7, characterized in that the inductive subcircuit(s) (Li, L2) and the capacitive subcircuit(s) (Ci, 02, C3, 04) are arranged alternately in at least one section of the phase line.
9. The method according to claim 7, characterized in that the inductive subcircuit(s) (Li, L2) and the capacitive subcircuit(s) (Cl, C2, C3, C4) are arranged such that two inductive subcircuits (Li, L2) enframe two capacitive subcircuits (Ci, C2, C3, C4) or such that two capacitive subcircuits (Ci, 02, 03, 04) enframe two inductive subcircuits (U, [2) in at least one section of the phase line.
iO. The method according to one of the claims 7 to 9, characterized in that the method comprises the following sequence of steps: -determining an inductance of a predetermined number of inductive subcircuits (Li, L2) within the phase line, -determining the resulting capacitance, -defining a number of capacitive subcircuits (Ci, 02, 03, 04), wherein the number is larger than one, -designing the capacitive subcircuits (Cl, 02, 03, 04) such the resulting capacitance is provided and a predetermined phase current (Ip) is smaller than or equal to a maximal allowable current of the capacitive subcircuits (Cl, C2, 03, C4), wherein the maximal allowable current is determined depending on the arrangement and/or the electric properties of at least one capacitive element of a capacitive subcircuit (Ci, 02, C3, C4), and/or designing the capacitive subcircuits (Ci, 02, C3, 04) such that a subcircuit voltage generated by the predetermined phase current (Ip) is smaller than or equal to a maximal allowable subcircuit voltage, -arranging the capacitive subcircuits (Cl, C2, C3, 04) within the phase line such that the maximal absolute value of the potential V along the phase line is smaller than the predetermined potential.
ii. The method according to claim i 0, characterized in that the number of capacitive subcircuits (Cl, C2, C3, C4) is increased if at least one capacitive subcircuit (Cl, C2, C3, C4) is not designable such that the predetermined phase current (Ip) is smaller than or equal to a maximal allowable current of the capacitive subcircuit (Ci, C2, C3, C4) and/or a subcircuit voltage generated by the predetermined phase current (Ip) is smaller than or equal to a maximal allowable subcircuit voltage and/or if the capacitive subcircuits (Cl, C2, C3, C4) are not arrangeable within the phase line such that the maximal absolute value of the potential V along the phase line is smaller than the predetermined potential.
12. The method according to one of the claims 7 to 11, characterized in that capacitive elements of the capacitive subcircuits (Cl, C2, C3, C4) are chosen from a set of predetermined capacitive elements.
13. The method according to one of the claims 7 to 12, characterized in that the total number of capacitive elements per phase line and/or the electric properties of each capacitive element is/are chosen such that the resulting reactive power feedable to the arrangement of all capacitive elements is higher than or equal to a total reactive power feedable to the phase line.
14. The method according to one of the claims 7 to 13, characterized in that the number of capacitive elements per phase line and/or the electrical properties of at least one capacitive element and/or the arrangement of the at least one capacitive element is/are chosen such that a maximal current through the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable current through the at least one capacitive element and/or a maximal reactive power feedable to the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable reactive power feedable to the at least one capacitive element and/or a maximal voltage across the at least one capacitive element is smaller than a predetermined percentage of the maximal allowable voltage across the at least one capacitive element.
15. The method according to one of the claims 7 to 14, characterized in that the capacitance of each capacitive subcircuit (Cl, C2, C3, C4) is equal.
16. Secondary unit of a system for inductive power transfer, in particular for inductive power transfer to a vehicle, characterized in that the secondary unit comprises a circuit arrangement (1) according to one of the claims 1 to 6.
17. Primary unit of a system for inductive power transfer, in particular for inductive power transfer to a vehicle, characterized in that the primary unit comprises a circuit arrangement (1) according to one of the claims ito 6.