GB2510861A

GB2510861A - Interstitial plate circuitboard

Info

Publication number: GB2510861A
Application number: GB1302669.5A
Authority: GB
Inventors: Barry Williamson
Original assignee: PRESSAC COMM Ltd
Current assignee: PRESSAC COMM Ltd
Priority date: 2013-02-15
Filing date: 2013-02-15
Publication date: 2014-08-20
Anticipated expiration: 2033-02-15
Also published as: GB2510861B; GB201302669D0

Abstract

An telephone socket interstitial plate (or face plate adaptor) circuit board (150) configured for connection to an NTE5 telephone socket, comprising: a pair of input tracks (156) connected to the interstitial plate circuit board by input solder pads (160), the opposing ends of which are configured to connect to the telephone socket; a telephony port located on the interstitial plate circuit board proximal to the input solder pads and configured to receive a telephone connector; and a plurality of output tracks (162) connected between the telephony port and a plurality of output solder pads (164) on the interstitial plate circuit board; wherein the output solder pads are spaced apart from the input solder pads by a predetermined spacing so as to avoid interference between them.

Description

INTERSTITIAL PLATE CIRCUITBOARD

The present disclosure relates to a circuitboard, in particular, an interstitial plate circuitboard. Such a circuitboard may be comprised in a housing/casing. The circuitboard may be configured for use with, and configured for connection to, a telephone socket.

The circuitboard may be suitable for improving the quality of signals received via a telephone socket. Such improvements may include reduced noise and/or interference in the signals which pass via the telephone socket.

Many promises have telephone sockets. For example, sockets may be fitted to the internal walls of the premises for the connection of a telephone or other communication device to an external communications network. One such telephone socket type is a network termination equipment 5 (NTE5) telephone socket. It may be possible to communicate using various means with external networks via such a telephone socket.

Such communication may include telephony/voice communications and data network (e.g., internet) communications, for example using an asymmetric digital subscriber line (ADSL) or very-high-bit-rate digital subscriber line (VDSL).

One or more disclosed embodiments may provide a circuitboard which, when used with a telephone socket such as an NTE5 socket, reduces the noise component of signals transmitted via the telephone socket. One or more disclosed embodiments may provide a circuitboard for ready installation and use by a non-expert (for example, the user need not be a telephone line engineer). One or more disclosed embodiments may provide a circuitboard which can be used within the physical constraints (dimensions and component positioning) of existing telephone sockets such as NTE5 sockets. Some or all of the above objects may be achieved by aspects/embodiments disclosed herein.

According to one aspect, the present disclosure provides an interstitial plate circuitboard configured for connection to an network termination equipment 5 (NTE5) telephone socket. The interstitial plate circuitboard comprises a pair of input tracks connected to the interstitial plate circuitboard by input solder pads. The opposing ends of the pair of input tracks are configured to connect to an NTE5 telephone socket. The interstitial plate circuitboard comprises a telephony port located on the interstitial plate circuitboard proximal to the input solder pads and is configured to receive a telephone connector. The interstitial plate circuitboard comprises a plurality of output tracks connected between the telephony port and a plurality of output solder pads on the interstitial plate circuitboard.

The output solder pads are spaced apart from the input solder pads by a predetermined non-interterence spacing.

Advantages provided by interstitial plate circuitboards as disclosed herein may include a reduced level of low frequency (LF) noise in high frequency (HF) signals, due to the separation of the pair of input tracks and plurality of output tracks, attached to the interstitial plate circuitboard respectively by input solder pads and output solder pads which are separated by a predetermined non-interference spacing/separation distance.

The connection points of the plurality of output tracks to the circuitry of the circuitboard are at the telephony port and at the output solder pads. The connection points of the pair of input tracks to the circuitboard are at the input solder pads. The pair of input tracks should connect to the line out socket of the NTE5 telephone socket, and the telephony port should be positioned so that it is in line with the line out socket of the NTE5 telephone socket when the interstitial plate circuitboard is connected to the NTE5 socket, at least for convenience.

LF and HF signals may be received by the pair of input tracks and transmitted via the circuitboard to a telephone (LF signals) and a data apparatus, such as a computer (HF signals). Therefore, by locating the output solder pads (which connect the plurality of output tracks to the circuitboard) at a predetermined non-interference spacing/distance from the input solder pads, interference between input and output signals may be decreased. This separation of input and output solder pads may decrease HF noise interference in HF signals transmitted via the circuitboard. Other features of the circuitboard are also configured to reduce noise interference such as HF noise as discussed below.

The predetermined non-interference spacing (that is, the distance on the interstitial plate circuitboard between the input solder pads and the output solder pads) may be greater than 5 mm. The predetermined non-interference spacing may be greater than 5 mm and less than 19mm. The predetermined non-interference spacing may be at least 1.3 times the distance between the input solder pads and the telephony port.

The interstitial plate circuitboard may further comprise a very-high-bit-rate digital subscriber line (VDSL) modem socket connected to the input solder pads. The very-high- bit-rate digital subscriber line modem socket may be configured to receive a very-high-bit-rate digital subscriber line modem connector. The location of the output solder pads on the interstitial plate circuitboard may be such that an interference between input signals to the interstitial plate circuitboard and output signals from the interstitial plate circuitboard is below a predetermined tolerance level. The predetermined tolerance level may be a common mode insertion loss limit of less than -30dB for frequencies up to 17 MHz, and/or a common mode insertion loss limit of less than -25dB at 30MHz frequency.

The output signals from the interstitial plate circuitboard may comprise output signals from the very-high-bit-rate digital subscriber line modem socket and/or output signals from the telephony port.

The interstitial plate circuitboard may further comprise a common mode choke configured for common mode noise reduction. The common mode choke may be connected proximal to the input solder pads between the input solder pads and the output solder pads. The common mode choke may be connected proximal to the input solder pads between the input solder pads and a very-high-bit-rate digital subscriber line modem socket. A common mode choke is configured to pass differential signals (equal but opposite signals) while blocking common mode signals. The common mode choke may be a high frequency common mode choke configured for high frequency common mode noise reduction.

By connecting the common mode choke close to the input of the circuitboard, the effectiveness of the choke to filter out common mode noise is increased. Received signals pass through the common mode choke and are therefore filtered before passing through other components on the circuitboard.

The common mode choke may be located proximal to the input solder pads at a distance on the interstitial plate circuitboard from the input solder pads of up to 12 mm. The common mode choke may be located proximal to the input solder pads to the right of the plurality of output tracks on the port face of the interstitial plate circuitboard at a distance of up to 12mm from the input solder pads.

The common mode choke may be a bifilar wound ferrite toroid. The common mode choke may be configured to provide an insertion loss of less than 1 dB throughout the VDSL frequency spectrum. A compromise may be reached between the differential insertion loss and the common mode insertion loss performance obtained, by winding fewer turns using a bifilar technique. The common mode choke may be configured to operate up to a frequency of 30 MHz. Thus the common mode choke provides filtering to signals up to a frequency of 30 MHz. The toroid may have 16 turns of 0.14 mm GR2 insulation grade wire and may be wound on a high frequency ferrite MnZn core. Such a winding type and core may provide an excellent common mode performance.

The output tracks may extend substantially parallel to the interstitial plate circuitboard and substantially parallel to each other at a distance of at least 1.0 mm away from the proximal interstitial plate circuitboard face. By positioning the plurality of input tracks away from the plane of the circuitboard (e.g., by 1 mm or more), and therefore away from circuit connections in the plane of the circuitboard, HF noise interference in HF signals transmitted via the output tracks is reduced by separating the input solder pads and the plurality of output tracks.

The interstitial plate circuitboard may comprise four output tracks. The plurality of output tracks may comprise a first output track connected to a bell capacitor in the interstitial plate circuitboard. The first output track connection may be configured to carry a ringing voltage to the bell capacitor The plurality of output tracks may comprise second and third signal output tracks configured to carry telephony and/or data signals to the interstitial plate circuitboard for output. The plurality of output tracks may comprise a fourth unconnected output track.

The plurality of output tracks may have a predetermined non-interference length. The predetermined non-interference length of each of the plurality of output tracks may be greater than 12 mm. The predetermined non-interference length of each of the plurality of output tracks may be less than 24 mm. The plurality of output tracks may comprise phosphor bronze.

The interstitial plate circuitboard may further comprise a further common mode choke configured for common mode noise reduction. The further common mode choke may be connected between the input solder pads and the output solder pads.

According to a further aspect of the invention, there is provided an interstitial plate assembly, comprising: a back housing plate configured to be located proximal to an NTE5 telephone socket when the interstitial plate assembly is connected to the NTE5 telephone socket; a front housing plate configured for user access; and the interstitial plate circuitboard of any preceding claim located between the back housing plate and the front housing plate.

The circuitboard and housing interstitial plate assembly may be a simple unit which can be easily plugged in to an NTE5 telephone socket by a non-expert, and provide a telephony port and a VDSL modem socket for suitable cable connection.

According to a further aspect of the invention, there is provided a method of assembling an interstitial plate circuitboard configured for connection to an NTE5 telephone socket, comprising: connecting a pair of input tracks to the interstitial plate circuitboard by input solder pads, the opposing ends of the pair of input tracks configured to connect to the NTE5 telephone socket; connecting a telephony port on the interstitial plate circuitboard proximal to the input solder pads, the telephony pod configured to receive a telephone connector; and connecting a plurality of output tracks between the telephony port and a plurality of output solder pads on the interstitial plate circuitboard, the output solder pads spaced apart from the input solder pads by a predetermined non-interference spacing.

Embodiments of the present invention will now be described by way of example and with reference to the accompanying drawings in which: figure la shows a plan view of a front side, and a cross sectional view, of an interstitial plate circuitboard according to the prior ad; figure lb shows a plan view of a front side, and a cross sectional view, of an interstitial plate circuitboard according to embodiments disclosed herein; figure 2a shows a plan view of a back side of an interstitial plate circuitboard showing circuit connections according to the prior art; figure 2b shows a plan view of a back side of an interstitial plate circuitboard showing circuit connections according to embodiments disclosed herein; figure 3 shows a plan view of a front side of an interstitial plate circuitboard indicating possible positions for connecting a common mode choke in the circuitboard according to embodiments disclosed herein; figure 4 illustrates an assembly comprising an interstitial plate circuitboard, a front housing plate and a back housing plate according to embodiments disclosed herein; and figure 5 illustrates a method of assembly according to embodiments disclosed herein.

Embodiments described herein relate to an interstitial plate circuitboard configured for connection to an NTE5 telephone socket. Many premises, such as domestic buildings (houses) and business buildings (offices), have telephone sockets located within for the connection of a telephone or other communication device to an external communications network. These sockets may be fitted to the internal walls of the premises. One such telephone socket type is an NTE5 telephone socket. The NTE5 telephone socket is widely used, for example in the UK, and may be used for communications via different means, such as for the connection of a telephone for voice communication over a telephone network, and/or the connection of a computer and modem/router for data network communication. NTE5 sockets are also used in the middle East, Malta, parts of Africa and New Zealand. Data network communications may be achieved by connecting a suitable modem cable, e.g., asymmetric or very-high-bit-rate digital subscriber line (ADSL or VDSL), to the NTE5 socket. The NTE5 socket may be considered to be the demarcation point between the customer-owned and maintained on-premises wiring, and the external network provider wiring/cabling.

NTE5 sockets may be used for VDSL, for example if the external network is a fibre to the cabinet/customer (FTTC) system. FTTC may allow for faster internet access/broadband speeds, for example in comparison to fibre-to-the-exchange (FTTE) systems, because in using FTTC, the point at which the data cables change from optic fibres to metal wiring at the customer end is closer to the customer, thereby reducing the length/amount of metal wiring required and improving bandwidth and signal transmission.

Voice/telephony communications may be considered low frequency (LF) signals, typically in the frequency range of 300 Hz to 4 kHz. Data communications such as broadband signals may be considered high frequency (HF) signals, typically in the frequency range of 150 kHz to 17 MHz, and in some cases from 150 kHz to 30 MHz. VDSL may provide fast data transmission/reception and operates in a frequency band of approximately 25 kHz to 17 MHz. VDSL may therefore be used, for example, for high definition television transmissions, telephone services, and broadband internet access. Data speeds using VDSL are expected to improve as second generation VDSL systems can operate up to approximately 30 MHz, to provide data rates which may exceed 100 Mbit/s both upstream and downstream simultaneously.

High frequency (HF) and low frequency ([F) signals transmitted over metal wiring may suffer from noise. That is, HF signals such as broadband data signals may suffer from LF noise causing slower data/broadband speeds, and LF signals such as telephony signals may contain HF noise which can be heard as a high pitched noise during a telephone call. One way of reducing the noise is to install a microfilter in the wiring in each premises at each point where the wiring splits off to a socket. Each microfilter may be used to filter out unwanted HF components in LF signals, and LF components in HF signals.

However, this method of noise reduction may be considered as not very robust. The metal wiring within premises is often unregulated (not to a required standard) and, for example, may be alarm wire or bell wire. Thus the installation of microfilters is likely to require a different solution for each premises depending on the type, condition and particular characteristics of the wiring used, as well as the socket positioning along the wire and within the premises. Because each wiring situation is likely to be different for each premises, the microfilter fitter/engineer may be disadvantaged as he/she needs to assess each installation individually, thereby increasing the knowledge required and time spent for each fitting. The reliability and consistency of the microfilter fitting, and therefore the effectiveness of the filtering achieved by microfilter fitting, may also be lower than acceptable due to the variable nature of the wiring at each premises and the individual fitting requirements. Further, as signal frequencies increase, for example up to MHz for second generation VDSL signals, the imperfections of on-premises wire (which cause common mode noise in the received signals) cause greater common mode noise levels than for lower frequency signals, making it more important to have effective LF and HF filtering in place for the effective and fast receipt of higher frequency signals.

Embodiments of this disclosure may be considered to solve one or more abovementioned problems. Because the interstitial plate circuitboards described herein comprise input and output solder pads separated by a predetermined non-interference spacing, noise levels due to signal interference are decreased. In certain examples, noise levels may be acceptably low even in output signals of high signal frequencies up to 30 MHz. Noise levels may also be reduced using interstitial plate circuitboards described herein due to other features, such as the inclusion of a high-frequency common mode choke, and by positioning the output tracks out of the plane of the circuitry in the circuitboard.

Figure la illustrates a standard prior art interstitial plate circuitboard 100 for connection to an NTE5 telephone socket. The interstitial plate circuitboard 100 is configured to accept input signals from an external telephone line, and provide output telephony signals and/or output very-high-bit-rate digital subscriber line (VDSL) output (such as broadband data). Figure ib, in comparison, illustrates an interstitial plate circuitboard 150 for connection to an NTES telephone socket according to embodiments described herein.

Figure la shows an interstitial plate circuitboard 100 in plan view of a front side, and a cross-sectional view. The plane of the cross sectional view is indicated on the plan view.

This circuitboard may be used so that a VDSL signal (and a telephony signal) may be received in premises via an NTE5 telephone socket to which the circuitboard connects.

The circuitboard 100 is a standard shape and has standard dimensions such that it may be housed in a housing to form an interstitial plate which can be attached to an existing NTE5 telephone socket. The housed circuitboard acts as an "interstitial plate" located between the NTE5 socket and connected telephone and/or VDSL modem cables. In certain examples the circuitboard 100 has dimensions as shown, of approximately 78.6 mm in the longest horizontal dimension and approximately 69.6 mm in the longest vertical dimension. The dimensions of the circuitboard 100 and the placement of the line port 108 are such that when the circuitboard 100 and housing as an interstitial plate is connected to an NTE5 socket by insertion of the line port 108 to the NTE5 socket, the interstitial plate provides a neat aesthetic finish to the overall NTE5 socket plus interstitial plate assembly.

The circuitboard 100 comprises a telephony port 102 configured to receive a telephone connector plug, allowing a telephone to be connected to an external telephone network via the circuitboard 100 and an NTE5 socket. The location of the telephone port 102 is in the standard expected location on the interstitial plate when assembled. "Standard expected" location may be considered to be the position on the interstitial plate which, when the interstitial plate is connected to an NTE5 socket, is in the same place relative to the NTE5 socket as it would be if there was no interstitial plate present. That is, the line socket of the NTES socket and the telephony socket of the interstitial plate circuitboard are in line when the interstitial plate circuitboard is connected to an NTE5 socket.

The circuitboard 100 also comprises a VDSL modem socket 104 located roughly centrally on the circuitboard, and is configured to receive a VDSL modem plug allowing a modem (and computer) to be connected to an external VDSL data network via the circuitboard 100 and an NTE5 socket, for example for broadband internet access.

The circuitboard 100 comprises a pair of input tracks 106 configured to electrically connect the circuitboard 100 to an NTE5 socket via the line port 108. The pair of input tracks 106 are connected to the circuitboard 100 at input solder pads 110.

The circuitboard 100 also comprises a plurality of output tracks 112 connected at the telephone port 102 and at the circuitboard 100 via output solder pads 114. The distance on the interstitial plate circuitboard 100 between the input solder pads 110 and the output solder pads 114 is less than 5 mm.

The circuitboard 100 also has a bell capacitor 122, a low frequency (LF) common mode (CM) choke 124, a two-way insulation-displacement connector (bC) for VDSL with extension wiring 126, and two low-pass filter transformers 128, 130.

The location of the telephony port 102 to which the plurality of output tracks 112 are connected is fixed, in that for the circuitboard 100 to be used as an interstitial plate with an NTE5 telephone socket, the telephone port 102 needs to be in the location shown, towards the bottom of the interstitial plate circuitboard 100. The location of the input solder pads 110 may be close to the telephony port for ease of IS manufacturing/convenience. The line port 108 housing the pair of input tracks 106, and the telephony port 102, are substantially in line through the plane of the circuitboard.

The inventor has identified that the proximity of the plurality of output tracks 112 to the input solder pads 110 strongly affects the level of noise in signals transmitted using the circuitboard 100. In particular, the position of the output solder pads 114 with respect to the input solder pads 110 strongly affect the level of HF noise interference present in HF signals such as VDSL signals.

Figure lb illustrates an interstitial plate circuitboard 150 for connection to an NTE5 telephone socket according to embodiments described herein. It can be seen that the circuitboard 150 includes a number of similar features to the circuitboard 100 of figure la. Features of the circuitboard 150 of figure lb which are similar to features of the circuitboard 100 of figure la including the overall standard shape and dimensions, the placement of the line port 158, and the location of the telephone port 152. Again a VDSL modem socket 154 is located roughly centrally to the circuitboard 150. The VDSL modem socket 154 is connected indirectly to the input solder pads 160 and is configured to receive a VDSL modem connector. Output signals from the circuitboard 150 may comprise output signals from VDSL. modem socket 154 and output signals from the telephony port 152.

The relative placement of the line port 158 and telephone port 152, roughly in line through the plane of the circuitboard, allows the circuitboard to be connected to an NTE5 g telephone socket and used as an interstitial plate. The circuitboard 150 of figure lb also includes a pair of input tracks 156 connected at input solder pads 160, a bell capacitor 172, a LF-CM choke 182, and an IDC for VDSL with extension wiring 176, similarly to the circuitboard of figure la. Two low-pass filter transformers 178, 180 are also present although in different locations on the circuitboard 150 of figure lb compared with the transformers 128, 130 of the circuitboard 100 of figure la.

However, certain key features are different. Increasing the separation/spacing on the circuitboard 150 of the input solder pads 160 and the output solder pads 164 (at the points at which the plurality of output tracks 164 contact the circuitboard 150) to a predetermined non-interference spacing has been found by the inventor to decrease the level of HF noise interference in an HF signal transmitted using the circuitboard 150. This may be achieved by using a plurality of output tracks of a predetermined non-interference length.

It can be seen that the output solder pads 164 are relocated on the circuitboard 150 (with respect to the output solder pads 114 of the circuitboard of figure la) to increase the separation between the output solder pads 164 and the input solder pads 160 to a predetermined non-interference spacing. Thus, by moving the output solder pads 164 as far from the input solder pads 160 as possible, the level of HF noise interference in an HF signal transmitted using the circuitboard is greatly reduced. The greater the distance between the input solder pads 160 and output solder pads 164, the greater the reduction in HF noise interference in a received HF signal. The distance on the circuitboard 150 between the input solder pads 160 and the output solder pads 164 may be at least 1.3 times the distance between input solder pads 160 and the telephony port 152. Further increasing the separation of the input and output solder pads 160, 164 further decreases the HF noise interference in a received HF signal. A maximum separation distance of approximately 2.8 times may be achieved.

The location of the output solder pads 164 on the circuitboard 150 may be such that interference between input signals to the circuitboard 150 and output signals from the circuitboard 150 is below a predetermined tolerance level. The predetermined tolerance level may be a common mode insertion loss limit of less than -30dB for VDSL signals up to 17 MHz, and a common mode insertion loss limit of less than -25dB for VDSL signals at 30MHz frequency.

To move the location of the output solder pads 164, the length of the plurality of output tracks 162 is increased such that the output solder pads are located away from the input solder pads 160 at a predetermined non-interference spacing (in this example! the position is close to the bell capacitor 172). The length of the plurality of output tracks may be called a predetermined non-interference length. This predetermined non-interference length may be greater than 12 mm and less than 24 mm. 24 mm is roughly the maximum separation possible between the input solder pads 160 and output solder pads 164 in the interstitial plate circuitboard 150 given the dimension constraints and the requirement to have the other components in the circuitboard. The shortest distance on the interstitial plate circuitboard 150 between the input solder pads 160 and the output solder pads 164 is 5 mm, and increasing this distance decreases HF noise interference in HF signals.

Overall, it may be said that the interstitial plate circuitboard 150, configured for connection to an NTE5 telephone socket, comprises a pair of input tracks 156 connected to the interstitial plate circuitboard 150 by input solder pads 160. The opposing ends of the pair of input tracks 156 are configured to connect to an NTE5 telephone socket.

There is provided a telephony port 152 located on the interstitial plate circuitboard 150 proximal to the input solder pads 160 and configured to receive a telephone connector.

There are provided a plurality of output tracks connected between the telephony port and a plurality of output solder pads on the interstitial plate circuitboard. The output solder pads are spaced apart from the input solder pads by a predetermined non-interference spacing.

As shown in figure lb, the output tracks 164 extend substantially parallel to the circuitboard 150 and substantially parallel to each other. The output tracks 164 may be located at a distance of at least 1.0 mm away from the proximal circuitboard 150 face and at least 1.0 mm spacing from each other. The output tracks 164 may be at a distance of up to 2.0 mm from each other in some examples. Increasing the distance of the output tracks 164 from the plane of the proximal circuitboard 150 face helps to decrease HF noise interference in received HF signals by increasing the separation between the output tracks 164 and the input solder pads 160. The output tracks 164 in certain examples may comprise phosphor bronze.

Also present on the circuitboard 150 is a high-frequency (HF) common mode (CM) choke 170. The HF-CM choke 170 is a type of filter which reduces HF-CM noise. HF noise can interfere with HF data signals (such as broadband) passing via the circuitboard 150. The HF-CM choke 170 is preferably located at the input side of the circuitry, proximal to the input solder pads 160 and between the input solder pads 160 and the output solder pads 164. The HF-CM choke 170 may be located proximal to the input solder pads 160 at a distance on the circuitboard 150 from the input solder pads 160 of up to 12mm. The HF-CM choke 170 may be located proximal to the input solder pads 160 to the right of the plurality of output tracks 164 on the port face of the interstitial plate circuitboard 150 as shown in figure lb at a distance of up to 12 mm from the input solder pads 160.This is shown in more detail in figure 2b and figure 3.

Positioning the HF-CM choke 170 as close as possible to the input solder pads 160 at the circuitboard input reduces the circuit path length between the input signals arriving at the circuftboard 150 via the line port 158 I input tracks 156 1 input solder pads 160 and the HF-CM choke 170. The small circuit path distance in turn allows more effective HF noise reduction by the HF-CM choke 170 and allows the HF-CM choke 170 to perform HF filtering before the input signal is transmitted on to other components of the circuitboard 150. The HF-CM choke 170 acts to prevent HF-CM signals being converted into HF differential signals and being transmitted through the circuitboard as HF noise.

Alternative positioning of the HF-CM choke 170 are discussed in relation to figure 3.

The HF-CM choke 170 may be a bifilar wound ferrite toroid. The HF-CM choke 170 may be configured to operate up to 30 MHz to allow, for example, for VDSL signal transmission up to this frequency. The HF-CM choke 170 may also be configured to provide an insertion loss of less than 1dB throughout the VDSL frequency spectrum. This performance may be achieved using a HF-CM choke having a toroid with 16 turns of 0.14 mm GR2 insulation grade wire wound on a high frequency ferrite MnZn core.

Insertion loss may be considered the loss of signal power resulting from the insertion of a device (such as the HF-CM choke 170) in a transmission line (such as the circuitry of the circuitboard 150). The circuitboard connections from the HF-CM choke 170 to the VDSL modem socket 154 and other circuitboard components can be seen in figure 2b.

Figure lb also shows the inclusion of a further HF-CM choke 174 configured for HF noise reduction as described above. The further HF-CM choke 174 is connected between the input solder pads 160 and the output solder pads 164 at the upper right of the circuitboard 150.

Figures 2a shows plan view of a back side of an interstitial plate circuitboard corresponding to that shown in figure la, and figure 2b shows a plan view of a back side of an interstitial plate circuitboard showing circuit connections according to embodiments disclosed heroin corresponding to that shown in figure lb. Figure 2a shows the location of a telephony port 202, input solder pads 210, output solder pads 214 and solder pads of the VDSL modem socket 204. The distance on the circuitboard 200 between the input solder pads 210 and the output solder pads 214 is less than 5mm.

Figure 2b, according the embodiments disclosed herein, shows the location of a telephony port 252, input solder pads 260, output solder pads 264 and solder pads 254 of the VDSL modem socket. The (predetermined non-interference spacing) distance on the circuitboard 200 between the input solder pads 260 and the output solder pads 264 is much greater than the distance in figure 2a and is greater than 5 mm. The predetermined non-interference spacing between the input solder pads 260 and the output solder pads 264 may be at least 1.3 times the distance between input solder pads 260 and the telephony port 252.

Also shown in figure 2b are solder pads 270 connecting the HF-CM choke into the circuit.

The circuitboard connections 290 from the input solder pads 260 to the HF-CM choke solder pads 270, and connections 280 from the HF-CM choke solder pads 270 to the VDSL modem port solder pads 254 cross, without touching, the path of the plurality of output tracks between the telephony port 252 and the output solder pads 264. Each of the connections 290 from the input solder pads 260 to the HF-CM choke solder pads 270 is up to 12 mm in certain embodiments. The shorter the connections 290 are, the more effective the HF-CM choke is as a HF filter by filtering out HF noise as early in the circuit (i.e., as close to the input) as possible.

The HF signal path 280 between the HF-CM choke (connected in the circuit by solder pads 270) at the input and the solder pads 254 connecting the VDSL modem socket in the circuit is shown as following the outer edge of the circuitboard 250. By routing the HF signal path 280 as far from the other circuitboard components as possible, noise interference in the HF signal path 280 is reduced.

The interstitial plate circuitboards 150, 250 may be considered to be signal treatment devices, because they comprise filtering means; namely one or more HF common mode chokes 170, 174 for HF noise reduction; and input solder pads 160 and output solder pads 164 separated by a predetermined non-interference spacing for HF noise interference reduction.

Figure 3 illustrates that the position of the HF-CM choke 302 on the circuitboard 300 may be varied. The right location 304 provides a 14 mm x 18 mm area in which the HF-CM choke 302 may be placed, and includes the HF-CM choke 302 position as shown in figure lb to the right of the output tracks 310. Alternative positions for the HF-CM choke 302 include a left location 306 of area 20mm x 15 mm to the left of the plurality of output tracks 310, and a bottom location 308 of area 10 mm x 10mm below the position of the telephony port 312.

The inventor has found that the positioning of the HF-CM choke 302 in the right location 302 provides more effective reduction in HF noise in signals transmitted using the circuitboard 300. It may be said that the circuitboard 300 comprises an HF-CM choke located proximal to the input solder pads to the right of the plurality of output tracks 310 on the port face of the interstitial plate circuitboard shown in figure 3 at a distance of up to 12 mm from the input solder pads. The alternative left and bottom locations 306, 308 for the HF-CM choke 302 also provide HF noise reduction but to a lesser degree than placement in the right location 304 due to the path of the circuitry connecting the HF-CM choke 302 to other components (e.g., the VDSL modem socket 314) on the circuitboard 300 being longer.

A circuitboard 150, 250, 300, 400 as disclosed herein may be part of an interstitial plate assembly, as illustrated in figure 4. Figure 4 shows a back housing plate 420 configured to be located proximal to an NTE5 telephone socket when the interstitial plate assembly is connected to the NTE5 telephone socket; a front housing plate 410 configured for user access; and an interstitial plate circuitboard 400 as disclosed herein located between the back housing plate 420 and the front housing plate 410. Such an assembly may be considered a plug-in unit, which can be readily connected (by a non-expert in telecommunications) to an NTE5 telephone socket via the line port 422 to receive input signals. The assembly is also configured to allow ready and easy user connection of a telephone plug/port in the telephone socket 402 via a void 412 in the front housing plate 410 and/or user connection of a VDSL data plug/port in a VDSL modem socket 404 via a void 414 in the front housing plate 410 to output the received signals.

Figure 5 illustrates a method of assembling an interstitial plate circuitboard configured for connection to an NTE5 telephone socket. The method comprises connecting a pair of input tracks to the interstitial plate circuitboard by input solder pads, the opposing ends of the pair of input tracks configured to connect to the NTE5 telephone socket 502; connecting a telephony port on the interstitial plate circuitboard proximal to the input solder pads, the telephony port configured to receive a telephone connector 504; and connecting a plurality of output tracks between the telephony port and a plurality of output solder pads on the interstitial plate circuitboard, the output solder pads spaced apart from the input solder pads by a predetermined non-interference spacing 506. It will be appreciated that these different steps may be performed in different orders.

Throughout this disclosure, the descriptors relating to relative orientation and position, such as "horizontal", "vertical", "upper", lower", "front", "back", "side", "left" and right", as well as any adjective and adverb derivatives thereof, are used in the sense of the orientation of the interstitial plate circuitboards as presented in the drawings. However, such descptors are not intended to be in any way limiting to an intended use of the described or claimed circuitboards.

The listing or discussion of a prior-published document or any background in this specification should not necessarily be taken as an acknowledgement that the document or background is part of the state of the art or is common general knowledge. One or more aspects/embodiments of the present disclosure may or may not address one or

more of the background issues.

Claims

Claims 1. An interstitial plate circuitboard configured for connection to a network termination equipments (NTE5) telephone socket, the interstitial plate circuitboard comprising: a pair of input tracks connected to the interstitial plate circuitboard by input solder pads, the opposing ends of the pair of input tracks configured to connect to an NTE5 telephone socket; a telephony port located on the interstitial plate circuitboard proximal to the input solder pads and configured to receive a telephone connector; and a plurality of output tracks connected between the telephony port and a plurality of output solder pads on the interstitial plate circuitboard, the output solder pads spaced apart from the input solder pads by a predetermined non-interference spacing.
2. The interstitial plate circuitboard of claim 1, wherein the predetermined non-interference spacing is greater than 5 mm.
3. The interstitial plate circuitboard of claim 1 or claim 2, wherein the predetermined non-interference spacing is greater than 5 mm and less than 19 mm.
4. The interstitial plate circuitboard of any preceding claim, wherein the predetermined non-interference spacing is at least 1.3 times the distance between the input solder pads and the telephony port.
5. The interstitial plate circuitboard of any preceding claim, further comprising a very-high-bit-rate digital subscriber line modem socket connected to the input solder pads, the very-high-bit-rate digital subscriber line modem socket configured to receive a very-high-bit-rate digital subscriber line modem connector, wherein the location of the output solder pads on the interstitial plate circuitboard is such that an interference between input signals to the interstitial plate circuitboard and output signals from the interstitial plate circuitboard is below a predetermined tolerance level.
6. The interstitial plate circuitboard of claim 5, wherein the predetermined tolerance level is a common mode insertion loss limit of less than -30dB for frequencies up to 17 MHz, and/or a common mode insertion loss limit of less than -25dB at 30MHz frequency.
7. The interstitial plate circuitboard of claim 5 or claim 6, wherein the output signals from the interstitial plate circuitboard comprise output signals from the very-high-bit-rate digital subscriber line modem socket and output signals from the telephony port.
8. The interstitial plate circuitboard of any preceding claim, further comprising a common mode choke configured for common mode noise reduction, the common mode choke connected proximal to the input solder pads between the input solder pads and the output solder pads.
9. The interstitial plate circuitboard of any preceding claim, further comprising a common mode choke configured for common mode noise reduction, the common mode choke connected proximal to the input solder pads between the input solder pads and a very-high-bit-rate digital subscriber line modem socket.
10. The interstitial plate circuitboard of claim 8 or claim 9, wherein the common mode choke is a high frequency common mode choke configured for high frequency common mode noise reduction
11. The interstitial plate circuitboard of any of claims 8 to 10, wherein the common mode choke is located proximal to the input solder pads at a distance on the interstitial plate circuitboard from the input solder pads of up to 12 mm.
12. The interstitial plate circuitboard of any of claims 8 to 11, wherein the common mode choke is located proximal to the input solder pads to the right of the plurality of output tracks on the port face of the interstitial plate circuitboard at a distance of up to 12 mm from the input solder pads.
13. The interstitial plate circuitboard of any of claims 8 to 12, wherein the common mode choke is a bifilar wound ferrite toroid.
14. The interstitial plate circuitboard of any of claims 8 to 13, wherein the common mode choke is configured to provide an insertion loss of less than 1 dB throughout the very-high-bit-rate digital subscriber line (VDSL) frequency spectrum.
15. The interstitial plate circuitboard of claim any of claims 8 to 14, wherein the common mode choke is configured to operate up to a frequency of 30 MHz.
16. The interstitial plate circuitboard of any preceding claim, wherein the output tracks extend substantially parallel to the interstitial plate circuitboard and substantially parallel to each other at a distance of at least 1.0 mm from the proximal interstitial plate circuitboard face.
17. The interstitial plate circuitboard of any preceding claim, wherein the plurality of output tracks have a predetermined non-interference length.
18. The interstitial plate circuitboard of claim 17, wherein the predetermined non-interference length of each of the plurality of output tracks is greater than 12 mm and/or less than 24 mm.
19. The interstitial plate circuitboard of any preceding claim, wherein the output tracks comprise phosphor bronze.
20. The interstitial plate circuitboard of any of claims 8 to 15, further comprising a further high frequency common mode choke configured for high frequency common mode noise reduction, the further common mode choke connected between the input solder pads and the output solder pads.
21. An interstitial plate assembly. comprising a back housing plate configured to be located proximal to an NTE5 telephone socket when the interstitial plate assembly is connected to the NTE5 telephone socket; a front housing plate configured for user access; and the interstitial plate circuitboard of any preceding claim located between the back housing plate and the front housing plate.
22. A method of assembling an interstitial plate circuitboard configured for connection to an NTE5 telephone socket, comprising: connecting a pair of input tracks to the interstitial plate circuitboard by input solder pads, the opposing ends of the pair of input tracks configured to connect to the NTE5 telephone socket; connecting a telephony port on the interstitial plate circuitboard proximal to the input solder pads, the telephony pod configured to receive a telephone connector; and connecting a plurality of output tracks between the telephony port and a plurality of output solder pads on the interstitial plate circuitboard, the output solder pads spaced apart from the input solder pads by a predetermined non-interference spacing.
23. An interstitial plate circuitboard configured for connection to an NTE5 telephone socket substantially as described herein and as illustrated in the accompanying figures.
24. An interstitial plate assembly substantially as described herein and as illustrated in the accompanying figures.
25. A method of assembling an interstitial plate circuitboard configured for connection to an NTE5 telephone socket substantially as described herein and as illustrated in the accompanying figures.