GB2499885B - Application load and type adaptive manycore processor architecture - Google Patents

Application load and type adaptive manycore processor architecture

Info

Publication number
GB2499885B
GB2499885B GB201300752A GB201300752A GB2499885B GB 2499885 B GB2499885 B GB 2499885B GB 201300752 A GB201300752 A GB 201300752A GB 201300752 A GB201300752 A GB 201300752A GB 2499885 B GB2499885 B GB 2499885B
Authority
GB
United Kingdom
Prior art keywords
processor architecture
application load
type adaptive
manycore processor
adaptive manycore
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB201300752A
Other versions
GB2499885A (en
GB201300752D0 (en
Inventor
Mark Henrik Sandstrom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/684,473 external-priority patent/US8789065B2/en
Priority claimed from US13/717,649 external-priority patent/US8745626B1/en
Application filed by Individual filed Critical Individual
Publication of GB201300752D0 publication Critical patent/GB201300752D0/en
Publication of GB2499885A publication Critical patent/GB2499885A/en
Application granted granted Critical
Publication of GB2499885B publication Critical patent/GB2499885B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5044—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering hardware capabilities
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Stored Programmes (AREA)
  • Image Processing (AREA)
GB201300752A 2012-01-17 2013-01-16 Application load and type adaptive manycore processor architecture Active GB2499885B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201261587634P 2012-01-17 2012-01-17
US201261721686P 2012-11-02 2012-11-02
US13/684,473 US8789065B2 (en) 2012-06-08 2012-11-23 System and method for input data load adaptive parallel processing
US13/717,649 US8745626B1 (en) 2012-12-17 2012-12-17 Scheduling application instances to configurable processing cores based on application requirements and resource specification

Publications (3)

Publication Number Publication Date
GB201300752D0 GB201300752D0 (en) 2013-02-27
GB2499885A GB2499885A (en) 2013-09-04
GB2499885B true GB2499885B (en) 2014-03-05

Family

ID=47758050

Family Applications (1)

Application Number Title Priority Date Filing Date
GB201300752A Active GB2499885B (en) 2012-01-17 2013-01-16 Application load and type adaptive manycore processor architecture

Country Status (1)

Country Link
GB (1) GB2499885B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109886859B (en) * 2019-01-30 2023-06-13 上海赜睿信息科技有限公司 Data processing method, system, electronic device and computer readable storage medium

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6289434B1 (en) * 1997-02-28 2001-09-11 Cognigine Corporation Apparatus and method of implementing systems on silicon using dynamic-adaptive run-time reconfigurable circuits for processing multiple, independent data and control streams of varying rates
US20020056033A1 (en) * 1997-12-17 2002-05-09 Huppenthal Jon M. System and method for accelerating web site access and processing utilizing a computer system incorporating reconfigurable processors operating under a single operating system image
US20060075265A1 (en) * 2004-09-22 2006-04-06 Yoshiyuki Hamaoka Self-organized parallel processing system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6289434B1 (en) * 1997-02-28 2001-09-11 Cognigine Corporation Apparatus and method of implementing systems on silicon using dynamic-adaptive run-time reconfigurable circuits for processing multiple, independent data and control streams of varying rates
US20020056033A1 (en) * 1997-12-17 2002-05-09 Huppenthal Jon M. System and method for accelerating web site access and processing utilizing a computer system incorporating reconfigurable processors operating under a single operating system image
US20060075265A1 (en) * 2004-09-22 2006-04-06 Yoshiyuki Hamaoka Self-organized parallel processing system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IEEE Transactions on Computers; Jean, J et al; Dynamic reconfiguration to support concurrent applications; Volume 48, Issue 6, Pages 591-602 *

Also Published As

Publication number Publication date
GB2499885A (en) 2013-09-04
GB201300752D0 (en) 2013-02-27

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