GB2493798B - Fractional PLL frequency synthesizer employing 1 bit delta-sigma modulation scheme with distributed error feedback - Google Patents

Fractional PLL frequency synthesizer employing 1 bit delta-sigma modulation scheme with distributed error feedback

Info

Publication number
GB2493798B
GB2493798B GB1205532.3A GB201205532A GB2493798B GB 2493798 B GB2493798 B GB 2493798B GB 201205532 A GB201205532 A GB 201205532A GB 2493798 B GB2493798 B GB 2493798B
Authority
GB
United Kingdom
Prior art keywords
modulation scheme
frequency synthesizer
error feedback
pll frequency
sigma modulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1205532.3A
Other versions
GB201205532D0 (en
GB2493798A (en
Inventor
Kwan Kin-Wah
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Smart Design
Original Assignee
Smart Design
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB1114269.2A external-priority patent/GB2493913B/en
Application filed by Smart Design filed Critical Smart Design
Priority to GB1205532.3A priority Critical patent/GB2493798B/en
Publication of GB201205532D0 publication Critical patent/GB201205532D0/en
Publication of GB2493798A publication Critical patent/GB2493798A/en
Application granted granted Critical
Publication of GB2493798B publication Critical patent/GB2493798B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/3035—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with provisions for rendering the modulator inherently stable, e.g. by restricting the swing within the loop, by removing part of the zeroes using local feedback loops, by positioning zeroes outside the unit circle causing the modulator to operate in a chaotic regime
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3042—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator being of the error feedback type, i.e. having loop filter stages in the feedback path only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3024—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M7/3028—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/304—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
GB1205532.3A 2011-08-19 2012-03-29 Fractional PLL frequency synthesizer employing 1 bit delta-sigma modulation scheme with distributed error feedback Active GB2493798B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1205532.3A GB2493798B (en) 2011-08-19 2012-03-29 Fractional PLL frequency synthesizer employing 1 bit delta-sigma modulation scheme with distributed error feedback

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1114269.2A GB2493913B (en) 2011-08-19 2011-08-19 1 bit delta-sigma modulation scheme with distributive error feedback
GB1205532.3A GB2493798B (en) 2011-08-19 2012-03-29 Fractional PLL frequency synthesizer employing 1 bit delta-sigma modulation scheme with distributed error feedback

Publications (3)

Publication Number Publication Date
GB201205532D0 GB201205532D0 (en) 2012-05-09
GB2493798A GB2493798A (en) 2013-02-20
GB2493798B true GB2493798B (en) 2016-04-27

Family

ID=48225177

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1205532.3A Active GB2493798B (en) 2011-08-19 2012-03-29 Fractional PLL frequency synthesizer employing 1 bit delta-sigma modulation scheme with distributed error feedback

Country Status (1)

Country Link
GB (1) GB2493798B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10511296B2 (en) 2014-08-08 2019-12-17 Pr Electronics A/S System and method for modulation and demodulation
US9467151B1 (en) 2015-09-03 2016-10-11 Analog Devices Global Apparatus and methods for using tuning information to adaptively and dynamically modify the parameters of an RF signal chain

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2440622A (en) * 2006-08-05 2008-02-06 Lime Microsystems Ltd Transceiver
US7369001B2 (en) * 2005-02-14 2008-05-06 Samsung Electronics Co., Ltd. Frequency synthesizer having variable frequency resolution, and fractional-N frequency synthesizing method using sigma-delta modulation of frequency control pulses
US7825842B2 (en) * 2006-06-02 2010-11-02 Ubidyne, Inc. Digital sigma-delta modulators
US7928876B2 (en) * 2004-04-09 2011-04-19 Audioasics A/S Sigma delta modulator
US20110175762A1 (en) * 2010-01-15 2011-07-21 Asahi Kasei Microdevices Corporation Second order noise coupling with zero optimization modulator and method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7928876B2 (en) * 2004-04-09 2011-04-19 Audioasics A/S Sigma delta modulator
US7369001B2 (en) * 2005-02-14 2008-05-06 Samsung Electronics Co., Ltd. Frequency synthesizer having variable frequency resolution, and fractional-N frequency synthesizing method using sigma-delta modulation of frequency control pulses
US7825842B2 (en) * 2006-06-02 2010-11-02 Ubidyne, Inc. Digital sigma-delta modulators
GB2440622A (en) * 2006-08-05 2008-02-06 Lime Microsystems Ltd Transceiver
US20110175762A1 (en) * 2010-01-15 2011-07-21 Asahi Kasei Microdevices Corporation Second order noise coupling with zero optimization modulator and method

Also Published As

Publication number Publication date
GB201205532D0 (en) 2012-05-09
GB2493798A (en) 2013-02-20

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