GB2493124B - Data processing apparatus - Google Patents

Data processing apparatus

Info

Publication number
GB2493124B
GB2493124B GB201221531A GB201221531A GB2493124B GB 2493124 B GB2493124 B GB 2493124B GB 201221531 A GB201221531 A GB 201221531A GB 201221531 A GB201221531 A GB 201221531A GB 2493124 B GB2493124 B GB 2493124B
Authority
GB
United Kingdom
Prior art keywords
stack
initialised
stack pointer
processing apparatus
data processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn - After Issue
Application number
GB201221531A
Other versions
GB2493124A (en
Inventor
Alistair Guy Morfey
Karl Leighton Swepson
Peter Giles Lloyd
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cambridge Consultants Ltd
Original Assignee
Cambridge Consultants Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cambridge Consultants Ltd filed Critical Cambridge Consultants Ltd
Priority to GB201221531A priority Critical patent/GB2493124B/en
Publication of GB2493124A publication Critical patent/GB2493124A/en
Application granted granted Critical
Publication of GB2493124B publication Critical patent/GB2493124B/en
Withdrawn - After Issue legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements

Abstract

A processor has two or more stacks. Each stack has a stack pointer. Each stack pointer is associated with a flag. The flag indicates whether the associated stack pointer has been initialised. The flags may be in a status register. The flags cannot be written by any instruction in the processorâ s instruction set. The processor may execute a soft reset if a stack pointer is used when the flag indicates it has not been initialised. The flag for a second stack may indicate that the associated stack pointer has not been initialised until the stack pointers for both the first and second stack pointers have been initialised.
GB201221531A 2008-07-10 2008-07-10 Data processing apparatus Withdrawn - After Issue GB2493124B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB201221531A GB2493124B (en) 2008-07-10 2008-07-10 Data processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB201221531A GB2493124B (en) 2008-07-10 2008-07-10 Data processing apparatus

Publications (2)

Publication Number Publication Date
GB2493124A GB2493124A (en) 2013-01-23
GB2493124B true GB2493124B (en) 2013-08-28

Family

ID=47430155

Family Applications (1)

Application Number Title Priority Date Filing Date
GB201221531A Withdrawn - After Issue GB2493124B (en) 2008-07-10 2008-07-10 Data processing apparatus

Country Status (1)

Country Link
GB (1) GB2493124B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220188463A1 (en) * 2020-12-16 2022-06-16 International Business Machines Corporation Method and system for on demand control of hardware support for software pointer authentification in a computing system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0953910A2 (en) * 1998-04-30 1999-11-03 Deutsche Thomson-Brandt Gmbh Method and apparatus for controlling write access to storage means for a digital data processing circuit
GB2448488A (en) * 2007-04-10 2008-10-22 Cambridge Consultants Processor which can conditionally inhibit trap, interrupt or exception events but inhibition means are not accessible by a running program

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0953910A2 (en) * 1998-04-30 1999-11-03 Deutsche Thomson-Brandt Gmbh Method and apparatus for controlling write access to storage means for a digital data processing circuit
GB2448488A (en) * 2007-04-10 2008-10-22 Cambridge Consultants Processor which can conditionally inhibit trap, interrupt or exception events but inhibition means are not accessible by a running program

Also Published As

Publication number Publication date
GB2493124A (en) 2013-01-23

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)