GB2483879A

GB2483879A - Proportional load sharing for inverters

Info

Publication number: GB2483879A
Application number: GB1015911.9A
Authority: GB
Inventors: Qingchang Zhong
Original assignee: Individual
Current assignee: Individual
Priority date: 2010-09-22
Filing date: 2010-09-22
Publication date: 2012-03-28
Anticipated expiration: 2030-09-22
Also published as: GB2483879B; GB201015911D0

Abstract

A control device for inverters to achieve accurate proportional load sharing when inverters are connected in parallel, while maintaining the voltage and frequency within certain ranges. The control device comprises a sensor to measure the inverter current i, a sensor to measure the inverter output voltage vo, a unit to measure the active power Pi and reactive power Qi of the inverter, a unit to achieve accuracy of proportional load sharing for active power and reactive power, and a voltage generation unit to form a sinusoidal signal to be used as a voltage reference vri for the inner loop controller of the inverter. The unit to achieve accuracy of proportional load sharing may include at least two integrators and a sub-unit to calculate or measure the voltage drop of the inverter output voltage from the rated voltage. The arrangement may be used with inverters connecting distributed generation and renewable energy sources to the grid.

Description

DESCRIPTION

The present invention is concerned with control devices and methods for inverters so that they can share load accurately in proportional to the power ratings when connected in parallel.

Nowadays, more and more distributed generation and renewable energy sources, e.g. wind, solar and tidal powei are connected to the public grid via power inverters. They often form microgrids before being connected to the public grid. Due to the availability of high current power electronic devices, it is inevitable that several inverters are needed to be connected in parallel for high-power and/or low-cost applications. Another reason is that parallel-connected inverters provide system redundancy and high reliability, which is important for critical customers. A natural problem for parallel-connected inverters is that how the load is shared among them. A key technique is to use the droop control which is widely used in conventional power generation systems. The advantage is that no external communication mechanism is needed among the inverters. This enables good sharing for either linear or nonlinear loads. In some cases, external communication mechanisms are still adopted for load sharing and restoring the microgrid voltage and frequency.

The equal sharing of linear and nonlinear loads has been intensively investigated and high accuracy of equal sharing can be achieved. A voltage bandwidth droop control and a small signal injection method can be used to improve the reactive power sharing accuracy, which can also be extended to harmonic current sharing. Injecting a harmonic voltage according to the output harmonic cunent can be used to improve the total harmonic distortion (THD) of the voltage. It has now been recognised that the output impedance of the inverters plays a critical role in power sharing and a droop controller for inverters with resistive output impedances can be used to share linear and nonlinear loads.

Although significant progress has been made for the equal sharing of linear and nonlinear loads, it is still a problem to share loads accurately in proportional to the power ratings of the inverters. In particular, the accuracy of reactive power sharing (for the Q -£ and P -w droop) is not high. Moreover, some approaches developed for equal sharing, e.g. the droop control with average power information, cannot be directly applied to proportional sharing. Another issue is that the output voltage drops due to the increase of the load and also due to the droop control. Hence, the proportional sharing problem needs to be investigated in a systematical way.

It has been recognised that adding an integral action to the droop controller is able to improve the accuracy of load sharing for grid-connected inverters. However, it is still a problem for inverters operated in the standalone mode and also there is an issue associated with the change of the operation mode. The strategy that involves adding a virtual inductor and estimating the effect of the line impedance can be used to improve the situation but the strategy is quite complicated and there is still room for improvement.

All these strategies are sensitive to numerical computational errors, parameter drifts and component mismatches. In order for the parallel-connected inverters to share the load in proportional to their power ratings, the inverters should have the same per-unit impedance. It also requires that the RMS voltage set-points for the inverters to be the same. Both are very strong conditions. In this invention, a robust droop controller is disclosed to achieve exact proportional load sharing among inverters connected in parallel. The accuracy of sharing is no longer dependent on the output impedance of the inverters originally designed nor on the RMS voltage set-point. Moreover, the controller is able to regulate the output voltage to reduce the effect of the load and droop control on the output voltage. The robust droop controller is proposed for inverters with resistive output impedances but it can be applied to inverters with inductive output impedances as well, by using the Q -E and P w droop.

An approach is also disclosed to design an inverter to have a resistive output im-pedance. Since there is normally an LC filter in an inverter to reduce the switching noise in the output voltage, the approaches proposed in the literature all treat the LC filter as the control plant and the controllers are all designed based on this fact, to the best knowledge of the inventoL Most of them adopt the inductor current, the output current and the output voltage as feedback signals. Some adopt the capacitor current as feedback. Here, a completely new concept is brought to the controller design for inverters, based on the observation that the capacitor can be regarded as a part of the load, instead of a part of the control plant. Hence, the controller can be designed according to the filter inductor only. This reduces the order of the control plant to one and simplifies the control design and system analysis. Moreover, only two sensors (for the inductor current and the output voltage) are needed for feedback, which reduces the cost of the controller. Because of this, the inverter can be designed to have resistive output impedance over a wide range of frequencies, which considerably facilitates the sharing of nonlinear loads.

The combination of the above leads to very neat control strategies to achieve exact proportional load sharing among inverters connected in parallel.

In accordance with a first aspect of the present invention there is a control device for controlling an inverter with a resistance-dominated output impedance comprising * a sensor to measure the inverter current, * a sensor to measure the inverter output voltage, * a unit to calculate or measure the active power and reactive power of the inverter, * an integrator, of which the input is the sum of the nominal frequency and the product of the reactive power with a gain, to generate the phase signal for a sinusoid, * a unit to calculate or measure the voltage drop of the inverter output voltage (RMS value) from the rated voltage, * an integrator, of which the input is the difference of the product if the voltage drop with a gain subtracted by the product of the real power with another gain, to generate the amplitude for the sinusoid, * a voltage generation unit to form a sinusoidal signal according to the outputs of the two integrators, * the formed sinusoid is used as the voltage reference for the inner-loop controller of the inverter, of which the output impedance is dominantly resistive for the rated frequency, * a candidate inner-loop controller is to generate the difference from the voltage rcfercnce subtracted by the feedback of the inverter current scaled by a proportional gain, * the difference is then converted to PWM signals to drive the inverter.

In accordance with a second aspect of the present invention there is a control method for controlling an inverter with a resistance-dominated output impedance by * measuring the inverter current, * measuring the inverter output voltage, * calculating or measuring the active power and reactive power of the inverter, * integrating the sum of the nominal frequency and the product of the reactive power with a gain to generate the phase signal for a sinusoid, * calculating or measuring the voltage drop of the inverter output voltage from the rated voltage, * integrating the difference of the product of the voltage drop with a gain subtracted by the product of the active power with another gain to generate the amplitude for the sinusoid, * forming a sinusoidal signal according to the outputs of the two integrators, * passing the formed sinusoid as the voltage reference for the inner-loop controller of the inverter, of which the output impedance is dominantly resistive for the rated frequency, * a candidate inner-loop controller is to convert the difference from the voltage reference subtracted by the feedback of the inverter current scaled by a proportional gain to PWM signals to drive the invertet In accordance with a third aspect of the present invention there is a control device for controlling an inverter with an inductance-dominated output impedance comprising * a sensor to measure the inductor current of the inverter, * a sensor to measure the inverter output voltage, * a unit to calculate or measure the active power and reactive power of the inverter, * an integrator, of which the input is the difference of the nominal frequency and the product of the active power with a gain, to generate the phase signal for a sinusoid, * a unit to calculate or measure the voltage drop of the inverter output voltage (RMS value) from the rated voltage, * an integratoi of which the input is the difference of the product of the voltage drop with a gain subtracted by the product of the reactive power with another gain, to generate the amplitude for the sinusoid, * a voltage generation unit to form a sinusoidal signal according to the outputs of the two integrators, * the formed sinusoid is used as the voltage reference for the inner-loop controller of the inverter, of which the output impedance is dominantly inductive for the rated frequency, * a candidate inner-loop controller is just a unity gain, * the output of the inner-loop controller is then converted to PWM signals to drive the inverter.

In accordance with a fourth aspect of the present invention there is a control method for controlling an inverter with an inductance-dominated output impedance by * measuring the inverter current, * measuring the inverter output voltage, * calculating or measuring the active power and reactive power of the inverter, * integrating the difference of the nominal frequency and the product of the active power with a gain, to generate the phase signal for a sinusoid, * calculating or measuring the voltage drop of the inverter output voltage (RMS value) from the rated voltage, * integrating the difference of the product of the voltage drop with a gain subtracted by the product of the reactive power with another gain, to generate the amplitude for the sinusoid, * forming a sinusoidal signal according to the outputs of the two integrators, * passing the formed sinusoid as the voltage reference for thc inncr-loop controller of the inverter, of which the output impedance is dominantly inductive for the rated frequency, * a candidate inner-loop controller is to convert the voltage reference to PWM signals to drive the inverter.

Specific embodiments of the present invention will now be described, by way of example onl)c with reference to the accompanying drawings, in which:-Figure 1 depicts the structure of an single-phase inverter.

Figure 2 depicts a candidate inner-loop controller to achieve a resistance-dominated output impedance.

Figure 3 shows an approximate block diagram of the candidate inner-loop controller for analysis.

Figure 4 depicts two inverters connected in parallel.

Figure 5 shows the conventional droop controller.

Figure 6 shows the invented robust droop controller for inverters with resistance-dominated output impedance.

Figure 7 shows the invented robust droop controller for inverters with inductance-dominated output impedance.

Figure 8 shows the experimental results with a linear load.

Figure 9 shows the experimental results with a nonlinear load.

Figure 10 shows the experimental results with the same nonlinear load but the inverters were controlled by the conventional droop controller.

The rest of this description is organised as follows. The design of an inverter to have resistive or inductive output impedance over a wide range of frequencies is described in Section I based on the fact that the capacitor can be regarded as a part of the load.

In Section II, the conditions to achieve proportional power sharing are derived and the inherent limitations of the conventional droop control scheme is revealed. An improved droop controller that is robust to computational errors, disturbances, noises, parameter drifts and component mismatches is described in Section III. Experimental results are given in Section IV.

I. CONTROLLER DESIGN FOR INDIvIDuAL INvERTERS The circuit of a single-phase inverter under consideration is shown in Fig. 1(a). It consists of a single-phase H-bridge inverter powered by a DC source, and an LC filter.

The inverter is connected to the AC bus via a circuit breaker (lB and the load is assumed to be connected to the AC bus. The control signal u is converted to a PWM signal to drive the H-bridge so that the average of Hf over a switching period is the same as u, i.e. ii n. Hence, the PWM block and the H-bridge can and will be ignored in the controller design. The inductor current i is measured to construct a controller so that the output impedance of the inverter is forced to be resistive and that it dominates the impedance between the inverter and the AC bus. Moreover, the output voltage v0 is measured, together with the inductor current i, for proportional load sharing. This avoids measuring the load current i0 and reduces the cost and complexity of the controller.

As is now well known, it is advantageous to force the output impedance of parallel-connected inverters to be resistive. The inverter consists of an LC filter and, to the best knowledge of the inventor, all control strategies proposed in the literature have adopted a second-order model for the inverter. Here, an important step forward has been made, that is to rcgard the capacitor C as a part of the load instcad of a part of the inverter.

This reduces the control plant to an H-bridge and an inductor, as shown in Figure 1(b).

The advantages of this are: 1) it reduces the order of the control plant to be 1; 2) it reduces the signals to be measured for feedback to one(excluding the feedback for voltage/power control); and 3) it considerably simplifies the design and analysis of the controller, which facilitates the understanding of the nature of inverter control.

Since the control plant is now of the first order, the controller can be designed with ease. The controller shown in Figure 2 involves the feedback of the inductor current i with a proportional gain.

A. To Achieve a Resistive Output Impedance The following two equations hold for the closed-loop system consisting of Figure 1(b) and Figure 2: U K1i, sLi + v0.

Since the average of Uf over a switching period is the same as it, there is (approximately) Ki sLi + v0, which gives V0 V -Z0 (s) . j with Z0(s) ii" sL+K.

If the gain K is chosen big enough, the effect of the inductance is not significant and the output impedance can be made nearly purely resistive over a wide range of frequencies. Then, the output impedance is roughly which is independent of the inductance. This considerably facilitates the sharing of harmonic currents and avoids the need to deal with every harmonic component indi-vidually because the output impedance is more or less the same at different harmonic frequencies. Moreovei the harmonic components in the output voltage can be made very small even with nonlinear loads by choosing a small output impedance. Hence, there is normally no need to take any extra action to improve the THD of the output voltage.

With the above control strategy, the inverter can be approximated as a controlled ideal voltage supply v cascaded with a resistive output impedance R0 described as V0TTVR0i (1) with R0K1.

Note that o, a V if no load is connected.

B. Stability analysis If the controller is implemented using analogue electronic circuits, then the control loop is stable for a very large gain K. However, if it is implemented by using a digital controller, then the proportional gain is limited. The effect of computation and PWM conversion can be approximated by a one-step delay where T8 is the sampling period. Then, the equivalent block diagram of the control loop is shown in Figure 3.

The characteristic equation of the loop is 1 + 0. sL

If the gain is chosen to satisfy rL (2) then the ioop is stable. When K M the phase margin of the ioop is f. Note that the analysis done here is to demonstrate that there is a limit, sometime very strict, on the current feedback gain. The gain K should be further decreased if a low-pass filter is involved in the measurement of the cunent i.

C. To Achieve an Inductive Output Impedance Because the inverter has an inductor embedded, there is no need to introduce an extra controller. Instead, the voltage reference v can be directly converted into PWM signals to drive the inverter. This can he easily done via choosing K 0. In this case, the output impedance is Z0(s) sL.

II. INHERENT LIMITATIONS OF THE CONVENTIONAL DROOP CONTROL SCHEME Fig. 4 shows two inverters with resistive output impedances connected in parallel.

The line impedances are omitted because the output impedances of the inverters are designed to dominate the impedance from the inverter to the AC-bus. The reference voltages of the two inverters are, respectively, E1 sin(wit + S1), E2 sin(w2t + S2).

The power ratings of the inverters are EI and 8 E*1. They share the same output voltage V0.

Since the output impedances of the inverters are designed to be resistive (constant) over a wide range of frequencies, all the harmonic current components can be shared among the inverters in proportion to their power ratings. Hence, proportional sharing can he achieved for linear and nonlinear loads and the following analysis is applicable to both linear and nonlinear loads.

The active and reactive power of each inverter injected into the bus are 1' Ti x. w2 V tiv0COSu1-V0 -Ii--oi -iL°sin5 (4) In order for the inverters to share the load, the conventional droop controller -(5) + rnQ1, (6) as shown in Figure 5, is widely used to generate the amplitude and frequency of the voltage reference for each inverter, where J is the rated frequency. Note that the P £ and Q -w droop is used because the output impedances are resistive. Otherwise, the P -cc and Q £ droop

-

-rriP, should be used when the output impedances are inductive. The following is based on the P -E and Q -LC droop (5, 6). The drooping coefficients rz and rri are normally determined by the desired voltage and frequency drops, respectively, at the rated active power and reactive power. The frequency w is integrated to form the phase of the voltage reference Vrj.

In order for the inverters to share the load in proportional to their power ratings, the droop coefficients of the inverters should be in inverse proportional to their power ratings, i.e., n and m should be chosen to satisfy n28... n03, (7) m1S 112. (8) It is easy to see that n and in1 also satisfy flj 2 m1 in2 A. Active power sharing Substituting (5) into (3), the active power of the two inverters can be obtained as RET: E*cosS_V0 (9) iii cos 5 + R0/V0 Substituting (9) into (5), the voltage amplitude deviation of the two inverters is AE -E*cosSi -V0 -E*COS62 (10) cosS1+--cosO9+-----It is known that the voltage deviation of the two units leads to considerable enors in load sharing. In order for P1 P2 nip1 2P2 or L 01 02 to hold, the voltage deviation AE should be 0 according to (5). This is a very strict con-dition because there are always numerical computational errors, disturbances, parameter drifts and component mismatches. This condition is satisfied if (11) R01 R02 and (12) In other words, n should be chosen to be proportional to its output impedance R0.

Taking (7) into account, in order to achieve accurate sharing of active power, the (resistive) output impedance should be designed to satisfy R01S. . . (13) Since the per-unit output impedance of Inverter i is _____ RO1S (E*)2' there is This simply means that the per-unit output impedances of all inverters should be the same in order to achieve exact proportional active power sharing. Recall that power transformers with different power ratings have more or less the same per-unit output impedances (although not resistive).

B. Reactive power sharing When the system is in the steady state, the two inverters work under the same frequency, i.e., w1 w2. It is well know that this guarantees the accuracy of reactive power sharing for inverters with resistive output impedances (or the accuracy of active power sharing for inverters with inductive output impedances). Indeed, from (6), there is miQ1 iri2Qo.

Since the coefficients rn are chosen to satisfy (8), reactive power sharing proportional to their power ratings is (always) achieved, i.e., Q1Q2 S* 1 2 According to (4), there is __ E21/.

in1,, srn Ji ii' in2 sin a2. (14) oi o2 If J1 J2 and E E9 then 1111 lIh (1 R.01 R02 Theorem For inverters designed to have resistive output impedances, if the system is stable, then the following two sets of conditions are equivalent: I E1E I SlS2 I 2 fl2 I t R01 R02 I.. P01 Proof: If (11) and F1 F2 hold, then proportional active power sharing is achieved according to (5). As a result, (12) holds according to (10) and (14). Furthermore, reactive power sharing proportional to their ratings is achieved and (15) holds. Conversely, if (12) and (15) hold, then F1 F2 according to (14). Furthermore, (11) holds according to (10). This completes the proof. * This theorem indicates that if inverters with resistive output impedances are designed to achieve exact proportional active power sharing, then they also achieve proportional reactive power sharing in the ideal case. The converse is also true. However, it is almost impossible in reality if this strategy is used. It is difficult to maintain F £2 E because there are always numerical computational errors, disturbances and noises.

It is also difficult to maintain 7i... because of parameter drifts and component mismatches. A mechanism is needed to guarantee that exact proportional load sharing can be achieved.

Similar results hold for inverters with inductance-dominated output impedances.

III. ROBUST DROOP CONTROLLER TO ACHIEVE EXACT PROPORTIONAL LOAD

SHARING

A. For inverters with resistance-dominated output impedances As a matter of fact, the voltage droop (5) can be re-written as

AE

and the voltage E can be implemented via integrating AE, that is, E AE1dt.

This works for the grid-connected mode where AE is eventually 0 (so that the desired power is sent to the grid without error). However, it does not work for the standalone mode because the actual power P1 is determined by the load and AE cannot be 0.

This is why different controllers had to be used for the standalone mode and the grid-connected mode.

According to (1), the output voltage v0 drops when the load increases. It also drops due to the droop control, according to (5). In order to make sure that the output voltage remains within a certain required range, the output voltage drop * -V0 can be added to AE via an amplifier ICE. This actually results in an improved droop controller shown in Figure 6. It is able to eliminate (at least considerably reduce) the impact of computational errors, noises and disturbances. As to be explained below, it is also able to maintain exact proportional load sharing and hence robust with respect to parameter drills, component mismatches and disturbances. In the steady state, the input to the integrator should be 0. Hence, n1P V0). (16) The right-hand side of the above equation is always the same for all inverters connected in parallel as long as IC is chosen the same, which can be easily met. Hence, exact real power sharing can be achieved without having the same E1, which is more natural. The active power sharing is no longer dependent on the inverter output impedances and is also immune to the numerical computational errors and disturbances, which guarantees the accuracy of real power sharing. Moreover, from (16), there is V0E*-j-Pi.

The output voltage drop is no longer determined by the output impedance originally designed but by the parameters n, I-and the actual power F. It can be considerably reduced by using a large iCe. This easily solves the compromise between the voltage drop and the speed of dynamic responses. The droop coefficient rt can be chosen big to speed up the dynamic response while the voltage drop can be kept small by using a large K. Although the output impedance of Inverter i is initially designed as R01, e.g., as designed using the approach presented in Section I, the equivalent output impedance after adding the robust droop controller has become which is determined by n (with the same B. For inverters with inductance-dominated output impedances Similarly, for inverters with inductance-dominated output impedances, the conventio-nal P -w and Q -E droop is rrtPj.

In this case, the robust droop controller is shown in Figure 7. This is able to eliminate (at least considerably reduce) the impact of computational errors, noises and disturbances.

It is also able to maintain exact proportional load sharing and hence robust with respect to parameter drifts, component mismatches and disturbances. In the steady state, the input to the integrator should be 0. Hence, (17) Again, the right-hand side of the above equation is always the same for all inverters connected in parallel as long as K is chosen the same. Hence, exact reactive power sharing can be achieved. The reactive power sharing is no longer dependent on the inverter output impedances and is also immune to the numerical computational errors and disturbances, which guarantees the accuracy of reactive power sharing. Moreover, from (17), there is The output voltage drop is no longer determined by the output impedance originally designed hut by the parameters u, K and the actual reactive power Q. IV. EXPERIMENTAL RESULTS The strategy for inverters having resistance-dominated output impedances has been verified in a laboratory setup. It consists of two single-phase inverters controlled by dSPACE kits and powered by separate 42V DC power supplies. The values of the inductors and capacitors are 2. 35mH and 221uF, respectively. The switching frequency is 7.5kHz and the frequency of the system is 50Hz. The nominal output voltage is 12V RMS and K6 10. The droop coefficients are: ni 0.4 and ri2 0.8; m1 0.1 and rn2 0.2. Hence, it is expected that P1 2P2. According to (2), K should be less than 27. In the experiments, it was chosen as 4 for both inverters. Due to the configuration of the hardware setup, the voltage for Inverter 2 was measured by the controller of Inverter 1 and then sent out via a DAC channel, which was then sampled by the controller of Inverter 2. This brought some latency into the system but the effect was not noticeable.

A. With a linear load A linear load of about 9Q was connected to Inverter 2 initially. Inverter 1 was connected to the system at around t 2 second and was then disconnected at around t 7.5 second. Figure 8 shows the power and cunents of the two inverters. It can be seen that the two inverters shared the load very accurately in the ratio of 2 1.

B. With a nonlinear load A nonlinear load, consisting of a rectifier loaded with an LC filter and the same rheostat used in the previous experiment, was connected to Inverter 2 initially. Inverter 1 was connected to the system at around t 2.7 second and was then disconnected at around t 9.7 second. Figure 9 shows the power and currents of the two inverters. It can be seen that the two inverters were still able to share the load very accurately in the ratio of 2 1, although there are significant amount of harmonic current components.

In order to compare the invented robust droop controller with the conventional one, the same experiment was repeated with the conventional droop controller and the results are shown in Figure 10. In this case, the two inverters were not able to share the load in the rafio of 2 1 as designed.